From b09ed62f2d985c8eb2d5d5b560bebac653fdba20 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 13 Feb 2023 21:13:37 +0100 Subject: dt-bindings: mfd: qcom,spmi-pmic: Allow RRADC as adc@ subnode This was omitted when adding the RRADC bindings. Fixes: 7ea58c951ab3 ("dt-bindings: iio: adc: document qcom-spmi-rradc") Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230213201337.2089970-1-konrad.dybcio@linaro.org --- Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index adf88245c409..8f076bb622b1 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -115,6 +115,7 @@ patternProperties: type: object oneOf: - $ref: /schemas/iio/adc/qcom,spmi-iadc.yaml# + - $ref: /schemas/iio/adc/qcom,spmi-rradc.yaml# - $ref: /schemas/iio/adc/qcom,spmi-vadc.yaml# "^adc-tm@[0-9a-f]+$": -- cgit v1.2.3 From c301311a523bcc48d6d626cbd4654463a105e089 Mon Sep 17 00:00:00 2001 From: Poovendhan Selvaraj Date: Wed, 8 Feb 2023 11:03:32 +0530 Subject: dt-bindings: mfd: Add the tcsr compatible for IPQ9574 Add the tcsr compatible string for IPQ9574 SoC Signed-off-by: Poovendhan Selvaraj Acked-by: Krzysztof Kozlowski Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230208053332.16537-6-quic_poovendh@quicinc.com --- Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml index 2eeebe920e6e..203fc890c9a3 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml @@ -31,6 +31,7 @@ properties: - qcom,tcsr-ipq5332 - qcom,tcsr-ipq6018 - qcom,tcsr-ipq8064 + - qcom,tcsr-ipq9574 - qcom,tcsr-mdm9615 - qcom,tcsr-msm8226 - qcom,tcsr-msm8660 -- cgit v1.2.3 From 4d820dda94162968ea743675d9338ff5df6f62d0 Mon Sep 17 00:00:00 2001 From: Emil Renner Berthing Date: Sat, 11 Feb 2023 05:18:15 +0200 Subject: dt-bindings: mfd: syscon: Add StarFive JH7100 sysmain compatible Document StarFive JH7100 SoC compatible for sysmain registers. Signed-off-by: Emil Renner Berthing Signed-off-by: Cristian Ciocaltea Acked-by: Krzysztof Kozlowski Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230211031821.976408-7-cristian.ciocaltea@collabora.com --- Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index c828c4f5e4a7..43f564be709f 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -67,6 +67,7 @@ properties: - rockchip,rk3568-qos - rockchip,rk3588-qos - rockchip,rv1126-qos + - starfive,jh7100-sysmain - const: syscon -- cgit v1.2.3 From 21a8d573d967214e66abe2a1d69152d59e2a3521 Mon Sep 17 00:00:00 2001 From: Mukesh Ojha Date: Thu, 2 Feb 2023 16:41:24 +0530 Subject: dt-bindings: mfd: qcom,tcsr: Add compatible for sm8450 Document the qcom,sm8450-tcsr compatible. Signed-off-by: Mukesh Ojha Acked-by: Krzysztof Kozlowski Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/1675336284-548-1-git-send-email-quic_mojha@quicinc.com --- Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml index 203fc890c9a3..5059bc2e676d 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml @@ -26,6 +26,7 @@ properties: - qcom,sdm630-tcsr - qcom,sdm845-tcsr - qcom,sm8150-tcsr + - qcom,sm8450-tcsr - qcom,tcsr-apq8064 - qcom,tcsr-apq8084 - qcom,tcsr-ipq5332 -- cgit v1.2.3 From 2c6a1bde024ccb0e64ea4bc112d15438abc08949 Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Wed, 8 Mar 2023 17:49:48 +0530 Subject: dt-bindings: mfd: qcom,tcsr: Add compatible for sdx65 Add the qcom,sdx65-tcsr compatible. Signed-off-by: Rohit Agarwal Acked-by: Krzysztof Kozlowski Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/1678277993-18836-2-git-send-email-quic_rohiagar@quicinc.com --- Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml index 5059bc2e676d..51fa614c3f51 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml @@ -25,6 +25,7 @@ properties: - qcom,sc8280xp-tcsr - qcom,sdm630-tcsr - qcom,sdm845-tcsr + - qcom,sdx65-tcsr - qcom,sm8150-tcsr - qcom,sm8450-tcsr - qcom,tcsr-apq8064 -- cgit v1.2.3 From ba2b13df8ab005cee919d2ca31829a3c639fded2 Mon Sep 17 00:00:00 2001 From: Marcello Sylvester Bauer Date: Tue, 7 Mar 2023 13:12:44 +0100 Subject: dt-bindings: mfd: Add MAX5970 and MAX5978 The MAX597x is a hot swap controller with configurable fault protection. It also has 10bit ADC for current & voltage measurements. ... Changes in V12: - Update title Signed-off-by: Marcello Sylvester Bauer Co-developed-by: Patrick Rudolph Signed-off-by: Patrick Rudolph Co-developed-by: Naresh Solanki Signed-off-by: Naresh Solanki Reviewed-by: Krzysztof Kozlowski Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230307121246.127425-1-Naresh.Solanki@9elements.com --- .../devicetree/bindings/mfd/maxim,max5970.yaml | 151 +++++++++++++++++++++ 1 file changed, 151 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/maxim,max5970.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/maxim,max5970.yaml b/Documentation/devicetree/bindings/mfd/maxim,max5970.yaml new file mode 100644 index 000000000000..da67742c5aa9 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/maxim,max5970.yaml @@ -0,0 +1,151 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/maxim,max5970.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Regulator for MAX5970 Smart Switch from Maxim Integrated + +maintainers: + - Patrick Rudolph + +description: | + The smart switch provides no output regulation, but independent fault protection + and voltage and current sensing. + Programming is done through I2C bus. + + Datasheets: + https://datasheets.maximintegrated.com/en/ds/MAX5970.pdf + https://datasheets.maximintegrated.com/en/ds/MAX5978.pdf + +properties: + compatible: + enum: + - maxim,max5970 + - maxim,max5978 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + leds: + type: object + description: + Properties for four LEDS. + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + patternProperties: + "^led@[0-3]$": + $ref: /schemas/leds/common.yaml# + type: object + + additionalProperties: false + + vss1-supply: + description: Supply of the first channel. + + vss2-supply: + description: Supply of the second channel. + + regulators: + type: object + description: + Properties for both hot swap control/switch. + + patternProperties: + "^sw[0-1]$": + $ref: /schemas/regulator/regulator.yaml# + type: object + properties: + shunt-resistor-micro-ohms: + description: | + The value of current sense resistor in microohms. + + required: + - shunt-resistor-micro-ohms + + unevaluatedProperties: false + + additionalProperties: false + +required: + - compatible + - reg + - regulators + - vss1-supply + +allOf: + - if: + properties: + compatible: + enum: + - maxim,max5970 + then: + required: + - vss2-supply + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p3v3>; + + regulators { + sw0_ref_0: sw0 { + shunt-resistor-micro-ohms = <12000>; + }; + }; + + leds { + #address-cells = <1>; + #size-cells = <0>; + led@0 { + reg = <0>; + label = "led0"; + default-state = "on"; + }; + led@1 { + reg = <1>; + label = "led1"; + default-state = "on"; + }; + }; + }; + }; + + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + vss1-supply = <&p3v3>; + vss2-supply = <&p5v>; + + regulators { + sw0_ref_1: sw0 { + shunt-resistor-micro-ohms = <12000>; + }; + sw1_ref_1: sw1 { + shunt-resistor-micro-ohms = <10000>; + }; + }; + }; + }; +... -- cgit v1.2.3 From e8e9837dde98b18b694f79f6268afff7a610bf30 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 6 Mar 2023 08:26:17 +0100 Subject: dt-bindings: mfd: qcom,tcsr: Document SDX55 TCSR Add compatible for SDX55 TCSR block. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230306072618.10770-1-krzysztof.kozlowski@linaro.org --- Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml index 51fa614c3f51..fe790af7b4fb 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml @@ -25,6 +25,7 @@ properties: - qcom,sc8280xp-tcsr - qcom,sdm630-tcsr - qcom,sdm845-tcsr + - qcom,sdx55-tcsr - qcom,sdx65-tcsr - qcom,sm8150-tcsr - qcom,sm8450-tcsr -- cgit v1.2.3 From 6e264e72299c1aff75b9cf45c4cbebaea2cb5fd6 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Wed, 8 Mar 2023 10:55:48 -0600 Subject: dt-bindings: mfd: Add TI-Nspire misc registers The TI Nspire devices contain a set of registers with a seemingly miscellaneous set of functionality. This area is known simply as the "misc" region. Signed-off-by: Andrew Davis Reviewed-by: Rob Herring Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230308165557.2242-2-afd@ti.com --- .../devicetree/bindings/mfd/ti,nspire-misc.yaml | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml b/Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml new file mode 100644 index 000000000000..28cd5164d46f --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ti,nspire-misc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI Nspire MISC hardware block + +maintainers: + - Andrew Davis + +description: + System controller node represents a register region containing a set + of miscellaneous registers. The registers are not cohesive enough to + represent as any specific type of device. Currently there is a reset + controller. + +properties: + compatible: + items: + - enum: + - ti,nspire-misc + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + reboot: + $ref: /schemas/power/reset/syscon-reboot.yaml# + +required: + - compatible + - reg + - reboot + +additionalProperties: false + +examples: + - | + misc: misc@900a0000 { + compatible = "ti,nspire-misc", "syscon", "simple-mfd"; + reg = <0x900a0000 0x1000>; + + reboot { + compatible = "syscon-reboot"; + offset = <0x08>; + value = <0x02>; + }; + }; -- cgit v1.2.3 From 44604617ce7aa0c24fd198b5a8760e018549922f Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Wed, 15 Mar 2023 19:38:19 +0100 Subject: dt-bindings: mfd: qcom,spmi-pmic: Add PM2250 Add a compatible for PM2250, commonly found with QCM2290. Signed-off-by: Konrad Dybcio Acked-by: Krzysztof Kozlowski Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230315183819.3563704-1-konrad.dybcio@linaro.org --- Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index 8f076bb622b1..975c30aad23c 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -33,6 +33,7 @@ properties: compatible: items: - enum: + - qcom,pm2250 - qcom,pm6125 - qcom,pm6150 - qcom,pm6150l -- cgit v1.2.3 From 3e0475ec8d9114b600586b0bfb4056565a679a3d Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Tue, 14 Mar 2023 19:30:33 +0100 Subject: dt-bindings: mfd: qcom,spmi-pmic: Add compatible for pmm8654au PMM8654au is the SPMI PMIC variant used on sa8775p-ride. Add a compatible for it. Signed-off-by: Bartosz Golaszewski Acked-by: Rob Herring Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230314183043.619997-5-brgl@bgdev.pl --- Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index 975c30aad23c..0f7dd7ac9630 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -79,6 +79,7 @@ properties: - qcom,pmk8350 - qcom,pmk8550 - qcom,pmm8155au + - qcom,pmm8654au - qcom,pmp8074 - qcom,pmr735a - qcom,pmr735b -- cgit v1.2.3 From 9896a19caf79f83692f13ab688d34c85ecfa92b2 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 22 Mar 2023 12:35:18 -0500 Subject: dt-bindings: mfd: Drop unneeded quotes in 'ref', 'id' and 'schema' entries Cleanup bindings dropping unneeded quotes. Once all these are fixed, checking for this can be enabled in yamllint. Signed-off-by: Rob Herring Reviewed-by: Damien Le Moal Reviewed-by: Krzysztof Kozlowski Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230322173519.3971434-1-robh@kernel.org --- .../bindings/mfd/canaan,k210-sysctl.yaml | 6 +++--- .../devicetree/bindings/mfd/google,cros-ec.yaml | 22 +++++++++++----------- .../bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml | 2 +- .../devicetree/bindings/mfd/qcom-pm8xxx.yaml | 2 +- .../devicetree/bindings/mfd/rohm,bd71815-pmic.yaml | 2 +- .../devicetree/bindings/mfd/rohm,bd71828-pmic.yaml | 2 +- .../devicetree/bindings/mfd/wlf,arizona.yaml | 2 +- .../devicetree/bindings/mfd/x-powers,ac100.yaml | 4 ++-- .../devicetree/bindings/mfd/xylon,logicvc.yaml | 4 ++-- 9 files changed, 23 insertions(+), 23 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml b/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml index e2046f07a40e..8459d3642205 100644 --- a/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml +++ b/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml @@ -36,7 +36,7 @@ properties: clock-controller: # Child node type: object - $ref: "../clock/canaan,k210-clk.yaml" + $ref: ../clock/canaan,k210-clk.yaml description: Clock controller for the SoC clocks. This child node definition should follow the bindings specified in @@ -45,7 +45,7 @@ properties: reset-controller: # Child node type: object - $ref: "../reset/canaan,k210-rst.yaml" + $ref: ../reset/canaan,k210-rst.yaml description: Reset controller for the SoC. This child node definition should follow the bindings specified in @@ -54,7 +54,7 @@ properties: syscon-reboot: # Child node type: object - $ref: "../power/reset/syscon-reboot.yaml" + $ref: ../power/reset/syscon-reboot.yaml description: Reboot method for the SoC. This child node definition should follow the bindings specified in diff --git a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml index cdf1d719efe9..456465e35114 100644 --- a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml +++ b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml @@ -65,7 +65,7 @@ properties: ARM Cortex M4 Co-processor. Contains the name of the rpmsg device. Used to match the subnode to the rpmsg device announced by the SCP. - $ref: "/schemas/types.yaml#/definitions/string" + $ref: /schemas/types.yaml#/definitions/string spi-max-frequency: true @@ -94,23 +94,23 @@ properties: const: 0 typec: - $ref: "/schemas/chrome/google,cros-ec-typec.yaml#" + $ref: /schemas/chrome/google,cros-ec-typec.yaml# ec-pwm: - $ref: "/schemas/pwm/google,cros-ec-pwm.yaml#" + $ref: /schemas/pwm/google,cros-ec-pwm.yaml# deprecated: true pwm: - $ref: "/schemas/pwm/google,cros-ec-pwm.yaml#" + $ref: /schemas/pwm/google,cros-ec-pwm.yaml# kbd-led-backlight: - $ref: "/schemas/chrome/google,cros-kbd-led-backlight.yaml#" + $ref: /schemas/chrome/google,cros-kbd-led-backlight.yaml# keyboard-controller: - $ref: "/schemas/input/google,cros-ec-keyb.yaml#" + $ref: /schemas/input/google,cros-ec-keyb.yaml# proximity: - $ref: "/schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml#" + $ref: /schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml# codecs: type: object @@ -126,7 +126,7 @@ properties: patternProperties: "^ec-codec@[a-f0-9]+$": type: object - $ref: "/schemas/sound/google,cros-ec-codec.yaml#" + $ref: /schemas/sound/google,cros-ec-codec.yaml# required: - "#address-cells" @@ -151,15 +151,15 @@ properties: patternProperties: "^i2c-tunnel[0-9]*$": type: object - $ref: "/schemas/i2c/google,cros-ec-i2c-tunnel.yaml#" + $ref: /schemas/i2c/google,cros-ec-i2c-tunnel.yaml# "^regulator@[0-9]+$": type: object - $ref: "/schemas/regulator/google,cros-ec-regulator.yaml#" + $ref: /schemas/regulator/google,cros-ec-regulator.yaml# "^extcon[0-9]*$": type: object - $ref: "/schemas/extcon/extcon-usbc-cros-ec.yaml#" + $ref: /schemas/extcon/extcon-usbc-cros-ec.yaml# required: - compatible diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml index 22edcb4b212f..bdff5b653453 100644 --- a/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml @@ -53,7 +53,7 @@ properties: '^ldo[0-9]+$': type: object - $ref: "/schemas/regulator/regulator.yaml#" + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml b/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml index 9acad9d326eb..9c51c1b19067 100644 --- a/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml @@ -49,7 +49,7 @@ patternProperties: "rtc@[0-9a-f]+$": type: object - $ref: "../rtc/qcom-pm8xxx-rtc.yaml" + $ref: ../rtc/qcom-pm8xxx-rtc.yaml required: - compatible diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml index d6d120a78094..05747e012516 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml @@ -46,7 +46,7 @@ properties: rohm,clkout-open-drain: description: clk32kout mode. Set to 1 for "open-drain" or 0 for "cmos". - $ref: "/schemas/types.yaml#/definitions/uint32" + $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0 maximum: 1 diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml index ec3adcd3483d..11089aa89ec6 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml @@ -46,7 +46,7 @@ properties: rohm,clkout-open-drain: description: clk32kout mode. Set to 1 for "open-drain" or 0 for "cmos". - $ref: "/schemas/types.yaml#/definitions/uint32" + $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0 maximum: 1 diff --git a/Documentation/devicetree/bindings/mfd/wlf,arizona.yaml b/Documentation/devicetree/bindings/mfd/wlf,arizona.yaml index ea3337dafaf5..7902f3c5d289 100644 --- a/Documentation/devicetree/bindings/mfd/wlf,arizona.yaml +++ b/Documentation/devicetree/bindings/mfd/wlf,arizona.yaml @@ -156,7 +156,7 @@ properties: entry has a value that is out of range for a 16 bit register then the chip default will be used. If present exactly five values must be specified. - $ref: "/schemas/types.yaml#/definitions/uint32-array" + $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 1 maxItems: 5 diff --git a/Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml b/Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml index 309606d2d806..f3d8394b27e7 100644 --- a/Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml +++ b/Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- -$id: "http://devicetree.org/schemas/mfd/x-powers,ac100.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/mfd/x-powers,ac100.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: X-Powers AC100 diff --git a/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml b/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml index 9efd49c39bd2..6e880a46d7ee 100644 --- a/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml +++ b/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml @@ -2,8 +2,8 @@ # Copyright 2019 Bootlin %YAML 1.2 --- -$id: "http://devicetree.org/schemas/mfd/xylon,logicvc.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/mfd/xylon,logicvc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: Xylon LogiCVC multi-function device -- cgit v1.2.3 From fb9d4960a876e9344ab2c8a22c5c0fcd8c64210d Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Mon, 20 Mar 2023 14:57:10 +0100 Subject: dt-bindings: mfd: qcom,spmi-pmic: Add nvram function Add an 'nvram' pattern property and a reference to the corresponding SDAM DT schema. Signed-off-by: Johan Hovold Acked-by: Rob Herring Reviewed-by: Krzysztof Kozlowski Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230320135710.1989-4-johan+linaro@kernel.org --- Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index 0f7dd7ac9630..84620ebc1efe 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -138,6 +138,10 @@ patternProperties: type: object $ref: /schemas/pinctrl/qcom,pmic-gpio.yaml# + "^nvram@[0-9a-f]+$": + type: object + $ref: /schemas/nvmem/qcom,spmi-sdam.yaml# + "pon@[0-9a-f]+$": type: object $ref: /schemas/power/reset/qcom,pon.yaml# -- cgit v1.2.3 From 66c8d55966fd169a36fa2ca6e80517080492e87f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 25 Mar 2023 12:43:53 +0100 Subject: dt-bindings: mfd: x-powers,axp152: Simplify disallowing properties The syntax to disallow x-powers,drive-vbus-en, x-powers,self-working-mode and x-powers,master-mode for certain variants can be made simpler. Also this produces much nicer warning message when the condition hits wrong DTS. Signed-off-by: Krzysztof Kozlowski Acked-by: Chen-Yu Tsai Reviewed-by: Andre Przywara Tested-by: Andre Przywara Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230325114353.50293-1-krzysztof.kozlowski@linaro.org --- .../devicetree/bindings/mfd/x-powers,axp152.yaml | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml index b7a8747d5fa0..2691ac08f536 100644 --- a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml +++ b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml @@ -47,9 +47,8 @@ allOf: - x-powers,axp209 then: - not: - required: - - x-powers,drive-vbus-en + properties: + x-powers,drive-vbus-en: false - if: not: @@ -59,14 +58,9 @@ allOf: const: x-powers,axp806 then: - allOf: - - not: - required: - - x-powers,self-working-mode - - - not: - required: - - x-powers,master-mode + properties: + x-powers,self-working-mode: false + x-powers,master-mode: false - if: not: -- cgit v1.2.3 From 0a9d6b54297e216199cbfd08c5e6a35cce152477 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Thu, 30 Mar 2023 12:16:27 +0100 Subject: dt-bindings: timer: Document RZ/G2L MTU3a bindings The RZ/G2L multi-function timer pulse unit 3 (MTU3a) is embedded in the Renesas RZ/G2L family SoC's. It consists of eight 16-bit timer channels and one 32-bit timer channel. It supports the following functions - Counter - Timer - PWM Signed-off-by: Biju Das Reviewed-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230330111632.169434-2-biju.das.jz@bp.renesas.com --- .../devicetree/bindings/timer/renesas,rz-mtu3.yaml | 302 +++++++++++++++++++++ 1 file changed, 302 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml b/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml new file mode 100644 index 000000000000..bffdab0b0185 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml @@ -0,0 +1,302 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/renesas,rz-mtu3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/G2L Multi-Function Timer Pulse Unit 3 (MTU3a) + +maintainers: + - Biju Das + +description: | + This hardware block consists of eight 16-bit timer channels and one + 32- bit timer channel. It supports the following specifications: + - Pulse input/output: 28 lines max. + - Pulse input 3 lines + - Count clock 11 clocks for each channel (14 clocks for MTU0, 12 clocks + for MTU2, and 10 clocks for MTU5, four clocks for MTU1-MTU2 combination + (when LWA = 1)) + - Operating frequency Up to 100 MHz + - Available operations [MTU0 to MTU4, MTU6, MTU7, and MTU8] + - Waveform output on compare match + - Input capture function (noise filter setting available) + - Counter-clearing operation + - Simultaneous writing to multiple timer counters (TCNT) + (excluding MTU8). + - Simultaneous clearing on compare match or input capture + (excluding MTU8). + - Simultaneous input and output to registers in synchronization with + counter operations (excluding MTU8). + - Up to 12-phase PWM output in combination with synchronous operation + (excluding MTU8) + - [MTU0 MTU3, MTU4, MTU6, MTU7, and MTU8] + - Buffer operation specifiable + - [MTU1, MTU2] + - Phase counting mode can be specified independently + - 32-bit phase counting mode can be specified for interlocked operation + of MTU1 and MTU2 (when TMDR3.LWA = 1) + - Cascade connection operation available + - [MTU3, MTU4, MTU6, and MTU7] + - Through interlocked operation of MTU3/4 and MTU6/7, the positive and + negative signals in six phases (12 phases in total) can be output in + complementary PWM and reset-synchronized PWM operation. + - In complementary PWM mode, values can be transferred from buffer + registers to temporary registers at crests and troughs of the timer- + counter values or when the buffer registers (TGRD registers in MTU4 + and MTU7) are written to. + - Double-buffering selectable in complementary PWM mode. + - [MTU3 and MTU4] + - Through interlocking with MTU0, a mode for driving AC synchronous + motors (brushless DC motors) by using complementary PWM output and + reset-synchronized PWM output is settable and allows the selection + of two types of waveform output (chopping or level). + - [MTU5] + - Capable of operation as a dead-time compensation counter. + - [MTU0/MTU5, MTU1, MTU2, and MTU8] + - 32-bit phase counting mode specifiable by combining MTU1 and MTU2 and + through interlocked operation with MTU0/MTU5 and MTU8. + - Interrupt-skipping function + - In complementary PWM mode, interrupts on crests and troughs of counter + values and triggers to start conversion by the A/D converter can be + skipped. + - Interrupt sources: 43 sources. + - Buffer operation: + - Automatic transfer of register data (transfer from the buffer + register to the timer register). + - Trigger generation + - A/D converter start triggers can be generated + - A/D converter start request delaying function enables A/D converter + to be started with any desired timing and to be synchronized with + PWM output. + - Low power consumption function + - The MTU3a can be placed in the module-stop state. + + There are two phase counting modes. 16-bit phase counting mode in which + MTU1 and MTU2 operate independently, and cascade connection 32-bit phase + counting mode in which MTU1 and MTU2 are cascaded. + + In phase counting mode, the phase difference between two external input + clocks is detected and the corresponding TCNT is incremented or + decremented. + The below counters are supported + count0 - MTU1 16-bit phase counting + count1 - MTU2 16-bit phase counting + count2 - MTU1+ MTU2 32-bit phase counting + + The module supports PWM mode{1,2}, Reset-synchronized PWM mode and + complementary PWM mode{1,2,3}. + + In complementary PWM mode, six positive-phase and six negative-phase PWM + waveforms (12 phases in total) with dead time can be output by + combining MTU{3,4} and MTU{6,7}. + + The below pwm channels are supported in pwm mode 1. + pwm0 - MTU0.MTIOC0A PWM mode 1 + pwm1 - MTU0.MTIOC0C PWM mode 1 + pwm2 - MTU1.MTIOC1A PWM mode 1 + pwm3 - MTU2.MTIOC2A PWM mode 1 + pwm4 - MTU3.MTIOC3A PWM mode 1 + pwm5 - MTU3.MTIOC3C PWM mode 1 + pwm6 - MTU4.MTIOC4A PWM mode 1 + pwm7 - MTU4.MTIOC4C PWM mode 1 + pwm8 - MTU6.MTIOC6A PWM mode 1 + pwm9 - MTU6.MTIOC6C PWM mode 1 + pwm10 - MTU7.MTIOC7A PWM mode 1 + pwm11 - MTU7.MTIOC7C PWM mode 1 + +properties: + compatible: + items: + - enum: + - renesas,r9a07g044-mtu3 # RZ/G2{L,LC} + - renesas,r9a07g054-mtu3 # RZ/V2L + - const: renesas,rz-mtu3 + + reg: + maxItems: 1 + + interrupts: + items: + - description: MTU0.TGRA input capture/compare match + - description: MTU0.TGRB input capture/compare match + - description: MTU0.TGRC input capture/compare match + - description: MTU0.TGRD input capture/compare match + - description: MTU0.TCNT overflow + - description: MTU0.TGRE compare match + - description: MTU0.TGRF compare match + - description: MTU1.TGRA input capture/compare match + - description: MTU1.TGRB input capture/compare match + - description: MTU1.TCNT overflow + - description: MTU1.TCNT underflow + - description: MTU2.TGRA input capture/compare match + - description: MTU2.TGRB input capture/compare match + - description: MTU2.TCNT overflow + - description: MTU2.TCNT underflow + - description: MTU3.TGRA input capture/compare match + - description: MTU3.TGRB input capture/compare match + - description: MTU3.TGRC input capture/compare match + - description: MTU3.TGRD input capture/compare match + - description: MTU3.TCNT overflow + - description: MTU4.TGRA input capture/compare match + - description: MTU4.TGRB input capture/compare match + - description: MTU4.TGRC input capture/compare match + - description: MTU4.TGRD input capture/compare match + - description: MTU4.TCNT overflow/underflow + - description: MTU5.TGRU input capture/compare match + - description: MTU5.TGRV input capture/compare match + - description: MTU5.TGRW input capture/compare match + - description: MTU6.TGRA input capture/compare match + - description: MTU6.TGRB input capture/compare match + - description: MTU6.TGRC input capture/compare match + - description: MTU6.TGRD input capture/compare match + - description: MTU6.TCNT overflow + - description: MTU7.TGRA input capture/compare match + - description: MTU7.TGRB input capture/compare match + - description: MTU7.TGRC input capture/compare match + - description: MTU7.TGRD input capture/compare match + - description: MTU7.TCNT overflow/underflow + - description: MTU8.TGRA input capture/compare match + - description: MTU8.TGRB input capture/compare match + - description: MTU8.TGRC input capture/compare match + - description: MTU8.TGRD input capture/compare match + - description: MTU8.TCNT overflow + - description: MTU8.TCNT underflow + + interrupt-names: + items: + - const: tgia0 + - const: tgib0 + - const: tgic0 + - const: tgid0 + - const: tgiv0 + - const: tgie0 + - const: tgif0 + - const: tgia1 + - const: tgib1 + - const: tgiv1 + - const: tgiu1 + - const: tgia2 + - const: tgib2 + - const: tgiv2 + - const: tgiu2 + - const: tgia3 + - const: tgib3 + - const: tgic3 + - const: tgid3 + - const: tgiv3 + - const: tgia4 + - const: tgib4 + - const: tgic4 + - const: tgid4 + - const: tgiv4 + - const: tgiu5 + - const: tgiv5 + - const: tgiw5 + - const: tgia6 + - const: tgib6 + - const: tgic6 + - const: tgid6 + - const: tgiv6 + - const: tgia7 + - const: tgib7 + - const: tgic7 + - const: tgid7 + - const: tgiv7 + - const: tgia8 + - const: tgib8 + - const: tgic8 + - const: tgid8 + - const: tgiv8 + - const: tgiu8 + + clocks: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + "#pwm-cells": + const: 2 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - power-domains + - resets + +additionalProperties: false + +examples: + - | + #include + #include + + mtu3: timer@10001200 { + compatible = "renesas,r9a07g044-mtu3", "renesas,rz-mtu3"; + reg = <0x10001200 0xb00>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0", "tgiv0", "tgie0", + "tgif0", + "tgia1", "tgib1", "tgiv1", "tgiu1", + "tgia2", "tgib2", "tgiv2", "tgiu2", + "tgia3", "tgib3", "tgic3", "tgid3", "tgiv3", + "tgia4", "tgib4", "tgic4", "tgid4", "tgiv4", + "tgiu5", "tgiv5", "tgiw5", + "tgia6", "tgib6", "tgic6", "tgid6", "tgiv6", + "tgia7", "tgib7", "tgic7", "tgid7", "tgiv7", + "tgia8", "tgib8", "tgic8", "tgid8", "tgiv8", "tgiu8"; + clocks = <&cpg CPG_MOD R9A07G044_MTU_X_MCK_MTU3>; + power-domains = <&cpg>; + resets = <&cpg R9A07G044_MTU_X_PRESET_MTU3>; + #pwm-cells = <2>; + }; -- cgit v1.2.3 From 7bb985ac03c4a91d185c006f68c4fadfb71e1cca Mon Sep 17 00:00:00 2001 From: Biju Das Date: Thu, 30 Mar 2023 12:16:29 +0100 Subject: Documentation: ABI: sysfs-bus-counter: add cascade_counts_enable and external_input_phase_clock_select This commit adds cascade_counts_enable and external_input_phase_ clock_select items to counter ABI file. (e.g. for Renesas MTU3 hardware used for phase counting). Signed-off-by: Biju Das Reviewed-by: William Breathitt Gray Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230330111632.169434-4-biju.das.jz@bp.renesas.com --- Documentation/ABI/testing/sysfs-bus-counter | 32 +++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter index ff83320b4255..1417c4272c6c 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter +++ b/Documentation/ABI/testing/sysfs-bus-counter @@ -1,3 +1,33 @@ +What: /sys/bus/counter/devices/counterX/cascade_counts_enable +KernelVersion: 6.4 +Contact: linux-iio@vger.kernel.org +Description: + Indicates the cascading of Counts on Counter X. + + Valid attribute values are boolean. + +What: /sys/bus/counter/devices/counterX/external_input_phase_clock_select +KernelVersion: 6.4 +Contact: linux-iio@vger.kernel.org +Description: + Selects the external clock pin for phase counting mode of + Counter X. + + MTCLKA-MTCLKB: + MTCLKA and MTCLKB pins are selected for the external + phase clock. + + MTCLKC-MTCLKD: + MTCLKC and MTCLKD pins are selected for the external + phase clock. + +What: /sys/bus/counter/devices/counterX/external_input_phase_clock_select_available +KernelVersion: 6.4 +Contact: linux-iio@vger.kernel.org +Description: + Discrete set of available values for the respective device + configuration are listed in this file. + What: /sys/bus/counter/devices/counterX/countY/count KernelVersion: 5.2 Contact: linux-iio@vger.kernel.org @@ -215,6 +245,8 @@ Contact: linux-iio@vger.kernel.org Description: This attribute indicates the number of overflows of count Y. +What: /sys/bus/counter/devices/counterX/cascade_counts_enable_component_id +What: /sys/bus/counter/devices/counterX/external_input_phase_clock_select_component_id What: /sys/bus/counter/devices/counterX/countY/capture_component_id What: /sys/bus/counter/devices/counterX/countY/ceiling_component_id What: /sys/bus/counter/devices/counterX/countY/floor_component_id -- cgit v1.2.3 From dbc5e57200e9ed14f08c5493c8633200cf07d700 Mon Sep 17 00:00:00 2001 From: Jacky Huang Date: Tue, 28 Mar 2023 02:19:05 +0000 Subject: dt-bindings: mfd: syscon: Add nuvoton,ma35d1-sys compatible Add Nuvoton ma35d1 system registers compatible. Signed-off-by: Jacky Huang Reviewed-by: Krzysztof Kozlowski Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230328021912.177301-6-ychuang570808@gmail.com --- Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 43f564be709f..8103154bbb52 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -56,6 +56,7 @@ properties: - microchip,lan966x-cpu-syscon - microchip,sparx5-cpu-syscon - mstar,msc313-pmsleep + - nuvoton,ma35d1-sys - nuvoton,wpcm450-shm - rockchip,px30-qos - rockchip,rk3036-qos -- cgit v1.2.3 From b24e335b7d73b5d65d09144319c62aa967b6abc8 Mon Sep 17 00:00:00 2001 From: Marijn Suijten Date: Mon, 10 Apr 2023 22:29:16 +0200 Subject: dt-bindings: mfd: qcom,spmi-pmic: Use generic ADC node name in examples Update the examples to reflect a future requirement for the generic `channel` node name on ADC channel nodes, while conveying the board name of the channel in a label instead. Signed-off-by: Marijn Suijten Acked-by: Krzysztof Kozlowski Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230410202917.247666-5-marijn.suijten@somainline.org --- Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index 84620ebc1efe..9f4c75c35aae 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -283,12 +283,12 @@ examples: #size-cells = <0>; #io-channel-cells = <1>; - adc-chan@6 { + channel@6 { reg = ; label = "die_temp"; }; - adc-chan@4f { + channel@4f { reg = ; qcom,ratiometric; qcom,hw-settle-time = <200>; -- cgit v1.2.3 From 1706636eafcab76e08784f66f80f00d9aa59bed1 Mon Sep 17 00:00:00 2001 From: Benjamin Bara Date: Wed, 5 Apr 2023 19:14:36 +0200 Subject: dt-bindings: mfd: dlg,da9063: Document voltage monitoring Document that the da9063 only provides under- *and* over-voltage monitoring in one, and therefore requires both to be configured with the same severity and value. Add an example for clarification. Signed-off-by: Benjamin Bara Acked-by: Krzysztof Kozlowski Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230403-da9063-disable-unused-v3-3-cc4dc698864c@skidata.com --- Documentation/devicetree/bindings/mfd/dlg,da9063.yaml | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml b/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml index e8e74e91070c..c5a7e10d7d80 100644 --- a/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml +++ b/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml @@ -12,6 +12,11 @@ maintainers: description: | For device-tree bindings of other sub-modules refer to the binding documents under the respective sub-system directories. + Using regulator-{uv,ov}-{warn,error,protection}-microvolt requires special + handling: First, when GP_FB2 is used, it must be ensured that there is no + moment where all voltage monitors are disabled. Next, as da9063 only supports + UV *and* OV monitoring, both must be set to the same severity and value + (0: disable, 1: enable). properties: compatible: @@ -121,11 +126,19 @@ examples: regulator-max-microamp = <2000000>; regulator-boot-on; }; + ldo6 { + /* UNUSED */ + regulator-name = "LDO_6"; + regulator-uv-protection-microvolt = <0>; + regulator-ov-protection-microvolt = <0>; + }; ldo11 { regulator-name = "LDO_11"; regulator-min-microvolt = <900000>; - regulator-max-microvolt = <3600000>; - regulator-boot-on; + regulator-max-microvolt = <900000>; + regulator-uv-protection-microvolt = <1>; + regulator-ov-protection-microvolt = <1>; + regulator-always-on; }; }; }; -- cgit v1.2.3 From a33c6a22f6d616caab6f5a5bfaa7ee01ea567d82 Mon Sep 17 00:00:00 2001 From: Martin Botka Date: Sat, 1 Apr 2023 01:18:48 +0100 Subject: dt-bindings: mfd: x-powers,axp152: Document the AXP313a variant The X-Powers AXP313a is a PMIC used on some devices with the Allwinner H616 or H313 SoC. According to the datasheet, the DC/DC converter PWM frequency is fixed (to 3 MHz), so disallow the property that lets us set this frequency for the other PMICs. Signed-off-by: Martin Botka Signed-off-by: Andre Przywara Reviewed-by: Krzysztof Kozlowski Acked-by: Chen-Yu Tsai Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230401001850.4988-2-andre.przywara@arm.com (cherry picked from commit 2a9e8a1a7c4caadf690e5a77fe4162c5edab4a9c) Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml index 2691ac08f536..ed76b1c58cdf 100644 --- a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml +++ b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml @@ -73,6 +73,16 @@ allOf: required: - interrupts + - if: + properties: + compatible: + contains: + const: x-powers,axp313a + + then: + properties: + x-powers,dcdc-freq: false + properties: compatible: oneOf: @@ -82,6 +92,7 @@ properties: - x-powers,axp209 - x-powers,axp221 - x-powers,axp223 + - x-powers,axp313a - x-powers,axp803 - x-powers,axp806 - x-powers,axp809 -- cgit v1.2.3 From 34480c6e1746138880778af9b86e86a95e0264fb Mon Sep 17 00:00:00 2001 From: Shengyu Qu Date: Fri, 21 Apr 2023 23:08:14 +0800 Subject: dt-bindings: mfd: x-powers,axp152: Document the AXP15060 variant The X-Powers AXP15060 is a PMIC seen on Starfive Visionfive 2 board. Add relative compatible item and CPUSLDO support and disables DC-DC frequency setting for it. Signed-off-by: Shengyu Qu Reviewed-by: Krzysztof Kozlowski Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/TY3P286MB261177CF7AA2959BD9517DA998609@TY3P286MB2611.JPNP286.PROD.OUTLOOK.COM --- Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml index ed76b1c58cdf..9234df27c6aa 100644 --- a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml +++ b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml @@ -77,7 +77,9 @@ allOf: properties: compatible: contains: - const: x-powers,axp313a + enum: + - x-powers,axp313a + - x-powers,axp15060 then: properties: @@ -97,6 +99,7 @@ properties: - x-powers,axp806 - x-powers,axp809 - x-powers,axp813 + - x-powers,axp15060 - items: - const: x-powers,axp228 - const: x-powers,axp221 @@ -265,7 +268,7 @@ properties: Defines the work frequency of DC-DC in kHz. patternProperties: - "^(([a-f])?ldo[0-9]|dcdc[0-7a-e]|ldo(_|-)io(0|1)|(dc1)?sw|rtc(_|-)ldo|drivevbus|dc5ldo)$": + "^(([a-f])?ldo[0-9]|dcdc[0-7a-e]|ldo(_|-)io(0|1)|(dc1)?sw|rtc(_|-)ldo|cpusldo|drivevbus|dc5ldo)$": $ref: /schemas/regulator/regulator.yaml# type: object unevaluatedProperties: false -- cgit v1.2.3 From 9f0184ac1dcb48efe724ec6482f88d85579b52df Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 16 Apr 2023 14:32:03 +0200 Subject: dt-bindings: mfd: qcom,spmi-pmic: Document flash LED controller The Qualcomm SPMI PMIC come also with a LED controller for flash LEDs, already used in DTS: sm8250-hdk.dtb: pmic@5: 'led-controller@d300' does not match any of the regexes: ... From schema: Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230416123203.299740-1-krzysztof.kozlowski@linaro.org --- Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index 9f4c75c35aae..36de335a33aa 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -138,6 +138,10 @@ patternProperties: type: object $ref: /schemas/pinctrl/qcom,pmic-gpio.yaml# + "^led-controller@[0-9a-f]+$": + type: object + $ref: /schemas/leds/qcom,spmi-flash-led.yaml# + "^nvram@[0-9a-f]+$": type: object $ref: /schemas/nvmem/qcom,spmi-sdam.yaml# -- cgit v1.2.3 From 9e9ff39243ea8795a4833708613f884b39dc91f9 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Mon, 17 Apr 2023 20:00:19 -0500 Subject: dt-bindings: mfd: ti,j721e-system-controller: Add SoC chip ID The system-controller node also contains the chip-id node that is used to identify the SoC specific properties. Add a pattern property to match to the same, and add to the example. Signed-off-by: Nishanth Menon Acked-by: Krzysztof Kozlowski Reviewed-by: Roger Quadros Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20230418010019.1222431-1-nm@ti.com --- .../devicetree/bindings/mfd/ti,j721e-system-controller.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml index 76ef4352e13c..0c98d913747b 100644 --- a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml @@ -62,6 +62,12 @@ patternProperties: description: The phy node corresponding to the ethernet MAC. + "^chipid@[0-9a-f]+$": + type: object + $ref: /schemas/hwinfo/ti,k3-socinfo.yaml# + description: + The node corresponding to SoC chip identification. + required: - compatible - reg @@ -99,5 +105,10 @@ examples: reg = <0x4140 0x18>; #clock-cells = <1>; }; + + chipid@14 { + compatible = "ti,am654-chipid"; + reg = <0x14 0x4>; + }; }; ... -- cgit v1.2.3