From dc1890b95e5088fa267dea9cadc20f833b961e29 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 30 Jul 2023 13:15:41 +0200 Subject: ARM: dts: microchip: split interrupts per cells Each interrupt should be in its own cell. This is much more readable. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230730111542.98238-1-krzysztof.kozlowski@linaro.org Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/microchip/at91rm9200.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/arm/boot/dts/microchip/at91rm9200.dtsi') diff --git a/arch/arm/boot/dts/microchip/at91rm9200.dtsi b/arch/arm/boot/dts/microchip/at91rm9200.dtsi index 37b500f6f395..16c675e3a890 100644 --- a/arch/arm/boot/dts/microchip/at91rm9200.dtsi +++ b/arch/arm/boot/dts/microchip/at91rm9200.dtsi @@ -135,9 +135,9 @@ #address-cells = <1>; #size-cells = <0>; reg = <0xfffa0000 0x100>; - interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 - 18 IRQ_TYPE_LEVEL_HIGH 0 - 19 IRQ_TYPE_LEVEL_HIGH 0>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>, + <18 IRQ_TYPE_LEVEL_HIGH 0>, + <19 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; @@ -147,9 +147,9 @@ #address-cells = <1>; #size-cells = <0>; reg = <0xfffa4000 0x100>; - interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0 - 21 IRQ_TYPE_LEVEL_HIGH 0 - 22 IRQ_TYPE_LEVEL_HIGH 0>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>, + <21 IRQ_TYPE_LEVEL_HIGH 0>, + <22 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&slow_xtal>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; -- cgit v1.2.3