From cc6fc55c7ae04ab19b3972f78d3a8b1be32bf533 Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Mon, 11 Dec 2023 22:54:11 +0530 Subject: ARM: dts: qcom: sdx55: Fix the base address of PCIe PHY While convering the binding to new format, serdes address specified in the old binding was used as the base address. This causes a boot hang as the driver tries to access memory region outside of the specified address. Fix it! Cc: Dmitry Baryshkov Cc: stable@vger.kernel.org # 6.6 Fixes: bb56cff4ac03 ("ARM: dts: qcom-sdx55: switch PCIe QMP PHY to new style of bindings") Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20231211172411.141289-1-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi index e233233c74ce..2045fc779f88 100644 --- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi @@ -431,9 +431,9 @@ status = "disabled"; }; - pcie_phy: phy@1c07000 { + pcie_phy: phy@1c06000 { compatible = "qcom,sdx55-qmp-pcie-phy"; - reg = <0x01c07000 0x2000>; + reg = <0x01c06000 0x2000>; #address-cells = <1>; #size-cells = <1>; ranges; -- cgit v1.2.3