From 6c2eb3e76fb84e2eb46d484f71fab469c0d9532c Mon Sep 17 00:00:00 2001 From: Andreas Färber Date: Mon, 3 Jul 2017 19:18:04 +0200 Subject: ARM: owl: smp: Drop owl_secondary_boot() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit 18cfd9429d8a82c49add8f3ca9d366599bfcac45 simplified the S500 SMP code by removing a loop for pen_release in owl_secondary_boot(). Since then it is only calling owl_v7_invalidate_l1() before branching to secondary_startup(). The owl_v7_invalidate_l1() assembler function is superfluous, too. Therefore drop owl_secondary_boot() and use secondary_boot() directly. Fixes: 18cfd9429d8a ("ARM: owl: smp: Drop bogus holding pen") Cc: David Liu Signed-off-by: Andreas Färber --- arch/arm/mach-actions/Makefile | 4 +--- arch/arm/mach-actions/headsmp.S | 52 ----------------------------------------- arch/arm/mach-actions/platsmp.c | 2 +- 3 files changed, 2 insertions(+), 56 deletions(-) delete mode 100644 arch/arm/mach-actions/headsmp.S (limited to 'arch/arm/mach-actions') diff --git a/arch/arm/mach-actions/Makefile b/arch/arm/mach-actions/Makefile index c0f116241da7..13831037d8cd 100644 --- a/arch/arm/mach-actions/Makefile +++ b/arch/arm/mach-actions/Makefile @@ -1,3 +1 @@ -obj-${CONFIG_SMP} += platsmp.o headsmp.o - -AFLAGS_headsmp.o := -Wa,-march=armv7-a +obj-${CONFIG_SMP} += platsmp.o diff --git a/arch/arm/mach-actions/headsmp.S b/arch/arm/mach-actions/headsmp.S deleted file mode 100644 index 65f53bdb69e7..000000000000 --- a/arch/arm/mach-actions/headsmp.S +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Copyright 2012 Actions Semi Inc. - * Author: Actions Semi, Inc. - * - * Copyright (c) 2017 Andreas Färber - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include - -ENTRY(owl_v7_invalidate_l1) - mov r0, #0 - mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache - mcr p15, 2, r0, c0, c0, 0 - mrc p15, 1, r0, c0, c0, 0 - - ldr r1, =0x7fff - and r2, r1, r0, lsr #13 - - ldr r1, =0x3ff - - and r3, r1, r0, lsr #3 @ NumWays - 1 - add r2, r2, #1 @ NumSets - - and r0, r0, #0x7 - add r0, r0, #4 @ SetShift - - clz r1, r3 @ WayShift - add r4, r3, #1 @ NumWays -1: sub r2, r2, #1 @ NumSets-- - mov r3, r4 @ Temp = NumWays -2: subs r3, r3, #1 @ Temp-- - mov r5, r3, lsl r1 - mov r6, r2, lsl r0 - orr r5, r5, r6 @ Reg = (Temp<