From ad54c3ddb472410f05083dbcf03fcec67ab7b2a5 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Wed, 29 Feb 2012 23:33:39 +0100 Subject: ARM: OMAP3+: SmartReflex Class3: disable errorgen before disable VP SmartReflex AVS Errorgen module supplies signals to Voltage Processor. It is suggested that by disabling Errorgen module before we disable VP, we might be able to ensure lesser chances of race condition to occur in the system. Signed-off-by: Nishanth Menon Signed-off-by: Jean Pihet Reviewed-by: Kevin Hilman Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/smartreflex-class3.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-omap2/smartreflex-class3.c') diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-omap2/smartreflex-class3.c index 53d9d0a5b39d..955566eefac4 100644 --- a/arch/arm/mach-omap2/smartreflex-class3.c +++ b/arch/arm/mach-omap2/smartreflex-class3.c @@ -29,6 +29,7 @@ static int sr_class3_enable(struct voltagedomain *voltdm) static int sr_class3_disable(struct voltagedomain *voltdm, int is_volt_reset) { + sr_disable_errgen(voltdm); omap_vp_disable(voltdm); sr_disable(voltdm); if (is_volt_reset) -- cgit v1.2.3