From 027f27c4eca00b4411fb1fe61c33060569ff73f6 Mon Sep 17 00:00:00 2001 From: John David Anglin Date: Sat, 2 Feb 2013 23:41:24 +0000 Subject: parisc: disable preemption while flushing D- or I-caches through TMPALIAS region It is necessary to disable preemption during cache flushes done through the TMPALIAS region to ensure that the TLB setup is not clobbered by another flush. Signed-off-by: John David Anglin Signed-off-by: Helge Deller --- arch/parisc/include/asm/cacheflush.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/parisc/include/asm/cacheflush.h') diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h index 9f21ab0c02e3..79f694f3ad9b 100644 --- a/arch/parisc/include/asm/cacheflush.h +++ b/arch/parisc/include/asm/cacheflush.h @@ -115,7 +115,9 @@ flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vma { if (PageAnon(page)) { flush_tlb_page(vma, vmaddr); + preempt_disable(); flush_dcache_page_asm(page_to_phys(page), vmaddr); + preempt_enable(); } } -- cgit v1.2.3