From 4b58a0144b1b041818f89851eea87606a3cd80a1 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Fri, 29 Sep 2023 16:26:06 +0200 Subject: clk: versaclock3: Convert to use maple tree register cache The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Mark Brown Link: https://lore.kernel.org/r/20230929-clk-maple-versaclk-v1-2-24dd5b3d8689@kernel.org Signed-off-by: Stephen Boyd --- drivers/clk/clk-versaclock3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/clk/clk-versaclock3.c') diff --git a/drivers/clk/clk-versaclock3.c b/drivers/clk/clk-versaclock3.c index a5ab48ff242c..b4a89c083c11 100644 --- a/drivers/clk/clk-versaclock3.c +++ b/drivers/clk/clk-versaclock3.c @@ -589,7 +589,7 @@ static const struct clk_ops vc3_clk_mux_ops = { static const struct regmap_config vc3_regmap_config = { .reg_bits = 8, .val_bits = 8, - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_MAPLE, .max_register = 0x24, }; -- cgit v1.2.3