From 9d2aa8c7961ae9af5f75af2dc171dd4e4f441e89 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 1 Dec 2015 15:00:24 +0100 Subject: ARM/clocksource: use automatic DT probing for ux500 PRCMU The ARM core kernel already calls clocksource_of_init() so why go to all the trouble of locating and probing this node in the machine. CLOCKSOURCE_OF_DECLARE() will take care of it in the clocksource driver, and thus we can also get rid of the dangling header file Suggested-by: Arnd Bergmann Acked-by: Thomas Gleixner Acked-by: Daniel Lezcano Signed-off-by: Linus Walleij Signed-off-by: Arnd Bergmann --- drivers/clocksource/clksrc-dbx500-prcmu.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'drivers/clocksource') diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c index b375106844d8..dfad6eb99662 100644 --- a/drivers/clocksource/clksrc-dbx500-prcmu.c +++ b/drivers/clocksource/clksrc-dbx500-prcmu.c @@ -12,8 +12,9 @@ * power domain. We use the Timer 4 for our always-on clock * source on DB8500. */ +#include +#include #include -#include #include #define RATE_32K 32768 @@ -63,9 +64,9 @@ static u64 notrace dbx500_prcmu_sched_clock_read(void) #endif -void __init clksrc_dbx500_prcmu_init(void __iomem *base) +static void __init clksrc_dbx500_prcmu_init(struct device_node *node) { - clksrc_dbx500_timer_base = base; + clksrc_dbx500_timer_base = of_iomap(node, 0); /* * The A9 sub system expects the timer to be configured as @@ -85,3 +86,5 @@ void __init clksrc_dbx500_prcmu_init(void __iomem *base) #endif clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K); } +CLOCKSOURCE_OF_DECLARE(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4", + clksrc_dbx500_prcmu_init); -- cgit v1.2.3