From 9abdf39203831215cfd298c0a7604a550621b4c5 Mon Sep 17 00:00:00 2001 From: Nikola Cornij Date: Sat, 3 Oct 2020 00:21:50 -0400 Subject: drm/amd/display: Add an option to limit max DSC target bpp per sink [Why] Can be used for debug purposes [How] Add max target bpp override field and related handling Signed-off-by: Nikola Cornij Acked-by: Aurabindo Pillai Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/dc_dsc.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'drivers/gpu/drm/amd/display/dc/dc_dsc.h') diff --git a/drivers/gpu/drm/amd/display/dc/dc_dsc.h b/drivers/gpu/drm/amd/display/dc/dc_dsc.h index 768ab38d41cf..ec55b77727d5 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_dsc.h +++ b/drivers/gpu/drm/amd/display/dc/dc_dsc.h @@ -61,9 +61,9 @@ bool dc_dsc_parse_dsc_dpcd(const struct dc *dc, bool dc_dsc_compute_bandwidth_range( const struct display_stream_compressor *dsc, - const uint32_t dsc_min_slice_height_override, - const uint32_t min_bpp, - const uint32_t max_bpp, + uint32_t dsc_min_slice_height_override, + uint32_t min_bpp, + uint32_t max_bpp, const struct dsc_dec_dpcd_caps *dsc_sink_caps, const struct dc_crtc_timing *timing, struct dc_dsc_bw_range *range); @@ -71,12 +71,14 @@ bool dc_dsc_compute_bandwidth_range( bool dc_dsc_compute_config( const struct display_stream_compressor *dsc, const struct dsc_dec_dpcd_caps *dsc_sink_caps, - const uint32_t dsc_min_slice_height_override, + uint32_t dsc_min_slice_height_override, + uint32_t max_target_bpp_limit_override, uint32_t target_bandwidth_kbps, const struct dc_crtc_timing *timing, struct dc_dsc_config *dsc_cfg); void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, + uint32_t max_target_bpp_limit_override, struct dc_dsc_policy *policy); void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit); -- cgit v1.2.3