From 886a9c1347558f0568e87fbbe7bcc3a76102bf0b Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 5 Nov 2020 15:11:53 -0600 Subject: PCI: dwc: Move link handling into common code All the DWC drivers do link setup and checks at roughly the same time. Let's use the existing .start_link() hook (currently only used in EP mode) and move the link handling to the core code. The behavior for a link down was inconsistent as some drivers would fail probe in that case while others succeed. Let's standardize this to succeed as there are usecases where devices (and the link) appear later even without hotplug. For example, a reconfigured FPGA device. Link: https://lore.kernel.org/r/20201105211159.1814485-11-robh@kernel.org Tested-by: Marek Szyprowski Signed-off-by: Rob Herring Signed-off-by: Lorenzo Pieralisi Acked-by: Jingoo Han Cc: Kishon Vijay Abraham I Cc: Lorenzo Pieralisi Cc: Bjorn Helgaas Cc: Kukjin Kim Cc: Krzysztof Kozlowski Cc: Richard Zhu Cc: Lucas Stach Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Murali Karicheri Cc: Yue Wang Cc: Kevin Hilman Cc: Neil Armstrong Cc: Jerome Brunet Cc: Martin Blumenstingl Cc: Thomas Petazzoni Cc: Jesper Nilsson Cc: Gustavo Pimentel Cc: Xiaowei Song Cc: Binghui Wang Cc: Andy Gross Cc: Bjorn Andersson Cc: Stanimir Varbanov Cc: Pratyush Anand Cc: Thierry Reding Cc: Jonathan Hunter Cc: Kunihiko Hayashi Cc: Masahiro Yamada Cc: linux-omap@vger.kernel.org Cc: linux-samsung-soc@vger.kernel.org Cc: linux-amlogic@lists.infradead.org Cc: linux-arm-kernel@axis.com Cc: linux-arm-msm@vger.kernel.org Cc: linux-tegra@vger.kernel.org --- drivers/pci/controller/dwc/pcie-armada8k.c | 39 +++++++++++++----------------- 1 file changed, 17 insertions(+), 22 deletions(-) (limited to 'drivers/pci/controller/dwc/pcie-armada8k.c') diff --git a/drivers/pci/controller/dwc/pcie-armada8k.c b/drivers/pci/controller/dwc/pcie-armada8k.c index 13901f359a41..dd2926bbb901 100644 --- a/drivers/pci/controller/dwc/pcie-armada8k.c +++ b/drivers/pci/controller/dwc/pcie-armada8k.c @@ -154,10 +154,24 @@ static int armada8k_pcie_link_up(struct dw_pcie *pci) return 0; } -static void armada8k_pcie_establish_link(struct armada8k_pcie *pcie) +static int armada8k_pcie_start_link(struct dw_pcie *pci) +{ + u32 reg; + + /* Start LTSSM */ + reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG); + reg |= PCIE_APP_LTSSM_EN; + dw_pcie_writel_dbi(pci, PCIE_GLOBAL_CONTROL_REG, reg); + + return 0; +} + +static int armada8k_pcie_host_init(struct pcie_port *pp) { - struct dw_pcie *pci = pcie->pci; u32 reg; + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); + + dw_pcie_setup_rc(pp); if (!dw_pcie_link_up(pci)) { /* Disable LTSSM state machine to enable configuration */ @@ -193,26 +207,6 @@ static void armada8k_pcie_establish_link(struct armada8k_pcie *pcie) PCIE_INT_C_ASSERT_MASK | PCIE_INT_D_ASSERT_MASK; dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_MASK1_REG, reg); - if (!dw_pcie_link_up(pci)) { - /* Configuration done. Start LTSSM */ - reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG); - reg |= PCIE_APP_LTSSM_EN; - dw_pcie_writel_dbi(pci, PCIE_GLOBAL_CONTROL_REG, reg); - } - - /* Wait until the link becomes active again */ - if (dw_pcie_wait_for_link(pci)) - dev_err(pci->dev, "Link not up after reconfiguration\n"); -} - -static int armada8k_pcie_host_init(struct pcie_port *pp) -{ - struct dw_pcie *pci = to_dw_pcie_from_pp(pp); - struct armada8k_pcie *pcie = to_armada8k_pcie(pci); - - dw_pcie_setup_rc(pp); - armada8k_pcie_establish_link(pcie); - return 0; } @@ -269,6 +263,7 @@ static int armada8k_add_pcie_port(struct armada8k_pcie *pcie, static const struct dw_pcie_ops dw_pcie_ops = { .link_up = armada8k_pcie_link_up, + .start_link = armada8k_pcie_start_link, }; static int armada8k_pcie_probe(struct platform_device *pdev) -- cgit v1.2.3 From b9ac0f9dc8ea4b91362694e82a1e66313a6c6dc6 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 5 Nov 2020 15:11:55 -0600 Subject: PCI: dwc: Move dw_pcie_setup_rc() to DWC common code All RC complex drivers must call dw_pcie_setup_rc(). The ordering of the call shouldn't be too important other than being after any RC resets. There's a few calls of dw_pcie_setup_rc() left as drivers implementing suspend/resume need it. Link: https://lore.kernel.org/r/20201105211159.1814485-13-robh@kernel.org Tested-by: Marek Szyprowski Signed-off-by: Rob Herring Signed-off-by: Lorenzo Pieralisi Acked-by: Jingoo Han Cc: Kishon Vijay Abraham I Cc: Lorenzo Pieralisi Cc: Bjorn Helgaas Cc: Kukjin Kim Cc: Krzysztof Kozlowski Cc: Richard Zhu Cc: Lucas Stach Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Murali Karicheri Cc: Minghuan Lian Cc: Mingkai Hu Cc: Roy Zang Cc: Yue Wang Cc: Kevin Hilman Cc: Neil Armstrong Cc: Jerome Brunet Cc: Martin Blumenstingl Cc: Thomas Petazzoni Cc: Jesper Nilsson Cc: Gustavo Pimentel Cc: Xiaowei Song Cc: Binghui Wang Cc: Andy Gross Cc: Bjorn Andersson Cc: Stanimir Varbanov Cc: Pratyush Anand Cc: Kunihiko Hayashi Cc: Masahiro Yamada Cc: linux-omap@vger.kernel.org Cc: linux-samsung-soc@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-amlogic@lists.infradead.org Cc: linux-arm-kernel@axis.com Cc: linux-arm-msm@vger.kernel.org --- drivers/pci/controller/dwc/pci-dra7xx.c | 1 - drivers/pci/controller/dwc/pci-exynos.c | 1 - drivers/pci/controller/dwc/pci-imx6.c | 1 - drivers/pci/controller/dwc/pci-keystone.c | 2 -- drivers/pci/controller/dwc/pci-layerscape.c | 2 -- drivers/pci/controller/dwc/pci-meson.c | 2 -- drivers/pci/controller/dwc/pcie-armada8k.c | 2 -- drivers/pci/controller/dwc/pcie-artpec6.c | 1 - drivers/pci/controller/dwc/pcie-designware-host.c | 1 + drivers/pci/controller/dwc/pcie-designware-plat.c | 8 -------- drivers/pci/controller/dwc/pcie-histb.c | 3 --- drivers/pci/controller/dwc/pcie-kirin.c | 2 -- drivers/pci/controller/dwc/pcie-qcom.c | 1 - drivers/pci/controller/dwc/pcie-spear13xx.c | 2 -- drivers/pci/controller/dwc/pcie-uniphier.c | 2 -- 15 files changed, 1 insertion(+), 30 deletions(-) (limited to 'drivers/pci/controller/dwc/pcie-armada8k.c') diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c index 72a5a2bf933b..b105af63854a 100644 --- a/drivers/pci/controller/dwc/pci-dra7xx.c +++ b/drivers/pci/controller/dwc/pci-dra7xx.c @@ -181,7 +181,6 @@ static int dra7xx_pcie_host_init(struct pcie_port *pp) struct dw_pcie *pci = to_dw_pcie_from_pp(pp); struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci); - dw_pcie_setup_rc(pp); dra7xx_pcie_enable_interrupts(dra7xx); return 0; diff --git a/drivers/pci/controller/dwc/pci-exynos.c b/drivers/pci/controller/dwc/pci-exynos.c index 3939fe22e8a2..5c10a5432896 100644 --- a/drivers/pci/controller/dwc/pci-exynos.c +++ b/drivers/pci/controller/dwc/pci-exynos.c @@ -372,7 +372,6 @@ static int exynos_pcie_host_init(struct pcie_port *pp) phy_init(ep->phy); exynos_pcie_deassert_core_reset(ep); - dw_pcie_setup_rc(pp); exynos_pcie_assert_reset(ep); exynos_pcie_enable_interrupts(ep); diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 9e30fbf4efbe..f9547bb2cf1b 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -834,7 +834,6 @@ static int imx6_pcie_host_init(struct pcie_port *pp) imx6_pcie_init_phy(imx6_pcie); imx6_pcie_deassert_core_reset(imx6_pcie); imx6_setup_phy_mpll(imx6_pcie); - dw_pcie_setup_rc(pp); return 0; } diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 90b222b020a3..5a4bcc2b1ddb 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -807,8 +807,6 @@ static int __init ks_pcie_host_init(struct pcie_port *pp) if (ret) return ret; - dw_pcie_setup_rc(pp); - ks_pcie_stop_link(pci); ks_pcie_setup_rc_app_regs(ks_pcie); writew(PCI_IO_RANGE_TYPE_32 | (PCI_IO_RANGE_TYPE_32 << 8), diff --git a/drivers/pci/controller/dwc/pci-layerscape.c b/drivers/pci/controller/dwc/pci-layerscape.c index 0d84986c4c16..400ebbebd00f 100644 --- a/drivers/pci/controller/dwc/pci-layerscape.c +++ b/drivers/pci/controller/dwc/pci-layerscape.c @@ -136,8 +136,6 @@ static int ls_pcie_host_init(struct pcie_port *pp) ls_pcie_drop_msg_tlp(pcie); - dw_pcie_setup_rc(pp); - return 0; } diff --git a/drivers/pci/controller/dwc/pci-meson.c b/drivers/pci/controller/dwc/pci-meson.c index 2df0adcf0bf2..04589f0decb2 100644 --- a/drivers/pci/controller/dwc/pci-meson.c +++ b/drivers/pci/controller/dwc/pci-meson.c @@ -380,8 +380,6 @@ static int meson_pcie_host_init(struct pcie_port *pp) meson_set_max_payload(mp, MAX_PAYLOAD_SIZE); meson_set_max_rd_req_size(mp, MAX_READ_REQ_SIZE); - dw_pcie_setup_rc(pp); - return 0; } diff --git a/drivers/pci/controller/dwc/pcie-armada8k.c b/drivers/pci/controller/dwc/pcie-armada8k.c index dd2926bbb901..4e2552dcf982 100644 --- a/drivers/pci/controller/dwc/pcie-armada8k.c +++ b/drivers/pci/controller/dwc/pcie-armada8k.c @@ -171,8 +171,6 @@ static int armada8k_pcie_host_init(struct pcie_port *pp) u32 reg; struct dw_pcie *pci = to_dw_pcie_from_pp(pp); - dw_pcie_setup_rc(pp); - if (!dw_pcie_link_up(pci)) { /* Disable LTSSM state machine to enable configuration */ reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG); diff --git a/drivers/pci/controller/dwc/pcie-artpec6.c b/drivers/pci/controller/dwc/pcie-artpec6.c index 7ee8f3c83f8f..fcba9915a606 100644 --- a/drivers/pci/controller/dwc/pcie-artpec6.c +++ b/drivers/pci/controller/dwc/pcie-artpec6.c @@ -328,7 +328,6 @@ static int artpec6_pcie_host_init(struct pcie_port *pp) artpec6_pcie_init_phy(artpec6_pcie); artpec6_pcie_deassert_core_reset(artpec6_pcie); artpec6_pcie_wait_for_phy(artpec6_pcie); - dw_pcie_setup_rc(pp); return 0; } diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index ebea2c814448..f2b0a15ad72b 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -422,6 +422,7 @@ int dw_pcie_host_init(struct pcie_port *pp) goto err_free_msi; } + dw_pcie_setup_rc(pp); dw_pcie_msi_init(pp); if (!dw_pcie_link_up(pci) && pci->ops->start_link) { diff --git a/drivers/pci/controller/dwc/pcie-designware-plat.c b/drivers/pci/controller/dwc/pcie-designware-plat.c index dec24e595c3e..9b397c807261 100644 --- a/drivers/pci/controller/dwc/pcie-designware-plat.c +++ b/drivers/pci/controller/dwc/pcie-designware-plat.c @@ -33,15 +33,7 @@ struct dw_plat_pcie_of_data { static const struct of_device_id dw_plat_pcie_of_match[]; -static int dw_plat_pcie_host_init(struct pcie_port *pp) -{ - dw_pcie_setup_rc(pp); - - return 0; -} - static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = { - .host_init = dw_plat_pcie_host_init, }; static int dw_plat_pcie_establish_link(struct dw_pcie *pci) diff --git a/drivers/pci/controller/dwc/pcie-histb.c b/drivers/pci/controller/dwc/pcie-histb.c index 210777c793ea..86f9d16c50d7 100644 --- a/drivers/pci/controller/dwc/pcie-histb.c +++ b/drivers/pci/controller/dwc/pcie-histb.c @@ -196,9 +196,6 @@ static int histb_pcie_host_init(struct pcie_port *pp) regval |= PCIE_WM_RC; histb_pcie_writel(hipcie, PCIE_SYS_CTRL0, regval); - /* setup root complex */ - dw_pcie_setup_rc(pp); - return 0; } diff --git a/drivers/pci/controller/dwc/pcie-kirin.c b/drivers/pci/controller/dwc/pcie-kirin.c index f84ac1b36b2c..ac4bbdaf5324 100644 --- a/drivers/pci/controller/dwc/pcie-kirin.c +++ b/drivers/pci/controller/dwc/pcie-kirin.c @@ -405,8 +405,6 @@ static int kirin_pcie_host_init(struct pcie_port *pp) { pp->bridge->ops = &kirin_pci_ops; - dw_pcie_setup_rc(pp); - return 0; } diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index eb107179d544..e49791c4f846 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1280,7 +1280,6 @@ static int qcom_pcie_host_init(struct pcie_port *pp) goto err_disable_phy; } - dw_pcie_setup_rc(pp); qcom_ep_reset_deassert(pcie); return 0; diff --git a/drivers/pci/controller/dwc/pcie-spear13xx.c b/drivers/pci/controller/dwc/pcie-spear13xx.c index 31475e4493a7..1a9e353bef55 100644 --- a/drivers/pci/controller/dwc/pcie-spear13xx.c +++ b/drivers/pci/controller/dwc/pcie-spear13xx.c @@ -130,8 +130,6 @@ static int spear13xx_pcie_host_init(struct pcie_port *pp) spear13xx_pcie->app_base = pci->dbi_base + 0x2000; - dw_pcie_setup_rc(pp); - /* * this controller support only 128 bytes read size, however its * default value in capability register is 512 bytes. So force diff --git a/drivers/pci/controller/dwc/pcie-uniphier.c b/drivers/pci/controller/dwc/pcie-uniphier.c index e6616408a29c..2457e9dd098d 100644 --- a/drivers/pci/controller/dwc/pcie-uniphier.c +++ b/drivers/pci/controller/dwc/pcie-uniphier.c @@ -314,8 +314,6 @@ static int uniphier_pcie_host_init(struct pcie_port *pp) uniphier_pcie_irq_enable(priv); - dw_pcie_setup_rc(pp); - return 0; } -- cgit v1.2.3