From 4a33bea003144e217d8a3ae666f171dfc2e97bd6 Mon Sep 17 00:00:00 2001 From: Anurag Kumar Vulisha Date: Mon, 29 Jun 2020 15:00:53 +0300 Subject: phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver Xilinx ZynqMP SoCs have a Gigabit Transceiver with four lanes. All the high speed peripherals such as USB, SATA, PCIE, Display Port and Ethernet SGMII can rely on any of the four GT lanes for PHY layer. This patch adds driver for that ZynqMP GT core. Signed-off-by: Anurag Kumar Vulisha Signed-off-by: Laurent Pinchart Link: https://lore.kernel.org/r/20200629120054.29338-3-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul --- drivers/phy/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/phy/Kconfig') diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index b3ed94b98d9b..de9362c25c07 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -70,5 +70,6 @@ source "drivers/phy/st/Kconfig" source "drivers/phy/tegra/Kconfig" source "drivers/phy/ti/Kconfig" source "drivers/phy/intel/Kconfig" +source "drivers/phy/xilinx/Kconfig" endmenu -- cgit v1.2.3