From 9e59c5f66c624b43c766a9fe3b2430e0e976bf0e Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Mon, 14 May 2018 11:29:38 +0800 Subject: soc: rockchip: power-domain: Fix wrong value when power up pd with writemask Solve the pd could only ever turn off but never turn them on again, if the pd registers have the writemask bits. So far this affects the rk3328 only. Fixes: 79bb17ce8edb ("soc: rockchip: power-domain: Support domain control in hiword-registers") Cc: stable@vger.kernel.org Signed-off-by: Finley Xiao Signed-off-by: Elaine Zhang Reviewed-by: Ulf Hansson Signed-off-by: Heiko Stuebner --- drivers/soc/rockchip/pm_domains.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/soc/rockchip') diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c index 53efc386b1ad..df7f30a425c6 100644 --- a/drivers/soc/rockchip/pm_domains.c +++ b/drivers/soc/rockchip/pm_domains.c @@ -255,7 +255,7 @@ static void rockchip_do_pmu_set_power_domain(struct rockchip_pm_domain *pd, return; else if (pd->info->pwr_w_mask) regmap_write(pmu->regmap, pmu->info->pwr_offset, - on ? pd->info->pwr_mask : + on ? pd->info->pwr_w_mask : (pd->info->pwr_mask | pd->info->pwr_w_mask)); else regmap_update_bits(pmu->regmap, pmu->info->pwr_offset, -- cgit v1.2.3 From 6f686e85eda6b03796cda4ea04fb8a429d69eb54 Mon Sep 17 00:00:00 2001 From: Caesar Wang Date: Wed, 23 May 2018 14:48:39 +0800 Subject: soc: rockchip: power-domain: add power domain support for rk3036 This driver is modified to support RK3036 SoC. Signed-off-by: Caesar Wang Signed-off-by: Elaine Zhang Reviewed-by: Ulf Hansson Signed-off-by: Heiko Stuebner --- drivers/soc/rockchip/pm_domains.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'drivers/soc/rockchip') diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c index df7f30a425c6..4a764241b4da 100644 --- a/drivers/soc/rockchip/pm_domains.c +++ b/drivers/soc/rockchip/pm_domains.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -103,6 +104,15 @@ struct rockchip_pmu { .active_wakeup = wakeup, \ } +#define DOMAIN_RK3036(req, ack, idle, wakeup) \ +{ \ + .req_mask = (req >= 0) ? BIT(req) : 0, \ + .req_w_mask = (req >= 0) ? BIT(req + 16) : 0, \ + .ack_mask = (ack >= 0) ? BIT(ack) : 0, \ + .idle_mask = (idle >= 0) ? BIT(idle) : 0, \ + .active_wakeup = wakeup, \ +} + #define DOMAIN_RK3288(pwr, status, req, wakeup) \ DOMAIN(pwr, status, req, req, (req) + 16, wakeup) @@ -701,6 +711,16 @@ err_out: return error; } +static const struct rockchip_domain_info rk3036_pm_domains[] = { + [RK3036_PD_MSCH] = DOMAIN_RK3036(14, 23, 30, true), + [RK3036_PD_CORE] = DOMAIN_RK3036(13, 17, 24, false), + [RK3036_PD_PERI] = DOMAIN_RK3036(12, 18, 25, false), + [RK3036_PD_VIO] = DOMAIN_RK3036(11, 19, 26, false), + [RK3036_PD_VPU] = DOMAIN_RK3036(10, 20, 27, false), + [RK3036_PD_GPU] = DOMAIN_RK3036(9, 21, 28, false), + [RK3036_PD_SYS] = DOMAIN_RK3036(8, 22, 29, false), +}; + static const struct rockchip_domain_info rk3288_pm_domains[] = { [RK3288_PD_VIO] = DOMAIN_RK3288(7, 7, 4, false), [RK3288_PD_HEVC] = DOMAIN_RK3288(14, 10, 9, false), @@ -768,6 +788,15 @@ static const struct rockchip_domain_info rk3399_pm_domains[] = { [RK3399_PD_SDIOAUDIO] = DOMAIN_RK3399(31, 31, 29, true), }; +static const struct rockchip_pmu_info rk3036_pmu = { + .req_offset = 0x148, + .idle_offset = 0x14c, + .ack_offset = 0x14c, + + .num_domains = ARRAY_SIZE(rk3036_pm_domains), + .domain_info = rk3036_pm_domains, +}; + static const struct rockchip_pmu_info rk3288_pmu = { .pwr_offset = 0x08, .status_offset = 0x0c, @@ -842,6 +871,10 @@ static const struct rockchip_pmu_info rk3399_pmu = { }; static const struct of_device_id rockchip_pm_domain_dt_match[] = { + { + .compatible = "rockchip,rk3036-power-controller", + .data = (void *)&rk3036_pmu, + }, { .compatible = "rockchip,rk3288-power-controller", .data = (void *)&rk3288_pmu, -- cgit v1.2.3 From 277535f7b63291bff94747b65990222d78c7f271 Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Wed, 23 May 2018 14:51:10 +0800 Subject: soc: rockchip: power-domain: add power domain support for rk3128 This driver is modified to support RK3128 SoC. Signed-off-by: Elaine Zhang Reviewed-by: Ulf Hansson Signed-off-by: Heiko Stuebner --- drivers/soc/rockchip/pm_domains.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'drivers/soc/rockchip') diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c index 4a764241b4da..d03468805c94 100644 --- a/drivers/soc/rockchip/pm_domains.c +++ b/drivers/soc/rockchip/pm_domains.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -721,6 +722,14 @@ static const struct rockchip_domain_info rk3036_pm_domains[] = { [RK3036_PD_SYS] = DOMAIN_RK3036(8, 22, 29, false), }; +static const struct rockchip_domain_info rk3128_pm_domains[] = { + [RK3128_PD_CORE] = DOMAIN_RK3288(0, 0, 4, false), + [RK3128_PD_MSCH] = DOMAIN_RK3288(-1, -1, 6, true), + [RK3128_PD_VIO] = DOMAIN_RK3288(3, 3, 2, false), + [RK3128_PD_VIDEO] = DOMAIN_RK3288(2, 2, 1, false), + [RK3128_PD_GPU] = DOMAIN_RK3288(1, 1, 3, false), +}; + static const struct rockchip_domain_info rk3288_pm_domains[] = { [RK3288_PD_VIO] = DOMAIN_RK3288(7, 7, 4, false), [RK3288_PD_HEVC] = DOMAIN_RK3288(14, 10, 9, false), @@ -797,6 +806,17 @@ static const struct rockchip_pmu_info rk3036_pmu = { .domain_info = rk3036_pm_domains, }; +static const struct rockchip_pmu_info rk3128_pmu = { + .pwr_offset = 0x04, + .status_offset = 0x08, + .req_offset = 0x0c, + .idle_offset = 0x10, + .ack_offset = 0x10, + + .num_domains = ARRAY_SIZE(rk3128_pm_domains), + .domain_info = rk3128_pm_domains, +}; + static const struct rockchip_pmu_info rk3288_pmu = { .pwr_offset = 0x08, .status_offset = 0x0c, @@ -875,6 +895,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = { .compatible = "rockchip,rk3036-power-controller", .data = (void *)&rk3036_pmu, }, + { + .compatible = "rockchip,rk3128-power-controller", + .data = (void *)&rk3128_pmu, + }, { .compatible = "rockchip,rk3288-power-controller", .data = (void *)&rk3288_pmu, -- cgit v1.2.3 From 2dacbd104636f3a864c4866067e555efb8ac8334 Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Wed, 23 May 2018 14:52:03 +0800 Subject: soc: rockchip: power-domain: add power domain support for rk3228 This driver is modified to support RK3228 SoC. Signed-off-by: Elaine Zhang Reviewed-by: Ulf Hansson Signed-off-by: Heiko Stuebner --- drivers/soc/rockchip/pm_domains.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'drivers/soc/rockchip') diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c index d03468805c94..36ded8396bb5 100644 --- a/drivers/soc/rockchip/pm_domains.c +++ b/drivers/soc/rockchip/pm_domains.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -730,6 +731,20 @@ static const struct rockchip_domain_info rk3128_pm_domains[] = { [RK3128_PD_GPU] = DOMAIN_RK3288(1, 1, 3, false), }; +static const struct rockchip_domain_info rk3228_pm_domains[] = { + [RK3228_PD_CORE] = DOMAIN_RK3036(0, 0, 16, true), + [RK3228_PD_MSCH] = DOMAIN_RK3036(1, 1, 17, true), + [RK3228_PD_BUS] = DOMAIN_RK3036(2, 2, 18, true), + [RK3228_PD_SYS] = DOMAIN_RK3036(3, 3, 19, true), + [RK3228_PD_VIO] = DOMAIN_RK3036(4, 4, 20, false), + [RK3228_PD_VOP] = DOMAIN_RK3036(5, 5, 21, false), + [RK3228_PD_VPU] = DOMAIN_RK3036(6, 6, 22, false), + [RK3228_PD_RKVDEC] = DOMAIN_RK3036(7, 7, 23, false), + [RK3228_PD_GPU] = DOMAIN_RK3036(8, 8, 24, false), + [RK3228_PD_PERI] = DOMAIN_RK3036(9, 9, 25, true), + [RK3228_PD_GMAC] = DOMAIN_RK3036(10, 10, 26, false), +}; + static const struct rockchip_domain_info rk3288_pm_domains[] = { [RK3288_PD_VIO] = DOMAIN_RK3288(7, 7, 4, false), [RK3288_PD_HEVC] = DOMAIN_RK3288(14, 10, 9, false), @@ -817,6 +832,15 @@ static const struct rockchip_pmu_info rk3128_pmu = { .domain_info = rk3128_pm_domains, }; +static const struct rockchip_pmu_info rk3228_pmu = { + .req_offset = 0x40c, + .idle_offset = 0x488, + .ack_offset = 0x488, + + .num_domains = ARRAY_SIZE(rk3228_pm_domains), + .domain_info = rk3228_pm_domains, +}; + static const struct rockchip_pmu_info rk3288_pmu = { .pwr_offset = 0x08, .status_offset = 0x0c, @@ -899,6 +923,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = { .compatible = "rockchip,rk3128-power-controller", .data = (void *)&rk3128_pmu, }, + { + .compatible = "rockchip,rk3228-power-controller", + .data = (void *)&rk3228_pmu, + }, { .compatible = "rockchip,rk3288-power-controller", .data = (void *)&rk3288_pmu, -- cgit v1.2.3 From 9bdf401bf49eddba98ae36f7243b888d43496bd6 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Wed, 23 May 2018 14:53:32 +0800 Subject: soc: rockchip: power-domain: add power domain support for px30 This driver is modified to support PX30 SoC. Signed-off-by: Finley Xiao Signed-off-by: Elaine Zhang Reviewed-by: Ulf Hansson Signed-off-by: Heiko Stuebner --- drivers/soc/rockchip/pm_domains.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'drivers/soc/rockchip') diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c index 36ded8396bb5..09a34e3a9375 100644 --- a/drivers/soc/rockchip/pm_domains.c +++ b/drivers/soc/rockchip/pm_domains.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -115,6 +116,9 @@ struct rockchip_pmu { .active_wakeup = wakeup, \ } +#define DOMAIN_PX30(pwr, status, req, wakeup) \ + DOMAIN_M(pwr, status, req, (req) + 16, req, wakeup) + #define DOMAIN_RK3288(pwr, status, req, wakeup) \ DOMAIN(pwr, status, req, req, (req) + 16, wakeup) @@ -713,6 +717,17 @@ err_out: return error; } +static const struct rockchip_domain_info px30_pm_domains[] = { + [PX30_PD_USB] = DOMAIN_PX30(5, 5, 10, false), + [PX30_PD_SDCARD] = DOMAIN_PX30(8, 8, 9, false), + [PX30_PD_GMAC] = DOMAIN_PX30(10, 10, 6, false), + [PX30_PD_MMC_NAND] = DOMAIN_PX30(11, 11, 5, false), + [PX30_PD_VPU] = DOMAIN_PX30(12, 12, 14, false), + [PX30_PD_VO] = DOMAIN_PX30(13, 13, 7, false), + [PX30_PD_VI] = DOMAIN_PX30(14, 14, 8, false), + [PX30_PD_GPU] = DOMAIN_PX30(15, 15, 2, false), +}; + static const struct rockchip_domain_info rk3036_pm_domains[] = { [RK3036_PD_MSCH] = DOMAIN_RK3036(14, 23, 30, true), [RK3036_PD_CORE] = DOMAIN_RK3036(13, 17, 24, false), @@ -812,6 +827,17 @@ static const struct rockchip_domain_info rk3399_pm_domains[] = { [RK3399_PD_SDIOAUDIO] = DOMAIN_RK3399(31, 31, 29, true), }; +static const struct rockchip_pmu_info px30_pmu = { + .pwr_offset = 0x18, + .status_offset = 0x20, + .req_offset = 0x64, + .idle_offset = 0x6c, + .ack_offset = 0x6c, + + .num_domains = ARRAY_SIZE(px30_pm_domains), + .domain_info = px30_pm_domains, +}; + static const struct rockchip_pmu_info rk3036_pmu = { .req_offset = 0x148, .idle_offset = 0x14c, @@ -915,6 +941,10 @@ static const struct rockchip_pmu_info rk3399_pmu = { }; static const struct of_device_id rockchip_pm_domain_dt_match[] = { + { + .compatible = "rockchip,px30-power-controller", + .data = (void *)&px30_pmu, + }, { .compatible = "rockchip,rk3036-power-controller", .data = (void *)&rk3036_pmu, -- cgit v1.2.3