From 2cb8cb144eef6b3175e95504eae7f385bdb35c69 Mon Sep 17 00:00:00 2001 From: Vivien Didelot Date: Mon, 12 Jun 2017 12:37:42 -0400 Subject: net: dsa: mv88e6xxx: prefix Port Egress Rate Control macros For implicit namespacing and clarity, prefix the common Port Egress Rate Control and Port Egress Rate Control 2 registers macros with MV88E6XXX_PORT_EGRESS_RATE_CTL1 and MV88E6XXX_PORT_EGRESS_RATE_CTL2. Document the register and prefer ordered hex masks values for all Marvell 16-bit registers. Signed-off-by: Vivien Didelot Signed-off-by: David S. Miller --- drivers/net/dsa/mv88e6xxx/chip.c | 3 ++- drivers/net/dsa/mv88e6xxx/port.c | 6 ++++-- drivers/net/dsa/mv88e6xxx/port.h | 8 ++++++-- 3 files changed, 12 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index efc57003b9ee..8146c94e394d 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -1897,7 +1897,8 @@ static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port) return err; /* Egress rate control 2: disable egress rate control. */ - err = mv88e6xxx_port_write(chip, port, PORT_RATE_CONTROL_2, 0x0000); + err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_EGRESS_RATE_CTL2, + 0x0000); if (err) return err; diff --git a/drivers/net/dsa/mv88e6xxx/port.c b/drivers/net/dsa/mv88e6xxx/port.c index ad86b2e30ac5..595f842c955b 100644 --- a/drivers/net/dsa/mv88e6xxx/port.c +++ b/drivers/net/dsa/mv88e6xxx/port.c @@ -859,12 +859,14 @@ int mv88e6165_port_set_jumbo_size(struct mv88e6xxx_chip *chip, int port, int mv88e6095_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port) { - return mv88e6xxx_port_write(chip, port, PORT_RATE_CONTROL, 0x0000); + return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_EGRESS_RATE_CTL1, + 0x0000); } int mv88e6097_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port) { - return mv88e6xxx_port_write(chip, port, PORT_RATE_CONTROL, 0x0001); + return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_EGRESS_RATE_CTL1, + 0x0001); } /* Offset 0x0C: Port ATU Control */ diff --git a/drivers/net/dsa/mv88e6xxx/port.h b/drivers/net/dsa/mv88e6xxx/port.h index ce236f06db6d..5bcba657a111 100644 --- a/drivers/net/dsa/mv88e6xxx/port.h +++ b/drivers/net/dsa/mv88e6xxx/port.h @@ -177,8 +177,12 @@ #define MV88E6XXX_PORT_CTL2_INGRESS_MONITOR 0x0010 #define MV88E6095_PORT_CTL2_CPU_PORT_MASK 0x000f -#define PORT_RATE_CONTROL 0x09 -#define PORT_RATE_CONTROL_2 0x0a +/* Offset 0x09: Egress Rate Control */ +#define MV88E6XXX_PORT_EGRESS_RATE_CTL1 0x09 + +/* Offset 0x0A: Egress Rate Control 2 */ +#define MV88E6XXX_PORT_EGRESS_RATE_CTL2 0x0a + #define PORT_ASSOC_VECTOR 0x0b #define PORT_ASSOC_VECTOR_HOLD_AT_1 BIT(15) #define PORT_ASSOC_VECTOR_INT_AGE_OUT BIT(14) -- cgit v1.2.3