From 189cfa849d22c6ec39e7fac8d573075b35f865a2 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Tue, 31 Jan 2023 10:53:40 +0100 Subject: firmware: imx: scu: use dev_err_probe This simplifies the code and silences -517 error messages. Also the reason is listed in /sys/kernel/debug/devices_deferred. Signed-off-by: Alexander Stein Reviewed-by: Mukesh Ojha Signed-off-by: Shawn Guo --- drivers/firmware/imx/imx-scu.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/firmware/imx/imx-scu.c b/drivers/firmware/imx/imx-scu.c index dca79caccd01..47db49911e7b 100644 --- a/drivers/firmware/imx/imx-scu.c +++ b/drivers/firmware/imx/imx-scu.c @@ -310,9 +310,8 @@ static int imx_scu_probe(struct platform_device *pdev) sc_chan->ch = mbox_request_channel_byname(cl, chan_name); if (IS_ERR(sc_chan->ch)) { ret = PTR_ERR(sc_chan->ch); - if (ret != -EPROBE_DEFER) - dev_err(dev, "Failed to request mbox chan %s ret %d\n", - chan_name, ret); + dev_err_probe(dev, ret, "Failed to request mbox chan %s\n", + chan_name); kfree(chan_name); return ret; } -- cgit v1.2.3 From 2a88e4792c6df4b6a93f2bdb1eaf0df7408bd40d Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 1 Feb 2023 15:58:54 -0600 Subject: bus: imx-weim: Remove open coded "ranges" parsing "ranges" is a standard property and we have common helper functions for parsing it, so let's use them. Signed-off-by: Rob Herring Signed-off-by: Shawn Guo --- drivers/bus/imx-weim.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/bus/imx-weim.c b/drivers/bus/imx-weim.c index 2a6b4f676458..a8fd41e8114e 100644 --- a/drivers/bus/imx-weim.c +++ b/drivers/bus/imx-weim.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -86,8 +87,8 @@ MODULE_DEVICE_TABLE(of, weim_id_table); static int imx_weim_gpr_setup(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; - struct property *prop; - const __be32 *p; + struct of_range_parser parser; + struct of_range range; struct regmap *gpr; u32 gprvals[4] = { 05, /* CS0(128M) CS1(0M) CS2(0M) CS3(0M) */ @@ -106,13 +107,13 @@ static int imx_weim_gpr_setup(struct platform_device *pdev) return 0; } - of_property_for_each_u32(np, "ranges", prop, p, val) { - if (i % 4 == 0) { - cs = val; - } else if (i % 4 == 3 && val) { - val = (val / SZ_32M) | 1; - gprval |= val << cs * 3; - } + if (of_range_parser_init(&parser, np)) + goto err; + + for_each_of_range(&parser, &range) { + cs = range.bus_addr >> 32; + val = (range.size / SZ_32M) | 1; + gprval |= val << cs * 3; i++; } -- cgit v1.2.3 From 300bd129f93ffc4dccb591cdd5aef378f0461467 Mon Sep 17 00:00:00 2001 From: Clark Wang Date: Wed, 8 Feb 2023 07:56:35 +0100 Subject: firmware: imx: scu-pd: add missed lvds lpi2c and pwm power domains LVDS' lpi2c and pwm power domains definitions are missed. Add them here. Signed-off-by: Clark Wang Reviewed-by: Frank Li Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- drivers/firmware/imx/scu-pd.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers') diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c index 2a4f07423365..84b673427073 100644 --- a/drivers/firmware/imx/scu-pd.c +++ b/drivers/firmware/imx/scu-pd.c @@ -180,7 +180,11 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { /* LVDS SS */ { "lvds0", IMX_SC_R_LVDS_0, 1, false, 0 }, + { "lvds0-pwm", IMX_SC_R_LVDS_0_PWM_0, 1, false, 0 }, + { "lvds0-lpi2c", IMX_SC_R_LVDS_0_I2C_0, 2, true, 0 }, { "lvds1", IMX_SC_R_LVDS_1, 1, false, 0 }, + { "lvds1-pwm", IMX_SC_R_LVDS_1_PWM_0, 1, false, 0 }, + { "lvds1-lpi2c", IMX_SC_R_LVDS_1_I2C_0, 2, true, 0 }, /* DC SS */ { "dc0", IMX_SC_R_DC_0, 1, false, 0 }, -- cgit v1.2.3 From 9f195f3a1e696b6576988c1e58fa7389beae3351 Mon Sep 17 00:00:00 2001 From: Roger Lu Date: Thu, 2 Feb 2023 20:41:02 +0800 Subject: soc: mediatek: mtk-svs: use svs get efuse common function SVS might need to read both svs efuse and thermal efuse on the probe flow. Therefore, add a common efuse read function to remove the superfluous codes. Signed-off-by: Roger Lu Link: https://lore.kernel.org/r/20230202124104.16504-2-roger.lu@mediatek.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-svs.c | 71 +++++++++++++++--------------------------- 1 file changed, 25 insertions(+), 46 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index f26eb2f637d5..c9899f5df60a 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -1729,26 +1729,28 @@ static int svs_bank_resource_setup(struct svs_platform *svsp) return 0; } -static int svs_thermal_efuse_get_data(struct svs_platform *svsp) +static int svs_get_efuse_data(struct svs_platform *svsp, + const char *nvmem_cell_name, + u32 **svsp_efuse, size_t *svsp_efuse_max) { struct nvmem_cell *cell; - /* Thermal efuse parsing */ - cell = nvmem_cell_get(svsp->dev, "t-calibration-data"); + cell = nvmem_cell_get(svsp->dev, nvmem_cell_name); if (IS_ERR_OR_NULL(cell)) { - dev_err(svsp->dev, "no \"t-calibration-data\"? %ld\n", PTR_ERR(cell)); + dev_err(svsp->dev, "no \"%s\"? %ld\n", + nvmem_cell_name, PTR_ERR(cell)); return PTR_ERR(cell); } - svsp->tefuse = nvmem_cell_read(cell, &svsp->tefuse_max); - if (IS_ERR(svsp->tefuse)) { - dev_err(svsp->dev, "cannot read thermal efuse: %ld\n", - PTR_ERR(svsp->tefuse)); + *svsp_efuse = nvmem_cell_read(cell, svsp_efuse_max); + if (IS_ERR(*svsp_efuse)) { + dev_err(svsp->dev, "cannot read \"%s\" efuse: %ld\n", + nvmem_cell_name, PTR_ERR(*svsp_efuse)); nvmem_cell_put(cell); - return PTR_ERR(svsp->tefuse); + return PTR_ERR(*svsp_efuse); } - svsp->tefuse_max /= sizeof(u32); + *svsp_efuse_max /= sizeof(u32); nvmem_cell_put(cell); return 0; @@ -1796,7 +1798,8 @@ static bool svs_mt8192_efuse_parsing(struct svs_platform *svsp) svsb->vmax += svsb->dvt_fixed; } - ret = svs_thermal_efuse_get_data(svsp); + ret = svs_get_efuse_data(svsp, "t-calibration-data", + &svsp->tefuse, &svsp->tefuse_max); if (ret) return false; @@ -1901,7 +1904,8 @@ static bool svs_mt8183_efuse_parsing(struct svs_platform *svsp) } } - ret = svs_thermal_efuse_get_data(svsp); + ret = svs_get_efuse_data(svsp, "t-calibration-data", + &svsp->tefuse, &svsp->tefuse_max); if (ret) return false; @@ -2003,32 +2007,6 @@ remove_mt8183_svsb_mon_mode: return true; } -static bool svs_is_efuse_data_correct(struct svs_platform *svsp) -{ - struct nvmem_cell *cell; - - /* Get svs efuse by nvmem */ - cell = nvmem_cell_get(svsp->dev, "svs-calibration-data"); - if (IS_ERR(cell)) { - dev_err(svsp->dev, "no \"svs-calibration-data\"? %ld\n", - PTR_ERR(cell)); - return false; - } - - svsp->efuse = nvmem_cell_read(cell, &svsp->efuse_max); - if (IS_ERR(svsp->efuse)) { - dev_err(svsp->dev, "cannot read svs efuse: %ld\n", - PTR_ERR(svsp->efuse)); - nvmem_cell_put(cell); - return false; - } - - svsp->efuse_max /= sizeof(u32); - nvmem_cell_put(cell); - - return true; -} - static struct device *svs_get_subsys_device(struct svs_platform *svsp, const char *node_name) { @@ -2364,8 +2342,9 @@ static int svs_probe(struct platform_device *pdev) if (ret) return ret; - if (!svs_is_efuse_data_correct(svsp)) { - dev_notice(svsp->dev, "efuse data isn't correct\n"); + ret = svs_get_efuse_data(svsp, "svs-calibration-data", + &svsp->efuse, &svsp->efuse_max); + if (ret) { ret = -EPERM; goto svs_probe_free_efuse; } @@ -2373,19 +2352,19 @@ static int svs_probe(struct platform_device *pdev) if (!svsp_data->efuse_parsing(svsp)) { dev_err(svsp->dev, "efuse data parsing failed\n"); ret = -EPERM; - goto svs_probe_free_resource; + goto svs_probe_free_tefuse; } ret = svs_bank_resource_setup(svsp); if (ret) { dev_err(svsp->dev, "svs bank resource setup fail: %d\n", ret); - goto svs_probe_free_resource; + goto svs_probe_free_tefuse; } svsp_irq = platform_get_irq(pdev, 0); if (svsp_irq < 0) { ret = svsp_irq; - goto svs_probe_free_resource; + goto svs_probe_free_tefuse; } svsp->main_clk = devm_clk_get(svsp->dev, "main"); @@ -2393,13 +2372,13 @@ static int svs_probe(struct platform_device *pdev) dev_err(svsp->dev, "failed to get clock: %ld\n", PTR_ERR(svsp->main_clk)); ret = PTR_ERR(svsp->main_clk); - goto svs_probe_free_resource; + goto svs_probe_free_tefuse; } ret = clk_prepare_enable(svsp->main_clk); if (ret) { dev_err(svsp->dev, "cannot enable main clk: %d\n", ret); - goto svs_probe_free_resource; + goto svs_probe_free_tefuse; } svsp->base = of_iomap(svsp->dev->of_node, 0); @@ -2439,7 +2418,7 @@ svs_probe_iounmap: svs_probe_clk_disable: clk_disable_unprepare(svsp->main_clk); -svs_probe_free_resource: +svs_probe_free_tefuse: if (!IS_ERR_OR_NULL(svsp->tefuse)) kfree(svsp->tefuse); -- cgit v1.2.3 From 5061c47ebf6edaf024fed1eaf63499fe7183c54e Mon Sep 17 00:00:00 2001 From: Roger Lu Date: Thu, 2 Feb 2023 20:41:03 +0800 Subject: soc: mediatek: mtk-svs: use common function to disable restore voltages The timing of disabling SVS bank and restore default voltage is more than one place. Therefore, add a common function to use for removing the superfluous codes. Signed-off-by: Roger Lu Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230202124104.16504-3-roger.lu@mediatek.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-svs.c | 54 +++++++++++++++++------------------------- 1 file changed, 22 insertions(+), 32 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index c9899f5df60a..299f580847bd 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -624,6 +624,25 @@ unlock_mutex: return ret; } +static void svs_bank_disable_and_restore_default_volts(struct svs_platform *svsp, + struct svs_bank *svsb) +{ + unsigned long flags; + + if (svsb->mode_support == SVSB_MODE_ALL_DISABLE) + return; + + spin_lock_irqsave(&svs_lock, flags); + svsp->pbank = svsb; + svs_switch_bank(svsp); + svs_writel_relaxed(svsp, SVSB_PTPEN_OFF, SVSEN); + svs_writel_relaxed(svsp, SVSB_INTSTS_VAL_CLEAN, INTSTS); + spin_unlock_irqrestore(&svs_lock, flags); + + svsb->phase = SVSB_PHASE_ERROR; + svs_adjust_pm_opp_volts(svsb); +} + #ifdef CONFIG_DEBUG_FS static int svs_dump_debug_show(struct seq_file *m, void *p) { @@ -700,7 +719,6 @@ static ssize_t svs_enable_debug_write(struct file *filp, { struct svs_bank *svsb = file_inode(filp)->i_private; struct svs_platform *svsp = dev_get_drvdata(svsb->dev); - unsigned long flags; int enabled, ret; char *buf = NULL; @@ -716,16 +734,8 @@ static ssize_t svs_enable_debug_write(struct file *filp, return ret; if (!enabled) { - spin_lock_irqsave(&svs_lock, flags); - svsp->pbank = svsb; + svs_bank_disable_and_restore_default_volts(svsp, svsb); svsb->mode_support = SVSB_MODE_ALL_DISABLE; - svs_switch_bank(svsp); - svs_writel_relaxed(svsp, SVSB_PTPEN_OFF, SVSEN); - svs_writel_relaxed(svsp, SVSB_INTSTS_VAL_CLEAN, INTSTS); - spin_unlock_irqrestore(&svs_lock, flags); - - svsb->phase = SVSB_PHASE_ERROR; - svs_adjust_pm_opp_volts(svsb); } kfree(buf); @@ -1508,16 +1518,7 @@ static int svs_init02(struct svs_platform *svsp) out_of_init02: for (idx = 0; idx < svsp->bank_max; idx++) { svsb = &svsp->banks[idx]; - - spin_lock_irqsave(&svs_lock, flags); - svsp->pbank = svsb; - svs_switch_bank(svsp); - svs_writel_relaxed(svsp, SVSB_PTPEN_OFF, SVSEN); - svs_writel_relaxed(svsp, SVSB_INTSTS_VAL_CLEAN, INTSTS); - spin_unlock_irqrestore(&svs_lock, flags); - - svsb->phase = SVSB_PHASE_ERROR; - svs_adjust_pm_opp_volts(svsb); + svs_bank_disable_and_restore_default_volts(svsp, svsb); } return ret; @@ -1563,23 +1564,12 @@ static int svs_suspend(struct device *dev) { struct svs_platform *svsp = dev_get_drvdata(dev); struct svs_bank *svsb; - unsigned long flags; int ret; u32 idx; for (idx = 0; idx < svsp->bank_max; idx++) { svsb = &svsp->banks[idx]; - - /* This might wait for svs_isr() process */ - spin_lock_irqsave(&svs_lock, flags); - svsp->pbank = svsb; - svs_switch_bank(svsp); - svs_writel_relaxed(svsp, SVSB_PTPEN_OFF, SVSEN); - svs_writel_relaxed(svsp, SVSB_INTSTS_VAL_CLEAN, INTSTS); - spin_unlock_irqrestore(&svs_lock, flags); - - svsb->phase = SVSB_PHASE_ERROR; - svs_adjust_pm_opp_volts(svsb); + svs_bank_disable_and_restore_default_volts(svsp, svsb); } ret = reset_control_assert(svsp->rst); -- cgit v1.2.3 From dd4f373ef94bd186e18a7366adfb7b98bc31b786 Mon Sep 17 00:00:00 2001 From: "Roy-CW.Yeh" Date: Mon, 6 Feb 2023 17:11:07 +0800 Subject: soc: mediatek: mmsys: add config api for RSZ switching and DCM Due to MT8195 HW design, some RSZs have additional settings that need to be configured in MMSYS. Signed-off-by: Roy-CW.Yeh Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Change-Id: I41978bf14951221c88abbe70d8c24cb0770e11e3 Link: https://lore.kernel.org/r/20230206091109.1324-5-moudy.ho@mediatek.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mt8195-mmsys.h | 13 ++++++++++ drivers/soc/mediatek/mtk-mmsys.c | 44 ++++++++++++++++++++++++++++++++++ include/linux/soc/mediatek/mtk-mmsys.h | 6 +++++ 3 files changed, 63 insertions(+) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mt8195-mmsys.h b/drivers/soc/mediatek/mt8195-mmsys.h index a6652ae63431..9be2df2832a4 100644 --- a/drivers/soc/mediatek/mt8195-mmsys.h +++ b/drivers/soc/mediatek/mt8195-mmsys.h @@ -146,6 +146,19 @@ #define MT8195_VDO1_MIXER_SOUT_SEL_IN 0xf68 #define MT8195_MIXER_SOUT_SEL_IN_FROM_DISP_MIXER 0 +/* VPPSYS1 */ +#define MT8195_VPP1_HW_DCM_1ST_DIS0 0x150 +#define MT8195_VPP1_HW_DCM_1ST_DIS1 0x160 +#define MT8195_VPP1_HW_DCM_2ND_DIS0 0x1a0 +#define MT8195_VPP1_HW_DCM_2ND_DIS1 0x1b0 +#define MT8195_SVPP2_BUF_BF_RSZ_SWITCH 0xf48 +#define MT8195_SVPP3_BUF_BF_RSZ_SWITCH 0xf74 + +/* VPPSYS1 HW DCM client*/ +#define MT8195_SVPP1_MDP_RSZ BIT(25) +#define MT8195_SVPP2_MDP_RSZ BIT(4) +#define MT8195_SVPP3_MDP_RSZ BIT(5) + static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] = { { DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0, diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index eb4c7e57896c..fd2b37d451c8 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -242,6 +242,50 @@ void mtk_mmsys_ddp_dpi_fmt_config(struct device *dev, u32 val) } EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_dpi_fmt_config); +void mtk_mmsys_vpp_rsz_merge_config(struct device *dev, u32 id, bool enable, + struct cmdq_pkt *cmdq_pkt) +{ + u32 reg; + + switch (id) { + case 2: + reg = MT8195_SVPP2_BUF_BF_RSZ_SWITCH; + break; + case 3: + reg = MT8195_SVPP3_BUF_BF_RSZ_SWITCH; + break; + default: + dev_err(dev, "Invalid id %d\n", id); + return; + } + + mtk_mmsys_update_bits(dev_get_drvdata(dev), reg, ~0, enable, cmdq_pkt); +} +EXPORT_SYMBOL_GPL(mtk_mmsys_vpp_rsz_merge_config); + +void mtk_mmsys_vpp_rsz_dcm_config(struct device *dev, bool enable, + struct cmdq_pkt *cmdq_pkt) +{ + u32 client; + + client = MT8195_SVPP1_MDP_RSZ; + mtk_mmsys_update_bits(dev_get_drvdata(dev), + MT8195_VPP1_HW_DCM_1ST_DIS0, client, + ((enable) ? client : 0), cmdq_pkt); + mtk_mmsys_update_bits(dev_get_drvdata(dev), + MT8195_VPP1_HW_DCM_2ND_DIS0, client, + ((enable) ? client : 0), cmdq_pkt); + + client = MT8195_SVPP2_MDP_RSZ | MT8195_SVPP3_MDP_RSZ; + mtk_mmsys_update_bits(dev_get_drvdata(dev), + MT8195_VPP1_HW_DCM_1ST_DIS1, client, + ((enable) ? client : 0), cmdq_pkt); + mtk_mmsys_update_bits(dev_get_drvdata(dev), + MT8195_VPP1_HW_DCM_2ND_DIS1, client, + ((enable) ? client : 0), cmdq_pkt); +} +EXPORT_SYMBOL_GPL(mtk_mmsys_vpp_rsz_dcm_config); + static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned long id, bool assert) { diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h index dc2963a0a0f7..37544ea6286d 100644 --- a/include/linux/soc/mediatek/mtk-mmsys.h +++ b/include/linux/soc/mediatek/mtk-mmsys.h @@ -99,4 +99,10 @@ void mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool alpha_sel, u16 void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx, bool channel_swap, struct cmdq_pkt *cmdq_pkt); +void mtk_mmsys_vpp_rsz_merge_config(struct device *dev, u32 id, bool enable, + struct cmdq_pkt *cmdq_pkt); + +void mtk_mmsys_vpp_rsz_dcm_config(struct device *dev, bool enable, + struct cmdq_pkt *cmdq_pkt); + #endif /* __MTK_MMSYS_H */ -- cgit v1.2.3 From c54d2b99c62ff6e371ce4a9ca925be22ed190de3 Mon Sep 17 00:00:00 2001 From: "Roy-CW.Yeh" Date: Mon, 6 Feb 2023 17:11:08 +0800 Subject: soc: mediatek: mutex: Add mtk_mutex_set_mod support to set MOD1 Add mtk_mutex_set_mod support to set MOD1 Signed-off-by: Roy-CW.Yeh Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20230206091109.1324-6-moudy.ho@mediatek.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-mutex.c | 33 ++++++++++++++++++++++++++------- 1 file changed, 26 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index c5b1b42303ac..a8d5fc3df5f0 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -23,6 +23,7 @@ #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) #define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n)) #define DISP_REG_MUTEX_MOD(mutex_mod_reg, n) (mutex_mod_reg + 0x20 * (n)) +#define DISP_REG_MUTEX_MOD1(mutex_mod_reg, n) ((mutex_mod_reg) + 0x20 * (n) + 0x4) #define DISP_REG_MUTEX_SOF(mutex_sof_reg, n) (mutex_sof_reg + 0x20 * (n)) #define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n)) @@ -828,7 +829,7 @@ int mtk_mutex_write_mod(struct mtk_mutex *mutex, struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, mutex[mutex->id]); unsigned int reg; - unsigned int offset; + u32 reg_offset, id_offset = 0; WARN_ON(&mtx->mutex[mutex->id] != mutex); @@ -838,16 +839,34 @@ int mtk_mutex_write_mod(struct mtk_mutex *mutex, return -EINVAL; } - offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg, - mutex->id); - reg = readl_relaxed(mtx->regs + offset); + /* + * Some SoCs may have multiple MUTEX_MOD registers as more than 32 mods + * are present, hence requiring multiple 32-bits registers. + * + * The mutex_table_mod fully represents that by defining the number of + * the mod sequentially, later used as a bit number, which can be more + * than 0..31. + * + * In order to retain compatibility with older SoCs, we perform R/W on + * the single 32 bits registers, but this requires us to translate the + * mutex ID bit accordingly. + */ + if (mtx->data->mutex_table_mod[idx] < 32) { + reg_offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg, + mutex->id); + } else { + reg_offset = DISP_REG_MUTEX_MOD1(mtx->data->mutex_mod_reg, + mutex->id); + id_offset = 32; + } + reg = readl_relaxed(mtx->regs + reg_offset); if (clear) - reg &= ~BIT(mtx->data->mutex_table_mod[idx]); + reg &= ~BIT(mtx->data->mutex_table_mod[idx] - id_offset); else - reg |= BIT(mtx->data->mutex_table_mod[idx]); + reg |= BIT(mtx->data->mutex_table_mod[idx] - id_offset); - writel_relaxed(reg, mtx->regs + offset); + writel_relaxed(reg, mtx->regs + reg_offset); return 0; } -- cgit v1.2.3 From 549053b69c54aecc6f44ddefe6c245a35f162cf4 Mon Sep 17 00:00:00 2001 From: "Roy-CW.Yeh" Date: Mon, 6 Feb 2023 17:11:09 +0800 Subject: soc: mediatek: mutex: support MT8195 VPPSYS Add MT8195 VPPSYS0 and VPPSYS1 mutex info to driver data Signed-off-by: Roy-CW.Yeh Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Change-Id: Ie371dc9dcf35ea308d9460acd60fb9c3d6475deb Link: https://lore.kernel.org/r/20230206091109.1324-7-moudy.ho@mediatek.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-mutex.c | 102 +++++++++++++++++++++++++++++++++ include/linux/soc/mediatek/mtk-mutex.h | 35 +++++++++++ 2 files changed, 137 insertions(+) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index a8d5fc3df5f0..7751527fc30d 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -164,6 +164,53 @@ #define MT8195_MUTEX_MOD_DISP1_DPI1 26 #define MT8195_MUTEX_MOD_DISP1_DP_INTF0 27 +/* VPPSYS0 */ +#define MT8195_MUTEX_MOD_MDP_RDMA0 0 +#define MT8195_MUTEX_MOD_MDP_FG0 1 +#define MT8195_MUTEX_MOD_MDP_STITCH0 2 +#define MT8195_MUTEX_MOD_MDP_HDR0 3 +#define MT8195_MUTEX_MOD_MDP_AAL0 4 +#define MT8195_MUTEX_MOD_MDP_RSZ0 5 +#define MT8195_MUTEX_MOD_MDP_TDSHP0 6 +#define MT8195_MUTEX_MOD_MDP_COLOR0 7 +#define MT8195_MUTEX_MOD_MDP_OVL0 8 +#define MT8195_MUTEX_MOD_MDP_PAD0 9 +#define MT8195_MUTEX_MOD_MDP_TCC0 10 +#define MT8195_MUTEX_MOD_MDP_WROT0 11 + +/* VPPSYS1 */ +#define MT8195_MUTEX_MOD_MDP_TCC1 3 +#define MT8195_MUTEX_MOD_MDP_RDMA1 4 +#define MT8195_MUTEX_MOD_MDP_RDMA2 5 +#define MT8195_MUTEX_MOD_MDP_RDMA3 6 +#define MT8195_MUTEX_MOD_MDP_FG1 7 +#define MT8195_MUTEX_MOD_MDP_FG2 8 +#define MT8195_MUTEX_MOD_MDP_FG3 9 +#define MT8195_MUTEX_MOD_MDP_HDR1 10 +#define MT8195_MUTEX_MOD_MDP_HDR2 11 +#define MT8195_MUTEX_MOD_MDP_HDR3 12 +#define MT8195_MUTEX_MOD_MDP_AAL1 13 +#define MT8195_MUTEX_MOD_MDP_AAL2 14 +#define MT8195_MUTEX_MOD_MDP_AAL3 15 +#define MT8195_MUTEX_MOD_MDP_RSZ1 16 +#define MT8195_MUTEX_MOD_MDP_RSZ2 17 +#define MT8195_MUTEX_MOD_MDP_RSZ3 18 +#define MT8195_MUTEX_MOD_MDP_TDSHP1 19 +#define MT8195_MUTEX_MOD_MDP_TDSHP2 20 +#define MT8195_MUTEX_MOD_MDP_TDSHP3 21 +#define MT8195_MUTEX_MOD_MDP_MERGE2 22 +#define MT8195_MUTEX_MOD_MDP_MERGE3 23 +#define MT8195_MUTEX_MOD_MDP_COLOR1 24 +#define MT8195_MUTEX_MOD_MDP_COLOR2 25 +#define MT8195_MUTEX_MOD_MDP_COLOR3 26 +#define MT8195_MUTEX_MOD_MDP_OVL1 27 +#define MT8195_MUTEX_MOD_MDP_PAD1 28 +#define MT8195_MUTEX_MOD_MDP_PAD2 29 +#define MT8195_MUTEX_MOD_MDP_PAD3 30 +#define MT8195_MUTEX_MOD_MDP_WROT1 31 +#define MT8195_MUTEX_MOD_MDP_WROT2 32 +#define MT8195_MUTEX_MOD_MDP_WROT3 33 + #define MT8365_MUTEX_MOD_DISP_OVL0 7 #define MT8365_MUTEX_MOD_DISP_OVL0_2L 8 #define MT8365_MUTEX_MOD_DISP_RDMA0 9 @@ -444,6 +491,52 @@ static const unsigned int mt8195_mutex_mod[DDP_COMPONENT_ID_MAX] = { [DDP_COMPONENT_DP_INTF1] = MT8195_MUTEX_MOD_DISP1_DP_INTF0, }; +static const unsigned int mt8195_mutex_table_mod[MUTEX_MOD_IDX_MAX] = { + [MUTEX_MOD_IDX_MDP_RDMA0] = MT8195_MUTEX_MOD_MDP_RDMA0, + [MUTEX_MOD_IDX_MDP_RDMA1] = MT8195_MUTEX_MOD_MDP_RDMA1, + [MUTEX_MOD_IDX_MDP_RDMA2] = MT8195_MUTEX_MOD_MDP_RDMA2, + [MUTEX_MOD_IDX_MDP_RDMA3] = MT8195_MUTEX_MOD_MDP_RDMA3, + [MUTEX_MOD_IDX_MDP_STITCH0] = MT8195_MUTEX_MOD_MDP_STITCH0, + [MUTEX_MOD_IDX_MDP_FG0] = MT8195_MUTEX_MOD_MDP_FG0, + [MUTEX_MOD_IDX_MDP_FG1] = MT8195_MUTEX_MOD_MDP_FG1, + [MUTEX_MOD_IDX_MDP_FG2] = MT8195_MUTEX_MOD_MDP_FG2, + [MUTEX_MOD_IDX_MDP_FG3] = MT8195_MUTEX_MOD_MDP_FG3, + [MUTEX_MOD_IDX_MDP_HDR0] = MT8195_MUTEX_MOD_MDP_HDR0, + [MUTEX_MOD_IDX_MDP_HDR1] = MT8195_MUTEX_MOD_MDP_HDR1, + [MUTEX_MOD_IDX_MDP_HDR2] = MT8195_MUTEX_MOD_MDP_HDR2, + [MUTEX_MOD_IDX_MDP_HDR3] = MT8195_MUTEX_MOD_MDP_HDR3, + [MUTEX_MOD_IDX_MDP_AAL0] = MT8195_MUTEX_MOD_MDP_AAL0, + [MUTEX_MOD_IDX_MDP_AAL1] = MT8195_MUTEX_MOD_MDP_AAL1, + [MUTEX_MOD_IDX_MDP_AAL2] = MT8195_MUTEX_MOD_MDP_AAL2, + [MUTEX_MOD_IDX_MDP_AAL3] = MT8195_MUTEX_MOD_MDP_AAL3, + [MUTEX_MOD_IDX_MDP_RSZ0] = MT8195_MUTEX_MOD_MDP_RSZ0, + [MUTEX_MOD_IDX_MDP_RSZ1] = MT8195_MUTEX_MOD_MDP_RSZ1, + [MUTEX_MOD_IDX_MDP_RSZ2] = MT8195_MUTEX_MOD_MDP_RSZ2, + [MUTEX_MOD_IDX_MDP_RSZ3] = MT8195_MUTEX_MOD_MDP_RSZ3, + [MUTEX_MOD_IDX_MDP_MERGE2] = MT8195_MUTEX_MOD_MDP_MERGE2, + [MUTEX_MOD_IDX_MDP_MERGE3] = MT8195_MUTEX_MOD_MDP_MERGE3, + [MUTEX_MOD_IDX_MDP_TDSHP0] = MT8195_MUTEX_MOD_MDP_TDSHP0, + [MUTEX_MOD_IDX_MDP_TDSHP1] = MT8195_MUTEX_MOD_MDP_TDSHP1, + [MUTEX_MOD_IDX_MDP_TDSHP2] = MT8195_MUTEX_MOD_MDP_TDSHP2, + [MUTEX_MOD_IDX_MDP_TDSHP3] = MT8195_MUTEX_MOD_MDP_TDSHP3, + [MUTEX_MOD_IDX_MDP_COLOR0] = MT8195_MUTEX_MOD_MDP_COLOR0, + [MUTEX_MOD_IDX_MDP_COLOR1] = MT8195_MUTEX_MOD_MDP_COLOR1, + [MUTEX_MOD_IDX_MDP_COLOR2] = MT8195_MUTEX_MOD_MDP_COLOR2, + [MUTEX_MOD_IDX_MDP_COLOR3] = MT8195_MUTEX_MOD_MDP_COLOR3, + [MUTEX_MOD_IDX_MDP_OVL0] = MT8195_MUTEX_MOD_MDP_OVL0, + [MUTEX_MOD_IDX_MDP_OVL1] = MT8195_MUTEX_MOD_MDP_OVL1, + [MUTEX_MOD_IDX_MDP_PAD0] = MT8195_MUTEX_MOD_MDP_PAD0, + [MUTEX_MOD_IDX_MDP_PAD1] = MT8195_MUTEX_MOD_MDP_PAD1, + [MUTEX_MOD_IDX_MDP_PAD2] = MT8195_MUTEX_MOD_MDP_PAD2, + [MUTEX_MOD_IDX_MDP_PAD3] = MT8195_MUTEX_MOD_MDP_PAD3, + [MUTEX_MOD_IDX_MDP_TCC0] = MT8195_MUTEX_MOD_MDP_TCC0, + [MUTEX_MOD_IDX_MDP_TCC1] = MT8195_MUTEX_MOD_MDP_TCC1, + [MUTEX_MOD_IDX_MDP_WROT0] = MT8195_MUTEX_MOD_MDP_WROT0, + [MUTEX_MOD_IDX_MDP_WROT1] = MT8195_MUTEX_MOD_MDP_WROT1, + [MUTEX_MOD_IDX_MDP_WROT2] = MT8195_MUTEX_MOD_MDP_WROT2, + [MUTEX_MOD_IDX_MDP_WROT3] = MT8195_MUTEX_MOD_MDP_WROT3, +}; + static const unsigned int mt8365_mutex_mod[DDP_COMPONENT_ID_MAX] = { [DDP_COMPONENT_AAL0] = MT8365_MUTEX_MOD_DISP_AAL, [DDP_COMPONENT_CCORR] = MT8365_MUTEX_MOD_DISP_CCORR, @@ -604,6 +697,13 @@ static const struct mtk_mutex_data mt8195_mutex_driver_data = { .mutex_sof_reg = MT8183_MUTEX0_SOF0, }; +static const struct mtk_mutex_data mt8195_vpp_mutex_driver_data = { + .mutex_sof = mt8195_mutex_sof, + .mutex_mod_reg = MT8183_MUTEX0_MOD0, + .mutex_sof_reg = MT8183_MUTEX0_SOF0, + .mutex_table_mod = mt8195_mutex_table_mod, +}; + static const struct mtk_mutex_data mt8365_mutex_driver_data = { .mutex_mod = mt8365_mutex_mod, .mutex_sof = mt8183_mutex_sof, @@ -962,6 +1062,8 @@ static const struct of_device_id mutex_driver_dt_match[] = { .data = &mt8192_mutex_driver_data}, { .compatible = "mediatek,mt8195-disp-mutex", .data = &mt8195_mutex_driver_data}, + { .compatible = "mediatek,mt8195-vpp-mutex", + .data = &mt8195_vpp_mutex_driver_data}, { .compatible = "mediatek,mt8365-disp-mutex", .data = &mt8365_mutex_driver_data}, {}, diff --git a/include/linux/soc/mediatek/mtk-mutex.h b/include/linux/soc/mediatek/mtk-mutex.h index b335c2837cd8..635218e3ac68 100644 --- a/include/linux/soc/mediatek/mtk-mutex.h +++ b/include/linux/soc/mediatek/mtk-mutex.h @@ -22,6 +22,41 @@ enum mtk_mutex_mod_index { MUTEX_MOD_IDX_MDP_CCORR0, MUTEX_MOD_IDX_MDP_HDR0, MUTEX_MOD_IDX_MDP_COLOR0, + MUTEX_MOD_IDX_MDP_RDMA1, + MUTEX_MOD_IDX_MDP_RDMA2, + MUTEX_MOD_IDX_MDP_RDMA3, + MUTEX_MOD_IDX_MDP_STITCH0, + MUTEX_MOD_IDX_MDP_FG0, + MUTEX_MOD_IDX_MDP_FG1, + MUTEX_MOD_IDX_MDP_FG2, + MUTEX_MOD_IDX_MDP_FG3, + MUTEX_MOD_IDX_MDP_HDR1, + MUTEX_MOD_IDX_MDP_HDR2, + MUTEX_MOD_IDX_MDP_HDR3, + MUTEX_MOD_IDX_MDP_AAL1, + MUTEX_MOD_IDX_MDP_AAL2, + MUTEX_MOD_IDX_MDP_AAL3, + MUTEX_MOD_IDX_MDP_RSZ2, + MUTEX_MOD_IDX_MDP_RSZ3, + MUTEX_MOD_IDX_MDP_MERGE2, + MUTEX_MOD_IDX_MDP_MERGE3, + MUTEX_MOD_IDX_MDP_TDSHP1, + MUTEX_MOD_IDX_MDP_TDSHP2, + MUTEX_MOD_IDX_MDP_TDSHP3, + MUTEX_MOD_IDX_MDP_COLOR1, + MUTEX_MOD_IDX_MDP_COLOR2, + MUTEX_MOD_IDX_MDP_COLOR3, + MUTEX_MOD_IDX_MDP_OVL0, + MUTEX_MOD_IDX_MDP_OVL1, + MUTEX_MOD_IDX_MDP_PAD0, + MUTEX_MOD_IDX_MDP_PAD1, + MUTEX_MOD_IDX_MDP_PAD2, + MUTEX_MOD_IDX_MDP_PAD3, + MUTEX_MOD_IDX_MDP_TCC0, + MUTEX_MOD_IDX_MDP_TCC1, + MUTEX_MOD_IDX_MDP_WROT1, + MUTEX_MOD_IDX_MDP_WROT2, + MUTEX_MOD_IDX_MDP_WROT3, MUTEX_MOD_IDX_MAX /* ALWAYS keep at the end */ }; -- cgit v1.2.3 From 2ba4e3bd65213f3eae75fcd316ae38d4286d333e Mon Sep 17 00:00:00 2001 From: Matthias Brugger Date: Thu, 9 Feb 2023 17:24:03 +0100 Subject: soc: mediatek: mtk-svs: delete node name check The function svs_add_device_link is called only internally from the SoC specific probe functions. We don't need to check if the node_name is null because that would mean that we have a buggy SoC probe function in the first place. Reviewed-by: Roger Lu Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230209162403.21113-1-matthias.bgg@kernel.org Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-svs.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 299f580847bd..a7eb019b5157 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -2027,11 +2027,6 @@ static struct device *svs_add_device_link(struct svs_platform *svsp, struct device *dev; struct device_link *sup_link; - if (!node_name) { - dev_err(svsp->dev, "node name cannot be null\n"); - return ERR_PTR(-EINVAL); - } - dev = svs_get_subsys_device(svsp, node_name); if (IS_ERR(dev)) return dev; -- cgit v1.2.3 From 5f1732a8683c1da8faaa90d6ffc3bd6d33013a58 Mon Sep 17 00:00:00 2001 From: Nicolas Frayer Date: Fri, 30 Dec 2022 01:14:04 +0100 Subject: soc: ti: k3-ringacc: Add try_module_get() to k3_dmaring_request_dual_ring() When the k3 ring accelerator driver has been modified to add module build support, try_module_get() and module_put() have been added to update the module refcnt. One code path has not been updated and it has introduced an issue where the refcnt is decremented by module_put() in k3_ringacc_ring_free() without being incremented previously. Adding try_module_get() to k3_dmaring_request_dual_ring() ensures the refcnt is kept up to date. Fixes: c07f216a8b72 ("soc: ti: k3-ringacc: Allow the driver to be built as module") Signed-off-by: Nicolas Frayer Reviewed-by: Peter Ujfalusi Link: https://lore.kernel.org/r/20221230001404.10902-1-nfrayer@baylibre.com Signed-off-by: Nishanth Menon --- drivers/soc/ti/k3-ringacc.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'drivers') diff --git a/drivers/soc/ti/k3-ringacc.c b/drivers/soc/ti/k3-ringacc.c index e01e4d815230..8f131368a758 100644 --- a/drivers/soc/ti/k3-ringacc.c +++ b/drivers/soc/ti/k3-ringacc.c @@ -406,6 +406,11 @@ static int k3_dmaring_request_dual_ring(struct k3_ringacc *ringacc, int fwd_id, mutex_lock(&ringacc->req_lock); + if (!try_module_get(ringacc->dev->driver->owner)) { + ret = -EINVAL; + goto err_module_get; + } + if (test_bit(fwd_id, ringacc->rings_inuse)) { ret = -EBUSY; goto error; @@ -421,6 +426,8 @@ static int k3_dmaring_request_dual_ring(struct k3_ringacc *ringacc, int fwd_id, return 0; error: + module_put(ringacc->dev->driver->owner); +err_module_get: mutex_unlock(&ringacc->req_lock); return ret; } -- cgit v1.2.3 From 8f3c307b580a4a6425896007325bddefc36e8d91 Mon Sep 17 00:00:00 2001 From: Miaoqian Lin Date: Fri, 6 Jan 2023 09:40:22 +0400 Subject: soc: ti: pm33xx: Fix refcount leak in am33xx_pm_probe wkup_m3_ipc_get() takes refcount, which should be freed by wkup_m3_ipc_put(). Add missing refcount release in the error paths. Fixes: 5a99ae0092fe ("soc: ti: pm33xx: AM437X: Add rtc_only with ddr in self-refresh support") Signed-off-by: Miaoqian Lin Link: https://lore.kernel.org/r/20230106054022.947529-1-linmq006@gmail.com Signed-off-by: Nishanth Menon --- drivers/soc/ti/pm33xx.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/ti/pm33xx.c b/drivers/soc/ti/pm33xx.c index ce09c42eaed2..f04c21157904 100644 --- a/drivers/soc/ti/pm33xx.c +++ b/drivers/soc/ti/pm33xx.c @@ -527,7 +527,7 @@ static int am33xx_pm_probe(struct platform_device *pdev) ret = am33xx_pm_alloc_sram(); if (ret) - return ret; + goto err_wkup_m3_ipc_put; ret = am33xx_pm_rtc_setup(); if (ret) @@ -572,13 +572,14 @@ err_pm_runtime_put: pm_runtime_put_sync(dev); err_pm_runtime_disable: pm_runtime_disable(dev); - wkup_m3_ipc_put(m3_ipc); err_unsetup_rtc: iounmap(rtc_base_virt); clk_put(rtc_fck); err_free_sram: am33xx_pm_free_sram(); pm33xx_dev = NULL; +err_wkup_m3_ipc_put: + wkup_m3_ipc_put(m3_ipc); return ret; } -- cgit v1.2.3 From e63b0663f0028b265201798d74de163140ac124e Mon Sep 17 00:00:00 2001 From: Nick Alcock Date: Wed, 8 Mar 2023 20:21:16 +0000 Subject: memory: tegra: remove MODULE_LICENSE in non-modules Since commit 8b41fc4454e3 ("kbuild: create modules.builtin without Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations are used to identify modules. As a consequence, uses of the macro in non-modules will cause modprobe to misidentify their containing object file as a module when it is not (false positives), and modprobe might succeed rather than failing with a suitable error message. So remove it in the files in this commit, none of which can be built as modules. Signed-off-by: Nick Alcock Suggested-by: Luis Chamberlain Cc: Hitomi Hasegawa Cc: Thierry Reding Cc: Jonathan Hunter Link: https://lore.kernel.org/r/20230308202117.426808-1-nick.alcock@oracle.com Signed-off-by: Krzysztof Kozlowski --- drivers/memory/tegra/mc.c | 1 - drivers/memory/tegra/tegra186-emc.c | 1 - 2 files changed, 2 deletions(-) (limited to 'drivers') diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index 592907546ee6..237025ba811d 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c @@ -985,4 +985,3 @@ arch_initcall(tegra_mc_init); MODULE_AUTHOR("Thierry Reding "); MODULE_DESCRIPTION("NVIDIA Tegra Memory Controller driver"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/memory/tegra/tegra186-emc.c b/drivers/memory/tegra/tegra186-emc.c index 26e763bde92a..e935ad4e95b6 100644 --- a/drivers/memory/tegra/tegra186-emc.c +++ b/drivers/memory/tegra/tegra186-emc.c @@ -280,4 +280,3 @@ module_platform_driver(tegra186_emc_driver); MODULE_AUTHOR("Thierry Reding "); MODULE_DESCRIPTION("NVIDIA Tegra186 External Memory Controller driver"); -MODULE_LICENSE("GPL v2"); -- cgit v1.2.3 From d2456ddb2e7e1b89ed637e8190fcbbeadc7ea8a7 Mon Sep 17 00:00:00 2001 From: Nick Alcock Date: Wed, 8 Mar 2023 20:21:17 +0000 Subject: memory: remove MODULE_LICENSE in non-modules Since commit 8b41fc4454e3 ("kbuild: create modules.builtin without Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations are used to identify modules. As a consequence, uses of the macro in non-modules will cause modprobe to misidentify their containing object file as a module when it is not (false positives), and modprobe might succeed rather than failing with a suitable error message. So remove it in the files in this commit, none of which can be built as modules. Signed-off-by: Nick Alcock Suggested-by: Luis Chamberlain Cc: Hitomi Hasegawa Link: https://lore.kernel.org/r/20230308202117.426808-2-nick.alcock@oracle.com Signed-off-by: Krzysztof Kozlowski --- drivers/memory/bt1-l2-ctl.c | 1 - drivers/memory/da8xx-ddrctl.c | 1 - drivers/memory/fsl_ifc.c | 1 - drivers/memory/mvebu-devbus.c | 1 - 4 files changed, 4 deletions(-) (limited to 'drivers') diff --git a/drivers/memory/bt1-l2-ctl.c b/drivers/memory/bt1-l2-ctl.c index 85965fa26e0b..78bd71b203f2 100644 --- a/drivers/memory/bt1-l2-ctl.c +++ b/drivers/memory/bt1-l2-ctl.c @@ -321,4 +321,3 @@ module_platform_driver(l2_ctl_driver); MODULE_AUTHOR("Serge Semin "); MODULE_DESCRIPTION("Baikal-T1 L2-cache driver"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/memory/da8xx-ddrctl.c b/drivers/memory/da8xx-ddrctl.c index b32005bf269c..0ef8cc878b95 100644 --- a/drivers/memory/da8xx-ddrctl.c +++ b/drivers/memory/da8xx-ddrctl.c @@ -164,4 +164,3 @@ module_platform_driver(da8xx_ddrctl_driver); MODULE_AUTHOR("Bartosz Golaszewski "); MODULE_DESCRIPTION("TI da8xx DDR2/mDDR controller driver"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/memory/fsl_ifc.c b/drivers/memory/fsl_ifc.c index e83b61c925a4..9e8d8e9c5ad8 100644 --- a/drivers/memory/fsl_ifc.c +++ b/drivers/memory/fsl_ifc.c @@ -327,6 +327,5 @@ static int __init fsl_ifc_init(void) } subsys_initcall(fsl_ifc_init); -MODULE_LICENSE("GPL"); MODULE_AUTHOR("Freescale Semiconductor"); MODULE_DESCRIPTION("Freescale Integrated Flash Controller driver"); diff --git a/drivers/memory/mvebu-devbus.c b/drivers/memory/mvebu-devbus.c index efc6c08db2b7..406fddcdba02 100644 --- a/drivers/memory/mvebu-devbus.c +++ b/drivers/memory/mvebu-devbus.c @@ -341,6 +341,5 @@ static int __init mvebu_devbus_init(void) } module_init(mvebu_devbus_init); -MODULE_LICENSE("GPL v2"); MODULE_AUTHOR("Ezequiel Garcia "); MODULE_DESCRIPTION("Marvell EBU SoC Device Bus controller"); -- cgit v1.2.3 From fd9c55c0acac59013dae9f8eedb0e0eb2e82e276 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 7 Mar 2023 11:56:40 +0100 Subject: soc: renesas: rcar-sysc: Remove R-Car H3 ES1.* handling R-Car H3 ES1.* was only available to an internal development group and needed a lot of quirks and workarounds. These become a maintenance burden now, so our development group decided to remove upstream support and disable booting for this SoC. Public users only have ES2 onwards. Signed-off-by: Wolfram Sang Reviewed-by: Laurent Pinchart Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230307105645.5285-5-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven --- drivers/soc/renesas/r8a7795-sysc.c | 10 ---------- include/dt-bindings/power/r8a7795-sysc.h | 1 - 2 files changed, 11 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/renesas/r8a7795-sysc.c b/drivers/soc/renesas/r8a7795-sysc.c index 91074411b8cf..cbe1ff0fc583 100644 --- a/drivers/soc/renesas/r8a7795-sysc.c +++ b/drivers/soc/renesas/r8a7795-sysc.c @@ -38,8 +38,6 @@ static struct rcar_sysc_area r8a7795_areas[] __initdata = { { "a3vp", 0x340, 0, R8A7795_PD_A3VP, R8A7795_PD_ALWAYS_ON }, { "cr7", 0x240, 0, R8A7795_PD_CR7, R8A7795_PD_ALWAYS_ON }, { "a3vc", 0x380, 0, R8A7795_PD_A3VC, R8A7795_PD_ALWAYS_ON }, - /* A2VC0 exists on ES1.x only */ - { "a2vc0", 0x3c0, 0, R8A7795_PD_A2VC0, R8A7795_PD_A3VC }, { "a2vc1", 0x3c0, 1, R8A7795_PD_A2VC1, R8A7795_PD_A3VC }, { "3dg-a", 0x100, 0, R8A7795_PD_3DG_A, R8A7795_PD_ALWAYS_ON }, { "3dg-b", 0x100, 1, R8A7795_PD_3DG_B, R8A7795_PD_3DG_A }, @@ -54,14 +52,10 @@ static struct rcar_sysc_area r8a7795_areas[] __initdata = { * Fixups for R-Car H3 revisions */ -#define HAS_A2VC0 BIT(0) /* Power domain A2VC0 is present */ #define NO_EXTMASK BIT(1) /* Missing SYSCEXTMASK register */ static const struct soc_device_attribute r8a7795_quirks_match[] __initconst = { { - .soc_id = "r8a7795", .revision = "ES1.*", - .data = (void *)(HAS_A2VC0 | NO_EXTMASK), - }, { .soc_id = "r8a7795", .revision = "ES2.*", .data = (void *)(NO_EXTMASK), }, @@ -77,10 +71,6 @@ static int __init r8a7795_sysc_init(void) if (attr) quirks = (uintptr_t)attr->data; - if (!(quirks & HAS_A2VC0)) - rcar_sysc_nullify(r8a7795_areas, ARRAY_SIZE(r8a7795_areas), - R8A7795_PD_A2VC0); - if (quirks & NO_EXTMASK) r8a7795_sysc_info.extmask_val = 0; diff --git a/include/dt-bindings/power/r8a7795-sysc.h b/include/dt-bindings/power/r8a7795-sysc.h index eea6ad69f0b0..ff5323858572 100644 --- a/include/dt-bindings/power/r8a7795-sysc.h +++ b/include/dt-bindings/power/r8a7795-sysc.h @@ -30,7 +30,6 @@ #define R8A7795_PD_CA53_SCU 21 #define R8A7795_PD_3DG_E 22 #define R8A7795_PD_A3IR 24 -#define R8A7795_PD_A2VC0 25 /* ES1.x only */ #define R8A7795_PD_A2VC1 26 /* Always-on power area */ -- cgit v1.2.3 From 18ecaaea2174c9494ec1ce354f58846367c29f45 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 7 Mar 2023 11:56:41 +0100 Subject: soc: renesas: Remove r8a77950 arch R-Car H3 ES1.* was only available to an internal development group and needed a lot of quirks and workarounds. These become a maintenance burden now, so our development group decided to remove upstream support and disable booting for this SoC. Public users only have ES2 onwards. Remove the architecture which describes H3 ES1.*. Signed-off-by: Wolfram Sang Reviewed-by: Laurent Pinchart Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230307105645.5285-6-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven --- drivers/soc/renesas/Kconfig | 7 ------- drivers/soc/renesas/renesas-soc.c | 4 +--- 2 files changed, 1 insertion(+), 10 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index 4e8b51ba2266..de31589ed054 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -206,13 +206,6 @@ config ARCH_R8A77990 This enables support for the Renesas R-Car E3 SoC. This includes different gradings like R-Car E3e. -config ARCH_R8A77950 - bool "ARM64 Platform support for R-Car H3 ES1.x" - select ARCH_RCAR_GEN3 - select SYSC_R8A7795 - help - This enables support for the Renesas R-Car H3 SoC (revision 1.x). - config ARCH_R8A77951 bool "ARM64 Platform support for R-Car H3 ES2.0+" select ARCH_RCAR_GEN3 diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c index 468ebce1ea88..a22e65916e20 100644 --- a/drivers/soc/renesas/renesas-soc.c +++ b/drivers/soc/renesas/renesas-soc.c @@ -330,10 +330,8 @@ static const struct of_device_id renesas_socs[] __initconst = { #ifdef CONFIG_ARCH_R8A7794 { .compatible = "renesas,r8a7794", .data = &soc_rcar_e2 }, #endif -#if defined(CONFIG_ARCH_R8A77950) || defined(CONFIG_ARCH_R8A77951) - { .compatible = "renesas,r8a7795", .data = &soc_rcar_h3 }, -#endif #ifdef CONFIG_ARCH_R8A77951 + { .compatible = "renesas,r8a7795", .data = &soc_rcar_h3 }, { .compatible = "renesas,r8a779m0", .data = &soc_rcar_h3 }, { .compatible = "renesas,r8a779m1", .data = &soc_rcar_h3 }, { .compatible = "renesas,r8a779m8", .data = &soc_rcar_h3 }, -- cgit v1.2.3 From b39d242dbfd925d9f6b262bf216518e28445570d Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 8 Mar 2023 11:48:17 +0100 Subject: soc: renesas: rmobile-sysc: Use of_fwnode_handle() helper Use the existing of_fwnode_handle() helper instead of open-coding the same operation. Signed-off-by: Geert Uytterhoeven Reviewed-by: Andy Shevchenko Reviewed-by: Saravana Kannan Link: https://lore.kernel.org/r/d49b9fb20d68709b12692558aca91997e6b06fb4.1678272276.git.geert+renesas@glider.be --- drivers/soc/renesas/rmobile-sysc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/renesas/rmobile-sysc.c b/drivers/soc/renesas/rmobile-sysc.c index 204e6135180b..728ebac98e14 100644 --- a/drivers/soc/renesas/rmobile-sysc.c +++ b/drivers/soc/renesas/rmobile-sysc.c @@ -343,7 +343,7 @@ static int __init rmobile_init_pm_domains(void) break; } - fwnode_dev_initialized(&np->fwnode, true); + fwnode_dev_initialized(of_fwnode_handle(np), true); } put_special_pds(); -- cgit v1.2.3 From 1b1b863a8898ad8348b7dfe812cab26cea9099bf Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 10 Mar 2023 08:47:25 -0600 Subject: soc: ti: Use of_property_present() for testing DT property presence It is preferred to use typed property access functions (i.e. of_property_read_ functions) rather than low-level of_get_property/of_find_property functions for reading properties. As part of this, convert of_get_property/of_find_property calls to the recently added of_property_present() helper when we just want to test for presence of a property and nothing more. Signed-off-by: Rob Herring Signed-off-by: Nishanth Menon Link: https://lore.kernel.org/r/20230310144725.1545384-1-robh@kernel.org --- drivers/soc/ti/knav_qmss_queue.c | 2 +- drivers/soc/ti/omap_prm.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/ti/knav_qmss_queue.c b/drivers/soc/ti/knav_qmss_queue.c index 8fb76908be70..48de98560093 100644 --- a/drivers/soc/ti/knav_qmss_queue.c +++ b/drivers/soc/ti/knav_qmss_queue.c @@ -1267,7 +1267,7 @@ static int knav_setup_queue_range(struct knav_device *kdev, if (of_get_property(node, "qalloc-by-id", NULL)) range->flags |= RANGE_RESERVED; - if (of_get_property(node, "accumulator", NULL)) { + if (of_property_present(node, "accumulator")) { ret = knav_init_acc_range(kdev, node, range); if (ret < 0) { devm_kfree(dev, range); diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c index 913b964374a4..ecd9a8bdd7c0 100644 --- a/drivers/soc/ti/omap_prm.c +++ b/drivers/soc/ti/omap_prm.c @@ -684,7 +684,7 @@ static int omap_prm_domain_init(struct device *dev, struct omap_prm *prm) const char *name; int error; - if (!of_find_property(dev->of_node, "#power-domain-cells", NULL)) + if (!of_property_present(dev->of_node, "#power-domain-cells")) return 0; of_node_put(dev->of_node); -- cgit v1.2.3 From 82e46bf71780940a5e060fcb02397ecf7f55e768 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 10 Mar 2023 08:47:25 -0600 Subject: soc: ti: Use of_property_read_bool() for boolean properties It is preferred to use typed property access functions (i.e. of_property_read_ functions) rather than low-level of_get_property/of_find_property functions for reading properties. Convert reading boolean properties to of_property_read_bool(). Signed-off-by: Rob Herring Signed-off-by: Nishanth Menon Link: https://lore.kernel.org/r/20230310144726.1545453-1-robh@kernel.org --- drivers/soc/ti/knav_dma.c | 4 ++-- drivers/soc/ti/knav_qmss_acc.c | 2 +- drivers/soc/ti/knav_qmss_queue.c | 2 +- drivers/soc/ti/wkup_m3_ipc.c | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/ti/knav_dma.c b/drivers/soc/ti/knav_dma.c index 84afebd355be..0fbc37cd5123 100644 --- a/drivers/soc/ti/knav_dma.c +++ b/drivers/soc/ti/knav_dma.c @@ -666,8 +666,8 @@ static int dma_init(struct device_node *cloud, struct device_node *dma_node) dma->rx_priority = DMA_PRIO_DEFAULT; dma->tx_priority = DMA_PRIO_DEFAULT; - dma->enable_all = (of_get_property(node, "ti,enable-all", NULL) != NULL); - dma->loopback = (of_get_property(node, "ti,loop-back", NULL) != NULL); + dma->enable_all = of_property_read_bool(node, "ti,enable-all"); + dma->loopback = of_property_read_bool(node, "ti,loop-back"); ret = of_property_read_u32(node, "ti,rx-retry-timeout", &timeout); if (ret < 0) { diff --git a/drivers/soc/ti/knav_qmss_acc.c b/drivers/soc/ti/knav_qmss_acc.c index fde66e28e046..3d388646ed43 100644 --- a/drivers/soc/ti/knav_qmss_acc.c +++ b/drivers/soc/ti/knav_qmss_acc.c @@ -521,7 +521,7 @@ int knav_init_acc_range(struct knav_device *kdev, info->pdsp = pdsp; channels = range->num_queues; - if (of_get_property(node, "multi-queue", NULL)) { + if (of_property_read_bool(node, "multi-queue")) { range->flags |= RANGE_MULTI_QUEUE; channels = 1; if (range->queue_base & (32 - 1)) { diff --git a/drivers/soc/ti/knav_qmss_queue.c b/drivers/soc/ti/knav_qmss_queue.c index 48de98560093..0f252c2549ba 100644 --- a/drivers/soc/ti/knav_qmss_queue.c +++ b/drivers/soc/ti/knav_qmss_queue.c @@ -1264,7 +1264,7 @@ static int knav_setup_queue_range(struct knav_device *kdev, if (range->num_irqs) range->flags |= RANGE_HAS_IRQ; - if (of_get_property(node, "qalloc-by-id", NULL)) + if (of_property_read_bool(node, "qalloc-by-id")) range->flags |= RANGE_RESERVED; if (of_property_present(node, "accumulator")) { diff --git a/drivers/soc/ti/wkup_m3_ipc.c b/drivers/soc/ti/wkup_m3_ipc.c index 343c58ed5896..6970478b40f3 100644 --- a/drivers/soc/ti/wkup_m3_ipc.c +++ b/drivers/soc/ti/wkup_m3_ipc.c @@ -681,7 +681,7 @@ static int wkup_m3_ipc_probe(struct platform_device *pdev) dev_warn(dev, "Invalid VTT GPIO(%d) pin\n", temp); } - if (of_find_property(np, "ti,set-io-isolation", NULL)) + if (of_property_read_bool(np, "ti,set-io-isolation")) wkup_m3_set_io_isolation(m3_ipc); ret = of_property_read_string(np, "firmware-name", -- cgit v1.2.3 From 538c7b5b5d8b5364454494e5fe4125b0b47195f1 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 10 Mar 2023 08:47:11 -0600 Subject: memory: atmel-ebi: Use of_property_present() for testing DT property presence It is preferred to use typed property access functions (i.e. of_property_read_ functions) rather than low-level of_get_property/of_find_property functions for reading properties. As part of this, convert of_get_property/of_find_property calls to the recently added of_property_present() helper when we just want to test for presence of a property and nothing more. Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20230310144711.1543295-1-robh@kernel.org Signed-off-by: Krzysztof Kozlowski --- drivers/memory/atmel-ebi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/memory/atmel-ebi.c b/drivers/memory/atmel-ebi.c index e749dcb3ddea..635966d705cb 100644 --- a/drivers/memory/atmel-ebi.c +++ b/drivers/memory/atmel-ebi.c @@ -598,7 +598,7 @@ static int atmel_ebi_probe(struct platform_device *pdev) reg_cells += val; for_each_available_child_of_node(np, child) { - if (!of_find_property(child, "reg", NULL)) + if (!of_property_present(child, "reg")) continue; ret = atmel_ebi_dev_setup(ebi, child, reg_cells); -- cgit v1.2.3 From 903caf42eabec2e39d836cb0aa8bbc23717408e7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 10 Mar 2023 22:44:13 +0100 Subject: soc: qcom: gsbi: mark OF related data as maybe unused MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The driver can be compile tested with !CONFIG_OF making certain data unused: drivers/soc/qcom/qcom_gsbi.c:117:34: error: ‘tcsr_dt_match’ defined but not used [-Werror=unused-const-variable=] Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230310214413.275054-1-krzysztof.kozlowski@linaro.org --- drivers/soc/qcom/qcom_gsbi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/qcom_gsbi.c b/drivers/soc/qcom/qcom_gsbi.c index 290bdefbf28a..f1742e5bddb9 100644 --- a/drivers/soc/qcom/qcom_gsbi.c +++ b/drivers/soc/qcom/qcom_gsbi.c @@ -114,7 +114,7 @@ struct gsbi_info { struct regmap *tcsr; }; -static const struct of_device_id tcsr_dt_match[] = { +static const struct of_device_id tcsr_dt_match[] __maybe_unused = { { .compatible = "qcom,tcsr-ipq8064", .data = &config_ipq8064}, { .compatible = "qcom,tcsr-apq8064", .data = &config_apq8064}, { .compatible = "qcom,tcsr-msm8960", .data = &config_msm8960}, -- cgit v1.2.3 From 4a1b9f4eb122f3e36fdfe62dce96091d3e45132f Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 10 Mar 2023 08:47:24 -0600 Subject: soc: qcom: Use of_property_present() for testing DT property presence It is preferred to use typed property access functions (i.e. of_property_read_ functions) rather than low-level of_get_property/of_find_property functions for reading properties. As part of this, convert of_get_property/of_find_property calls to the recently added of_property_present() helper when we just want to test for presence of a property and nothing more. Signed-off-by: Rob Herring Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230310144724.1545153-1-robh@kernel.org --- drivers/soc/qcom/qcom_aoss.c | 2 +- drivers/soc/qcom/smem.c | 2 +- drivers/soc/qcom/smsm.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/qcom_aoss.c b/drivers/soc/qcom/qcom_aoss.c index 18c856056475..e376c32cc16e 100644 --- a/drivers/soc/qcom/qcom_aoss.c +++ b/drivers/soc/qcom/qcom_aoss.c @@ -395,7 +395,7 @@ static int qmp_cooling_devices_register(struct qmp *qmp) return -ENOMEM; for_each_available_child_of_node(np, child) { - if (!of_find_property(child, "#cooling-cells", NULL)) + if (!of_property_present(child, "#cooling-cells")) continue; ret = qmp_cooling_device_add(qmp, &qmp->cooling_devs[count++], child); diff --git a/drivers/soc/qcom/smem.c b/drivers/soc/qcom/smem.c index 4f163d62942c..25f5925a8d51 100644 --- a/drivers/soc/qcom/smem.c +++ b/drivers/soc/qcom/smem.c @@ -1045,7 +1045,7 @@ static int qcom_smem_probe(struct platform_device *pdev) int i; num_regions = 1; - if (of_find_property(pdev->dev.of_node, "qcom,rpm-msg-ram", NULL)) + if (of_property_present(pdev->dev.of_node, "qcom,rpm-msg-ram")) num_regions++; array_size = num_regions * sizeof(struct smem_region); diff --git a/drivers/soc/qcom/smsm.c b/drivers/soc/qcom/smsm.c index 3e8994d6110e..8c137dff7dac 100644 --- a/drivers/soc/qcom/smsm.c +++ b/drivers/soc/qcom/smsm.c @@ -510,7 +510,7 @@ static int qcom_smsm_probe(struct platform_device *pdev) return -ENOMEM; for_each_child_of_node(pdev->dev.of_node, local_node) { - if (of_find_property(local_node, "#qcom,smem-state-cells", NULL)) + if (of_property_present(local_node, "#qcom,smem-state-cells")) break; } if (!local_node) { -- cgit v1.2.3 From 34bb2c1c1bb5d36487c1e7ff00dbf49bb91056e2 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 23 Jan 2023 21:26:01 +0100 Subject: soc: qcom: restrict L2 accessors to ARM64 build tests The QCOM_KRYO_L2_ACCESSORS can be compile tested only on ARM64 because it references asm/sysreg.h present only on ARM64. Mark the dependency correct, even though as a non-selectable option it does not have real effect. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230123202601.1296983-1-krzysztof.kozlowski@linaro.org --- drivers/soc/qcom/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index a8f283086a21..a25df9e3c70e 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -72,7 +72,7 @@ config QCOM_LLCC config QCOM_KRYO_L2_ACCESSORS bool - depends on ARCH_QCOM && ARM64 || COMPILE_TEST + depends on (ARCH_QCOM || COMPILE_TEST) && ARM64 config QCOM_MDT_LOADER tristate -- cgit v1.2.3 From b302c64a3c0a005f39155e9aef5e99ad8a9abbb7 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 9 Feb 2023 10:57:51 +0100 Subject: soc: qcom: smem: update max processor count Update max processor count to reflect the number of co-processors on SA8775P SoCs. Signed-off-by: Bartosz Golaszewski Reviewed-by: Eric Chanudet Tested-by: Eric Chanudet Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230209095753.447347-2-brgl@bgdev.pl --- drivers/soc/qcom/smem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/smem.c b/drivers/soc/qcom/smem.c index 25f5925a8d51..6be7ea93c78c 100644 --- a/drivers/soc/qcom/smem.c +++ b/drivers/soc/qcom/smem.c @@ -85,7 +85,7 @@ #define SMEM_GLOBAL_HOST 0xfffe /* Max number of processors/hosts in a system */ -#define SMEM_HOST_COUNT 15 +#define SMEM_HOST_COUNT 20 /** * struct smem_proc_comm - proc_comm communication struct (legacy) -- cgit v1.2.3 From 7fa9c5fc1a753ac593904ebe9c4e8628a4240096 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 9 Feb 2023 10:57:53 +0100 Subject: soc: qcom: socinfo: add support for SA8775P Add SocInfo support for SA8775P. Signed-off-by: Bartosz Golaszewski Reviewed-by: Eric Chanudet Tested-by: Eric Chanudet # sa8775p-ride Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230209095753.447347-4-brgl@bgdev.pl --- drivers/soc/qcom/socinfo.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c index e9012ca1a87b..6929bef72514 100644 --- a/drivers/soc/qcom/socinfo.c +++ b/drivers/soc/qcom/socinfo.c @@ -442,6 +442,7 @@ static const struct soc_id soc_id[] = { { qcom_board_id(SC7180P) }, { qcom_board_id(SM6375) }, { qcom_board_id(SM8550) }, + { qcom_board_id(SA8775P) }, { qcom_board_id(QRU1000) }, { qcom_board_id(QDU1000) }, { qcom_board_id(QDU1010) }, -- cgit v1.2.3 From 112d96fd29272726b2a4bc59d027f76fe1e78af3 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 13 Feb 2023 22:55:00 +0100 Subject: soc: qcom: socinfo: Add some PMICs Add some missing PMICs based on the _SUBTYPE defines in include/soc/qcom/qcom-spmi-pmic.h Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230213215500.2131511-1-konrad.dybcio@linaro.org --- drivers/soc/qcom/socinfo.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers') diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c index 6929bef72514..89081ec34dba 100644 --- a/drivers/soc/qcom/socinfo.c +++ b/drivers/soc/qcom/socinfo.c @@ -109,15 +109,20 @@ static const char *const pmic_models[] = { [32] = "PM8150B", [33] = "PMK8002", [36] = "PM8009", + [37] = "PMI632", [38] = "PM8150C", + [40] = "PM6150", [41] = "SMB2351", + [44] = "PM8008", [45] = "PM6125", + [46] = "PM7250B", [47] = "PMK8350", [48] = "PM8350", [49] = "PM8350C", [50] = "PM8350B", [51] = "PMR735A", [52] = "PMR735B", + [55] = "PM2250", [58] = "PM8450", [65] = "PM8010", }; -- cgit v1.2.3 From 9cb6d1b39a8f5086bbebb01357ba1e4ada2169e5 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 27 Feb 2023 16:54:21 +0100 Subject: soc: imx: imx8m-blk-ctrl: Scan subnodes and bind drivers to them This particular block can have DT subnodes describing the LVDS LDB bridge. Instead of misusing simple-bus to scan for those nodes, do the scan within the driver. Tested-by: Alexander Stein Signed-off-by: Marek Vasut Reviewed-by: Lucas Stach Signed-off-by: Shawn Guo --- drivers/soc/imx/imx8m-blk-ctrl.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers') diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx8m-blk-ctrl.c index 399cb85105a1..8bee7280303c 100644 --- a/drivers/soc/imx/imx8m-blk-ctrl.c +++ b/drivers/soc/imx/imx8m-blk-ctrl.c @@ -310,6 +310,10 @@ static int imx8m_blk_ctrl_probe(struct platform_device *pdev) dev_set_drvdata(dev, bc); + ret = devm_of_platform_populate(dev); + if (ret) + goto cleanup_provider; + return 0; cleanup_provider: -- cgit v1.2.3 From edac60e149714cc05c32b49472740988c197543d Mon Sep 17 00:00:00 2001 From: Jindong Yue Date: Wed, 1 Mar 2023 21:05:51 +0800 Subject: soc: imx: imx8mp-blk-ctrl: Use dev_pm_domain_attach_by_name The genpd_dev_pm_attach_by_name() is not exported, following error occurs when building imx8mp-blk-ctrl as a module: ERROR: modpost: "genpd_dev_pm_attach_by_name" [drivers/soc/imx/imx8mp-blk-ctrl.ko] undefined! Fix this by using dev_pm_domain_attach_by_name() instead. Signed-off-by: Jindong Yue Reviewed-by: Peng Fan Reviewed-by: Marco Felsch Signed-off-by: Shawn Guo --- drivers/soc/imx/imx8mp-blk-ctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c b/drivers/soc/imx/imx8mp-blk-ctrl.c index a0592db8fa86..1892c2c78831 100644 --- a/drivers/soc/imx/imx8mp-blk-ctrl.c +++ b/drivers/soc/imx/imx8mp-blk-ctrl.c @@ -642,7 +642,7 @@ static int imx8mp_blk_ctrl_probe(struct platform_device *pdev) if (!bc->onecell_data.domains) return -ENOMEM; - bc->bus_power_dev = genpd_dev_pm_attach_by_name(dev, "bus"); + bc->bus_power_dev = dev_pm_domain_attach_by_name(dev, "bus"); if (IS_ERR(bc->bus_power_dev)) return dev_err_probe(dev, PTR_ERR(bc->bus_power_dev), "failed to attach bus power domain\n"); -- cgit v1.2.3 From d77369ad8cb10bedd244e6dfd8414ebdd8594ba6 Mon Sep 17 00:00:00 2001 From: Jindong Yue Date: Wed, 1 Mar 2023 21:05:52 +0800 Subject: soc: imx: imx8mp-blk-ctrl: Fix typo of imx8m_blk_ctrl_of_match MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Once set CONFIG_SOC_IMX8M as m, following error occurs: drivers/soc/imx/imx8mp-blk-ctrl.c:747:25: error: ‘imx8m_blk_ctrl_of_match’ undeclared here (not in a function); did you mean ‘imx8mp_blk_ctrl_of_match’? 747 | MODULE_DEVICE_TABLE(of, imx8m_blk_ctrl_of_match); | ^~~~~~~~~~~~~~~~~~~~~~~ Fix the typo. Signed-off-by: Jindong Yue Reviewed-by: Peng Fan Reviewed-by: Marco Felsch Signed-off-by: Shawn Guo --- drivers/soc/imx/imx8mp-blk-ctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c b/drivers/soc/imx/imx8mp-blk-ctrl.c index 1892c2c78831..f109c7bd6658 100644 --- a/drivers/soc/imx/imx8mp-blk-ctrl.c +++ b/drivers/soc/imx/imx8mp-blk-ctrl.c @@ -852,7 +852,7 @@ static const struct of_device_id imx8mp_blk_ctrl_of_match[] = { /* Sentinel */ } }; -MODULE_DEVICE_TABLE(of, imx8m_blk_ctrl_of_match); +MODULE_DEVICE_TABLE(of, imx8mp_blk_ctrl_of_match); static struct platform_driver imx8mp_blk_ctrl_driver = { .probe = imx8mp_blk_ctrl_probe, -- cgit v1.2.3 From 56c017f64d76e3c7fd525014f811349092e1c022 Mon Sep 17 00:00:00 2001 From: Jindong Yue Date: Wed, 1 Mar 2023 21:05:53 +0800 Subject: soc: imx: imx8mp-blk-ctrl: Add MODULE_LICENSE Add MODULE_LICENSE to support building as a module. Signed-off-by: Jindong Yue Reviewed-by: Peng Fan Reviewed-by: Marco Felsch Signed-off-by: Shawn Guo --- drivers/soc/imx/imx8mp-blk-ctrl.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c b/drivers/soc/imx/imx8mp-blk-ctrl.c index f109c7bd6658..870aecc0202a 100644 --- a/drivers/soc/imx/imx8mp-blk-ctrl.c +++ b/drivers/soc/imx/imx8mp-blk-ctrl.c @@ -864,3 +864,4 @@ static struct platform_driver imx8mp_blk_ctrl_driver = { }, }; module_platform_driver(imx8mp_blk_ctrl_driver); +MODULE_LICENSE("GPL"); -- cgit v1.2.3 From 31ef51a4ae5e6e6745aae119a2836d7386652a2b Mon Sep 17 00:00:00 2001 From: Jindong Yue Date: Wed, 1 Mar 2023 21:05:54 +0800 Subject: soc: imx: imx8m-blk-ctrl: Use dev_pm_domain_attach_by_name The genpd_dev_pm_attach_by_name() is not exported, following error occurs when building imx8m-blk-ctrl as a module: ERROR: modpost: "genpd_dev_pm_attach_by_name" [drivers/soc/imx/imx8m-blk-ctrl.ko] undefined! Fix this by using dev_pm_domain_attach_by_name() instead. Signed-off-by: Jindong Yue Reviewed-by: Peng Fan Reviewed-by: Marco Felsch Signed-off-by: Shawn Guo --- drivers/soc/imx/imx8m-blk-ctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx8m-blk-ctrl.c index 8bee7280303c..c8cf57337bbe 100644 --- a/drivers/soc/imx/imx8m-blk-ctrl.c +++ b/drivers/soc/imx/imx8m-blk-ctrl.c @@ -210,7 +210,7 @@ static int imx8m_blk_ctrl_probe(struct platform_device *pdev) if (!bc->onecell_data.domains) return -ENOMEM; - bc->bus_power_dev = genpd_dev_pm_attach_by_name(dev, "bus"); + bc->bus_power_dev = dev_pm_domain_attach_by_name(dev, "bus"); if (IS_ERR(bc->bus_power_dev)) { if (PTR_ERR(bc->bus_power_dev) == -ENODEV) return dev_err_probe(dev, -EPROBE_DEFER, -- cgit v1.2.3 From 78710a72dc08da4cb2f65707acf4943e2b14c2e1 Mon Sep 17 00:00:00 2001 From: Jindong Yue Date: Wed, 1 Mar 2023 21:05:55 +0800 Subject: soc: imx: imx8m-blk-ctrl: Add MODULE_LICENSE Add MODULE_LICENSE to support building as a module. Signed-off-by: Jindong Yue Reviewed-by: Peng Fan Reviewed-by: Marco Felsch Signed-off-by: Shawn Guo --- drivers/soc/imx/imx8m-blk-ctrl.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx8m-blk-ctrl.c index c8cf57337bbe..9129c97b7a01 100644 --- a/drivers/soc/imx/imx8m-blk-ctrl.c +++ b/drivers/soc/imx/imx8m-blk-ctrl.c @@ -895,3 +895,4 @@ static struct platform_driver imx8m_blk_ctrl_driver = { }, }; module_platform_driver(imx8m_blk_ctrl_driver); +MODULE_LICENSE("GPL"); -- cgit v1.2.3 From 280fe269059f8d3c127dd4c1ce24297d8e20d1e2 Mon Sep 17 00:00:00 2001 From: Jindong Yue Date: Wed, 1 Mar 2023 21:05:56 +0800 Subject: soc: imx8m: Add MODULE_LICENSE Add MODULE_LICENSE to support building as module. Signed-off-by: Jindong Yue Reviewed-by: Peng Fan Reviewed-by: Marco Felsch Signed-off-by: Shawn Guo --- drivers/soc/imx/soc-imx8m.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c index 32ed9dc88e45..1dcd243df567 100644 --- a/drivers/soc/imx/soc-imx8m.c +++ b/drivers/soc/imx/soc-imx8m.c @@ -242,3 +242,4 @@ free_soc: return ret; } device_initcall(imx8_soc_init); +MODULE_LICENSE("GPL"); -- cgit v1.2.3 From 8191455c38dd009f15e2fa9ce6c2e3cd337918a0 Mon Sep 17 00:00:00 2001 From: Jindong Yue Date: Wed, 1 Mar 2023 21:05:57 +0800 Subject: soc: imx8m: Support building imx8m soc driver as module Make the imx8m soc driver as tristate so that it can be built as loadable module, module names are: soc-imx8m.ko, imx8m-blk-ctrl.ko and imx8mp-blk-ctrl.ko Signed-off-by: Jindong Yue Reviewed-by: Peng Fan Reviewed-by: Marco Felsch Signed-off-by: Shawn Guo --- drivers/soc/imx/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/imx/Kconfig b/drivers/soc/imx/Kconfig index a8742fc58f01..76a4593baf0a 100644 --- a/drivers/soc/imx/Kconfig +++ b/drivers/soc/imx/Kconfig @@ -10,7 +10,7 @@ config IMX_GPCV2_PM_DOMAINS default y if SOC_IMX7D config SOC_IMX8M - bool "i.MX8M SoC family support" + tristate "i.MX8M SoC family support" depends on ARCH_MXC || COMPILE_TEST default ARCH_MXC && ARM64 select SOC_BUS -- cgit v1.2.3 From a9c6a1fcc338f4d97c87a3487b371652edba00c5 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 10 Mar 2023 08:47:24 -0600 Subject: soc: sunxi: Use of_property_present() for testing DT property presence It is preferred to use typed property access functions (i.e. of_property_read_ functions) rather than low-level of_get_property/of_find_property functions for reading properties. As part of this, convert of_get_property/of_find_property calls to the recently added of_property_present() helper when we just want to test for presence of a property and nothing more. Signed-off-by: Rob Herring Reviewed-by: Jernej Skrabec Reviewed-by: Andre Przywara Link: https://lore.kernel.org/r/20230310144724.1545223-1-robh@kernel.org Signed-off-by: Jernej Skrabec --- drivers/soc/sunxi/sunxi_mbus.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/sunxi/sunxi_mbus.c b/drivers/soc/sunxi/sunxi_mbus.c index d90e4a264b6f..1734da357ca2 100644 --- a/drivers/soc/sunxi/sunxi_mbus.c +++ b/drivers/soc/sunxi/sunxi_mbus.c @@ -82,7 +82,7 @@ static int sunxi_mbus_notifier(struct notifier_block *nb, * Older DTs or SoCs who are not clearly understood need to set * that DMA offset though. */ - if (of_find_property(dev->of_node, "interconnects", NULL)) + if (of_property_present(dev->of_node, "interconnects")) return NOTIFY_DONE; ret = dma_direct_set_offset(dev, PHYS_OFFSET, 0, SZ_4G); -- cgit v1.2.3 From c014377bd053fad2f42b39626939560df1d5fc7d Mon Sep 17 00:00:00 2001 From: Nick Alcock Date: Fri, 17 Feb 2023 14:10:47 +0000 Subject: kbuild, soc: sunxi: sram: remove MODULE_LICENSE in non-modules Since commit 8b41fc4454e ("kbuild: create modules.builtin without Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations are used to identify modules. As a consequence, uses of the macro in non-modules will cause modprobe to misidentify their containing object file as a module when it is not (false positives), and modprobe might succeed rather than failing with a suitable error message. So remove it in the files in this commit, none of which can be built as modules. Signed-off-by: Nick Alcock Suggested-by: Luis Chamberlain Cc: Luis Chamberlain Cc: linux-modules@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Hitomi Hasegawa Cc: Chen-Yu Tsai Cc: Jernej Skrabec Cc: Samuel Holland Cc: linux-arm-kernel@lists.infradead.org Cc: linux-sunxi@lists.linux.dev Acked-by: Jernej Skrabec Link: https://lore.kernel.org/r/20230217141059.392471-13-nick.alcock@oracle.com Signed-off-by: Jernej Skrabec --- drivers/soc/sunxi/sunxi_sram.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c index f09918c59042..4c4864cd2342 100644 --- a/drivers/soc/sunxi/sunxi_sram.c +++ b/drivers/soc/sunxi/sunxi_sram.c @@ -424,4 +424,3 @@ builtin_platform_driver_probe(sunxi_sram_driver, sunxi_sram_probe); MODULE_AUTHOR("Maxime Ripard "); MODULE_DESCRIPTION("Allwinner sunXi SRAM Controller Driver"); -MODULE_LICENSE("GPL"); -- cgit v1.2.3 From 9cf38a0914f0891e43bf88dcbb704d18dc5d4b21 Mon Sep 17 00:00:00 2001 From: Ye Xingchen Date: Wed, 8 Feb 2023 15:37:15 +0800 Subject: bus: brcmstb_gisb: Use devm_platform_get_and_ioremap_resource() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Ye Xingchen Link: https://lore.kernel.org/r/202302081537158530029@zte.com.cn Signed-off-by: Florian Fainelli --- drivers/bus/brcmstb_gisb.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/bus/brcmstb_gisb.c b/drivers/bus/brcmstb_gisb.c index b0c3704777e9..b6dfe4340da2 100644 --- a/drivers/bus/brcmstb_gisb.c +++ b/drivers/bus/brcmstb_gisb.c @@ -401,12 +401,10 @@ static int __init brcmstb_gisb_arb_probe(struct platform_device *pdev) struct device_node *dn = pdev->dev.of_node; struct brcmstb_gisb_arb_device *gdev; const struct of_device_id *of_id; - struct resource *r; int err, timeout_irq, tea_irq, bp_irq; unsigned int num_masters, j = 0; int i, first, last; - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); timeout_irq = platform_get_irq(pdev, 0); tea_irq = platform_get_irq(pdev, 1); bp_irq = platform_get_irq(pdev, 2); @@ -418,7 +416,7 @@ static int __init brcmstb_gisb_arb_probe(struct platform_device *pdev) mutex_init(&gdev->lock); INIT_LIST_HEAD(&gdev->next); - gdev->base = devm_ioremap_resource(&pdev->dev, r); + gdev->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); if (IS_ERR(gdev->base)) return PTR_ERR(gdev->base); -- cgit v1.2.3 From 89cc9abe55dfb24647f3730ad218adc1bfad27ac Mon Sep 17 00:00:00 2001 From: Nick Alcock Date: Wed, 22 Feb 2023 12:14:30 +0000 Subject: kbuild, soc: bcm: raspberrypi-power: remove MODULE_LICENSE in non-modules Since commit 8b41fc4454e ("kbuild: create modules.builtin without Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations are used to identify modules. As a consequence, uses of the macro in non-modules will cause modprobe to misidentify their containing object file as a module when it is not (false positives), and modprobe might succeed rather than failing with a suitable error message. So remove it in the files in this commit, none of which can be built as modules. Signed-off-by: Nick Alcock Suggested-by: Luis Chamberlain Cc: Luis Chamberlain Cc: linux-modules@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Hitomi Hasegawa Cc: Florian Fainelli Cc: linux-rpi-kernel@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Florian Fainelli --- drivers/soc/bcm/raspberrypi-power.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/bcm/raspberrypi-power.c b/drivers/soc/bcm/raspberrypi-power.c index 068715d6e66d..58175af982a0 100644 --- a/drivers/soc/bcm/raspberrypi-power.c +++ b/drivers/soc/bcm/raspberrypi-power.c @@ -243,4 +243,3 @@ builtin_platform_driver(rpi_power_driver); MODULE_AUTHOR("Alexander Aring "); MODULE_AUTHOR("Eric Anholt "); MODULE_DESCRIPTION("Raspberry Pi power domain driver"); -MODULE_LICENSE("GPL v2"); -- cgit v1.2.3 From 122b084d16bda75de74421ede63cb86a24289808 Mon Sep 17 00:00:00 2001 From: Nick Alcock Date: Wed, 22 Feb 2023 12:14:31 +0000 Subject: kbuild, soc: bcm: bcm2835-power: remove MODULE_LICENSE in non-modules Since commit 8b41fc4454e ("kbuild: create modules.builtin without Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations are used to identify modules. As a consequence, uses of the macro in non-modules will cause modprobe to misidentify their containing object file as a module when it is not (false positives), and modprobe might succeed rather than failing with a suitable error message. So remove it in the files in this commit, none of which can be built as modules. Signed-off-by: Nick Alcock Suggested-by: Luis Chamberlain Cc: Luis Chamberlain Cc: linux-modules@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Hitomi Hasegawa Cc: Florian Fainelli Cc: Ray Jui Cc: Scott Branden Cc: Philipp Zabel Cc: linux-rpi-kernel@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Florian Fainelli --- drivers/soc/bcm/bcm2835-power.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/bcm/bcm2835-power.c b/drivers/soc/bcm/bcm2835-power.c index bf51f03f77d6..1a179d4e011c 100644 --- a/drivers/soc/bcm/bcm2835-power.c +++ b/drivers/soc/bcm/bcm2835-power.c @@ -711,4 +711,3 @@ module_platform_driver(bcm2835_power_driver); MODULE_AUTHOR("Eric Anholt "); MODULE_DESCRIPTION("Driver for Broadcom BCM2835 PM power domains and reset"); -MODULE_LICENSE("GPL"); -- cgit v1.2.3 From 69160dd0aa6832b98d272c1a224b1aaf67cf843d Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 24 Feb 2023 13:52:39 -0800 Subject: soc: bcm: brcmstb: Remove bare-metal ARM suspend/resume code Since 2018 these platforms have supported entry via the ARM Trusted Firmware using the standard PSCI SYSTEM_SUSPEND function calls. Remove this legacy code. Link: https://lore.kernel.org/r/20230224215249.239405-1-f.fainelli@gmail.com Signed-off-by: Florian Fainelli --- drivers/soc/bcm/brcmstb/Kconfig | 4 +- drivers/soc/bcm/brcmstb/pm/Makefile | 1 - drivers/soc/bcm/brcmstb/pm/aon_defs.h | 105 ---- drivers/soc/bcm/brcmstb/pm/pm-arm.c | 874 ---------------------------------- drivers/soc/bcm/brcmstb/pm/s2-arm.S | 69 --- 5 files changed, 1 insertion(+), 1052 deletions(-) delete mode 100644 drivers/soc/bcm/brcmstb/pm/aon_defs.h delete mode 100644 drivers/soc/bcm/brcmstb/pm/pm-arm.c delete mode 100644 drivers/soc/bcm/brcmstb/pm/s2-arm.S (limited to 'drivers') diff --git a/drivers/soc/bcm/brcmstb/Kconfig b/drivers/soc/bcm/brcmstb/Kconfig index 38e476905d96..c68d0e5267c4 100644 --- a/drivers/soc/bcm/brcmstb/Kconfig +++ b/drivers/soc/bcm/brcmstb/Kconfig @@ -4,8 +4,6 @@ if SOC_BRCMSTB config BRCMSTB_PM bool "Support suspend/resume for STB platforms" default y - depends on PM - depends on ARCH_BRCMSTB || BMIPS_GENERIC - select ARM_CPU_SUSPEND if ARM + depends on PM && BMIPS_GENERIC endif # SOC_BRCMSTB diff --git a/drivers/soc/bcm/brcmstb/pm/Makefile b/drivers/soc/bcm/brcmstb/pm/Makefile index f849cfa69446..9133a9ee0782 100644 --- a/drivers/soc/bcm/brcmstb/pm/Makefile +++ b/drivers/soc/bcm/brcmstb/pm/Makefile @@ -1,3 +1,2 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-$(CONFIG_ARM) += s2-arm.o pm-arm.o obj-$(CONFIG_BMIPS_GENERIC) += s2-mips.o s3-mips.o pm-mips.o diff --git a/drivers/soc/bcm/brcmstb/pm/aon_defs.h b/drivers/soc/bcm/brcmstb/pm/aon_defs.h deleted file mode 100644 index f695262ac930..000000000000 --- a/drivers/soc/bcm/brcmstb/pm/aon_defs.h +++ /dev/null @@ -1,105 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Always ON (AON) register interface between bootloader and Linux - * - * Copyright © 2014-2017 Broadcom - */ - -#ifndef __BRCMSTB_AON_DEFS_H__ -#define __BRCMSTB_AON_DEFS_H__ - -#include - -/* Magic number in upper 16-bits */ -#define BRCMSTB_S3_MAGIC_MASK 0xffff0000 -#define BRCMSTB_S3_MAGIC_SHORT 0x5AFE0000 - -enum { - /* Restore random key for AES memory verification (off = fixed key) */ - S3_FLAG_LOAD_RANDKEY = (1 << 0), - - /* Scratch buffer page table is present */ - S3_FLAG_SCRATCH_BUFFER_TABLE = (1 << 1), - - /* Skip all memory verification */ - S3_FLAG_NO_MEM_VERIFY = (1 << 2), - - /* - * Modification of this bit reserved for bootloader only. - * 1=PSCI started Linux, 0=Direct jump to Linux. - */ - S3_FLAG_PSCI_BOOT = (1 << 3), - - /* - * Modification of this bit reserved for bootloader only. - * 1=64 bit boot, 0=32 bit boot. - */ - S3_FLAG_BOOTED64 = (1 << 4), -}; - -#define BRCMSTB_HASH_LEN (128 / 8) /* 128-bit hash */ - -#define AON_REG_MAGIC_FLAGS 0x00 -#define AON_REG_CONTROL_LOW 0x04 -#define AON_REG_CONTROL_HIGH 0x08 -#define AON_REG_S3_HASH 0x0c /* hash of S3 params */ -#define AON_REG_CONTROL_HASH_LEN 0x1c -#define AON_REG_PANIC 0x20 - -#define BRCMSTB_S3_MAGIC 0x5AFEB007 -#define BRCMSTB_PANIC_MAGIC 0x512E115E -#define BOOTLOADER_SCRATCH_SIZE 64 -#define BRCMSTB_DTU_STATE_MAP_ENTRIES (8*1024) -#define BRCMSTB_DTU_CONFIG_ENTRIES (512) -#define BRCMSTB_DTU_COUNT (2) - -#define IMAGE_DESCRIPTORS_BUFSIZE (2 * 1024) -#define S3_BOOTLOADER_RESERVED (S3_FLAG_PSCI_BOOT | S3_FLAG_BOOTED64) - -struct brcmstb_bootloader_dtu_table { - uint32_t dtu_state_map[BRCMSTB_DTU_STATE_MAP_ENTRIES]; - uint32_t dtu_config[BRCMSTB_DTU_CONFIG_ENTRIES]; -}; - -/* - * Bootloader utilizes a custom parameter block left in DRAM for handling S3 - * warm resume - */ -struct brcmstb_s3_params { - /* scratch memory for bootloader */ - uint8_t scratch[BOOTLOADER_SCRATCH_SIZE]; - - uint32_t magic; /* BRCMSTB_S3_MAGIC */ - uint64_t reentry; /* PA */ - - /* descriptors */ - uint32_t hash[BRCMSTB_HASH_LEN / 4]; - - /* - * If 0, then ignore this parameter (there is only one set of - * descriptors) - * - * If non-0, then a second set of descriptors is stored at: - * - * descriptors + desc_offset_2 - * - * The MAC result of both descriptors is XOR'd and stored in @hash - */ - uint32_t desc_offset_2; - - /* - * (Physical) address of a brcmstb_bootloader_scratch_table, for - * providing a large DRAM buffer to the bootloader - */ - uint64_t buffer_table; - - uint32_t spare[70]; - - uint8_t descriptors[IMAGE_DESCRIPTORS_BUFSIZE]; - /* - * Must be last member of struct. See brcmstb_pm_s3_finish() for reason. - */ - struct brcmstb_bootloader_dtu_table dtu[BRCMSTB_DTU_COUNT]; -} __packed; - -#endif /* __BRCMSTB_AON_DEFS_H__ */ diff --git a/drivers/soc/bcm/brcmstb/pm/pm-arm.c b/drivers/soc/bcm/brcmstb/pm/pm-arm.c deleted file mode 100644 index d681cd24c6e1..000000000000 --- a/drivers/soc/bcm/brcmstb/pm/pm-arm.c +++ /dev/null @@ -1,874 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * ARM-specific support for Broadcom STB S2/S3/S5 power management - * - * S2: clock gate CPUs and as many peripherals as possible - * S3: power off all of the chip except the Always ON (AON) island; keep DDR is - * self-refresh - * S5: (a.k.a. S3 cold boot) much like S3, except DDR is powered down, so we - * treat this mode like a soft power-off, with wakeup allowed from AON - * - * Copyright © 2014-2017 Broadcom - */ - -#define pr_fmt(fmt) "brcmstb-pm: " fmt - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "pm.h" -#include "aon_defs.h" - -#define SHIMPHY_DDR_PAD_CNTRL 0x8c - -/* Method #0 */ -#define SHIMPHY_PAD_PLL_SEQUENCE BIT(8) -#define SHIMPHY_PAD_GATE_PLL_S3 BIT(9) - -/* Method #1 */ -#define PWRDWN_SEQ_NO_SEQUENCING 0 -#define PWRDWN_SEQ_HOLD_CHANNEL 1 -#define PWRDWN_SEQ_RESET_PLL 2 -#define PWRDWN_SEQ_POWERDOWN_PLL 3 - -#define SHIMPHY_PAD_S3_PWRDWN_SEQ_MASK 0x00f00000 -#define SHIMPHY_PAD_S3_PWRDWN_SEQ_SHIFT 20 - -#define DDR_FORCE_CKE_RST_N BIT(3) -#define DDR_PHY_RST_N BIT(2) -#define DDR_PHY_CKE BIT(1) - -#define DDR_PHY_NO_CHANNEL 0xffffffff - -#define MAX_NUM_MEMC 3 - -struct brcmstb_memc { - void __iomem *ddr_phy_base; - void __iomem *ddr_shimphy_base; - void __iomem *ddr_ctrl; -}; - -struct brcmstb_pm_control { - void __iomem *aon_ctrl_base; - void __iomem *aon_sram; - struct brcmstb_memc memcs[MAX_NUM_MEMC]; - - void __iomem *boot_sram; - size_t boot_sram_len; - - bool support_warm_boot; - size_t pll_status_offset; - int num_memc; - - struct brcmstb_s3_params *s3_params; - dma_addr_t s3_params_pa; - int s3entry_method; - u32 warm_boot_offset; - u32 phy_a_standby_ctrl_offs; - u32 phy_b_standby_ctrl_offs; - bool needs_ddr_pad; - struct platform_device *pdev; -}; - -enum bsp_initiate_command { - BSP_CLOCK_STOP = 0x00, - BSP_GEN_RANDOM_KEY = 0x4A, - BSP_RESTORE_RANDOM_KEY = 0x55, - BSP_GEN_FIXED_KEY = 0x63, -}; - -#define PM_INITIATE 0x01 -#define PM_INITIATE_SUCCESS 0x00 -#define PM_INITIATE_FAIL 0xfe - -static struct brcmstb_pm_control ctrl; - -noinline int brcmstb_pm_s3_finish(void); - -static int (*brcmstb_pm_do_s2_sram)(void __iomem *aon_ctrl_base, - void __iomem *ddr_phy_pll_status); - -static int brcmstb_init_sram(struct device_node *dn) -{ - void __iomem *sram; - struct resource res; - int ret; - - ret = of_address_to_resource(dn, 0, &res); - if (ret) - return ret; - - /* Uncached, executable remapping of SRAM */ - sram = __arm_ioremap_exec(res.start, resource_size(&res), false); - if (!sram) - return -ENOMEM; - - ctrl.boot_sram = sram; - ctrl.boot_sram_len = resource_size(&res); - - return 0; -} - -static const struct of_device_id sram_dt_ids[] = { - { .compatible = "mmio-sram" }, - { /* sentinel */ } -}; - -static int do_bsp_initiate_command(enum bsp_initiate_command cmd) -{ - void __iomem *base = ctrl.aon_ctrl_base; - int ret; - int timeo = 1000 * 1000; /* 1 second */ - - writel_relaxed(0, base + AON_CTRL_PM_INITIATE); - (void)readl_relaxed(base + AON_CTRL_PM_INITIATE); - - /* Go! */ - writel_relaxed((cmd << 1) | PM_INITIATE, base + AON_CTRL_PM_INITIATE); - - /* - * If firmware doesn't support the 'ack', then just assume it's done - * after 10ms. Note that this only works for command 0, BSP_CLOCK_STOP - */ - if (of_machine_is_compatible("brcm,bcm74371a0")) { - (void)readl_relaxed(base + AON_CTRL_PM_INITIATE); - mdelay(10); - return 0; - } - - for (;;) { - ret = readl_relaxed(base + AON_CTRL_PM_INITIATE); - if (!(ret & PM_INITIATE)) - break; - if (timeo <= 0) { - pr_err("error: timeout waiting for BSP (%x)\n", ret); - break; - } - timeo -= 50; - udelay(50); - } - - return (ret & 0xff) != PM_INITIATE_SUCCESS; -} - -static int brcmstb_pm_handshake(void) -{ - void __iomem *base = ctrl.aon_ctrl_base; - u32 tmp; - int ret; - - /* BSP power handshake, v1 */ - tmp = readl_relaxed(base + AON_CTRL_HOST_MISC_CMDS); - tmp &= ~1UL; - writel_relaxed(tmp, base + AON_CTRL_HOST_MISC_CMDS); - (void)readl_relaxed(base + AON_CTRL_HOST_MISC_CMDS); - - ret = do_bsp_initiate_command(BSP_CLOCK_STOP); - if (ret) - pr_err("BSP handshake failed\n"); - - /* - * HACK: BSP may have internal race on the CLOCK_STOP command. - * Avoid touching the BSP for a few milliseconds. - */ - mdelay(3); - - return ret; -} - -static inline void shimphy_set(u32 value, u32 mask) -{ - int i; - - if (!ctrl.needs_ddr_pad) - return; - - for (i = 0; i < ctrl.num_memc; i++) { - u32 tmp; - - tmp = readl_relaxed(ctrl.memcs[i].ddr_shimphy_base + - SHIMPHY_DDR_PAD_CNTRL); - tmp = value | (tmp & mask); - writel_relaxed(tmp, ctrl.memcs[i].ddr_shimphy_base + - SHIMPHY_DDR_PAD_CNTRL); - } - wmb(); /* Complete sequence in order. */ -} - -static inline void ddr_ctrl_set(bool warmboot) -{ - int i; - - for (i = 0; i < ctrl.num_memc; i++) { - u32 tmp; - - tmp = readl_relaxed(ctrl.memcs[i].ddr_ctrl + - ctrl.warm_boot_offset); - if (warmboot) - tmp |= 1; - else - tmp &= ~1; /* Cold boot */ - writel_relaxed(tmp, ctrl.memcs[i].ddr_ctrl + - ctrl.warm_boot_offset); - } - /* Complete sequence in order */ - wmb(); -} - -static inline void s3entry_method0(void) -{ - shimphy_set(SHIMPHY_PAD_GATE_PLL_S3 | SHIMPHY_PAD_PLL_SEQUENCE, - 0xffffffff); -} - -static inline void s3entry_method1(void) -{ - /* - * S3 Entry Sequence - * ----------------- - * Step 1: SHIMPHY_ADDR_CNTL_0_DDR_PAD_CNTRL [ S3_PWRDWN_SEQ ] = 3 - * Step 2: MEMC_DDR_0_WARM_BOOT [ WARM_BOOT ] = 1 - */ - shimphy_set((PWRDWN_SEQ_POWERDOWN_PLL << - SHIMPHY_PAD_S3_PWRDWN_SEQ_SHIFT), - ~SHIMPHY_PAD_S3_PWRDWN_SEQ_MASK); - - ddr_ctrl_set(true); -} - -static inline void s5entry_method1(void) -{ - int i; - - /* - * S5 Entry Sequence - * ----------------- - * Step 1: SHIMPHY_ADDR_CNTL_0_DDR_PAD_CNTRL [ S3_PWRDWN_SEQ ] = 3 - * Step 2: MEMC_DDR_0_WARM_BOOT [ WARM_BOOT ] = 0 - * Step 3: DDR_PHY_CONTROL_REGS_[AB]_0_STANDBY_CONTROL[ CKE ] = 0 - * DDR_PHY_CONTROL_REGS_[AB]_0_STANDBY_CONTROL[ RST_N ] = 0 - */ - shimphy_set((PWRDWN_SEQ_POWERDOWN_PLL << - SHIMPHY_PAD_S3_PWRDWN_SEQ_SHIFT), - ~SHIMPHY_PAD_S3_PWRDWN_SEQ_MASK); - - ddr_ctrl_set(false); - - for (i = 0; i < ctrl.num_memc; i++) { - u32 tmp; - - /* Step 3: Channel A (RST_N = CKE = 0) */ - tmp = readl_relaxed(ctrl.memcs[i].ddr_phy_base + - ctrl.phy_a_standby_ctrl_offs); - tmp &= ~(DDR_PHY_RST_N | DDR_PHY_RST_N); - writel_relaxed(tmp, ctrl.memcs[i].ddr_phy_base + - ctrl.phy_a_standby_ctrl_offs); - - /* Step 3: Channel B? */ - if (ctrl.phy_b_standby_ctrl_offs != DDR_PHY_NO_CHANNEL) { - tmp = readl_relaxed(ctrl.memcs[i].ddr_phy_base + - ctrl.phy_b_standby_ctrl_offs); - tmp &= ~(DDR_PHY_RST_N | DDR_PHY_RST_N); - writel_relaxed(tmp, ctrl.memcs[i].ddr_phy_base + - ctrl.phy_b_standby_ctrl_offs); - } - } - /* Must complete */ - wmb(); -} - -/* - * Run a Power Management State Machine (PMSM) shutdown command and put the CPU - * into a low-power mode - */ -static void brcmstb_do_pmsm_power_down(unsigned long base_cmd, bool onewrite) -{ - void __iomem *base = ctrl.aon_ctrl_base; - - if ((ctrl.s3entry_method == 1) && (base_cmd == PM_COLD_CONFIG)) - s5entry_method1(); - - /* pm_start_pwrdn transition 0->1 */ - writel_relaxed(base_cmd, base + AON_CTRL_PM_CTRL); - - if (!onewrite) { - (void)readl_relaxed(base + AON_CTRL_PM_CTRL); - - writel_relaxed(base_cmd | PM_PWR_DOWN, base + AON_CTRL_PM_CTRL); - (void)readl_relaxed(base + AON_CTRL_PM_CTRL); - } - wfi(); -} - -/* Support S5 cold boot out of "poweroff" */ -static void brcmstb_pm_poweroff(void) -{ - brcmstb_pm_handshake(); - - /* Clear magic S3 warm-boot value */ - writel_relaxed(0, ctrl.aon_sram + AON_REG_MAGIC_FLAGS); - (void)readl_relaxed(ctrl.aon_sram + AON_REG_MAGIC_FLAGS); - - /* Skip wait-for-interrupt signal; just use a countdown */ - writel_relaxed(0x10, ctrl.aon_ctrl_base + AON_CTRL_PM_CPU_WAIT_COUNT); - (void)readl_relaxed(ctrl.aon_ctrl_base + AON_CTRL_PM_CPU_WAIT_COUNT); - - if (ctrl.s3entry_method == 1) { - shimphy_set((PWRDWN_SEQ_POWERDOWN_PLL << - SHIMPHY_PAD_S3_PWRDWN_SEQ_SHIFT), - ~SHIMPHY_PAD_S3_PWRDWN_SEQ_MASK); - ddr_ctrl_set(false); - brcmstb_do_pmsm_power_down(M1_PM_COLD_CONFIG, true); - return; /* We should never actually get here */ - } - - brcmstb_do_pmsm_power_down(PM_COLD_CONFIG, false); -} - -static void *brcmstb_pm_copy_to_sram(void *fn, size_t len) -{ - unsigned int size = ALIGN(len, FNCPY_ALIGN); - - if (ctrl.boot_sram_len < size) { - pr_err("standby code will not fit in SRAM\n"); - return NULL; - } - - return fncpy(ctrl.boot_sram, fn, size); -} - -/* - * S2 suspend/resume picks up where we left off, so we must execute carefully - * from SRAM, in order to allow DDR to come back up safely before we continue. - */ -static int brcmstb_pm_s2(void) -{ - /* A previous S3 can set a value hazardous to S2, so make sure. */ - if (ctrl.s3entry_method == 1) { - shimphy_set((PWRDWN_SEQ_NO_SEQUENCING << - SHIMPHY_PAD_S3_PWRDWN_SEQ_SHIFT), - ~SHIMPHY_PAD_S3_PWRDWN_SEQ_MASK); - ddr_ctrl_set(false); - } - - brcmstb_pm_do_s2_sram = brcmstb_pm_copy_to_sram(&brcmstb_pm_do_s2, - brcmstb_pm_do_s2_sz); - if (!brcmstb_pm_do_s2_sram) - return -EINVAL; - - return brcmstb_pm_do_s2_sram(ctrl.aon_ctrl_base, - ctrl.memcs[0].ddr_phy_base + - ctrl.pll_status_offset); -} - -/* - * This function is called on a new stack, so don't allow inlining (which will - * generate stack references on the old stack). It cannot be made static because - * it is referenced from brcmstb_pm_s3() - */ -noinline int brcmstb_pm_s3_finish(void) -{ - struct brcmstb_s3_params *params = ctrl.s3_params; - dma_addr_t params_pa = ctrl.s3_params_pa; - phys_addr_t reentry = virt_to_phys(&cpu_resume_arm); - enum bsp_initiate_command cmd; - u32 flags; - - /* - * Clear parameter structure, but not DTU area, which has already been - * filled in. We know DTU is a the end, so we can just subtract its - * size. - */ - memset(params, 0, sizeof(*params) - sizeof(params->dtu)); - - flags = readl_relaxed(ctrl.aon_sram + AON_REG_MAGIC_FLAGS); - - flags &= S3_BOOTLOADER_RESERVED; - flags |= S3_FLAG_NO_MEM_VERIFY; - flags |= S3_FLAG_LOAD_RANDKEY; - - /* Load random / fixed key */ - if (flags & S3_FLAG_LOAD_RANDKEY) - cmd = BSP_GEN_RANDOM_KEY; - else - cmd = BSP_GEN_FIXED_KEY; - if (do_bsp_initiate_command(cmd)) { - pr_info("key loading failed\n"); - return -EIO; - } - - params->magic = BRCMSTB_S3_MAGIC; - params->reentry = reentry; - - /* No more writes to DRAM */ - flush_cache_all(); - - flags |= BRCMSTB_S3_MAGIC_SHORT; - - writel_relaxed(flags, ctrl.aon_sram + AON_REG_MAGIC_FLAGS); - writel_relaxed(lower_32_bits(params_pa), - ctrl.aon_sram + AON_REG_CONTROL_LOW); - writel_relaxed(upper_32_bits(params_pa), - ctrl.aon_sram + AON_REG_CONTROL_HIGH); - - switch (ctrl.s3entry_method) { - case 0: - s3entry_method0(); - brcmstb_do_pmsm_power_down(PM_WARM_CONFIG, false); - break; - case 1: - s3entry_method1(); - brcmstb_do_pmsm_power_down(M1_PM_WARM_CONFIG, true); - break; - default: - return -EINVAL; - } - - /* Must have been interrupted from wfi()? */ - return -EINTR; -} - -static int brcmstb_pm_do_s3(unsigned long sp) -{ - unsigned long save_sp; - int ret; - - asm volatile ( - "mov %[save], sp\n" - "mov sp, %[new]\n" - "bl brcmstb_pm_s3_finish\n" - "mov %[ret], r0\n" - "mov %[new], sp\n" - "mov sp, %[save]\n" - : [save] "=&r" (save_sp), [ret] "=&r" (ret) - : [new] "r" (sp) - ); - - return ret; -} - -static int brcmstb_pm_s3(void) -{ - void __iomem *sp = ctrl.boot_sram + ctrl.boot_sram_len; - - return cpu_suspend((unsigned long)sp, brcmstb_pm_do_s3); -} - -static int brcmstb_pm_standby(bool deep_standby) -{ - int ret; - - if (brcmstb_pm_handshake()) - return -EIO; - - if (deep_standby) - ret = brcmstb_pm_s3(); - else - ret = brcmstb_pm_s2(); - if (ret) - pr_err("%s: standby failed\n", __func__); - - return ret; -} - -static int brcmstb_pm_enter(suspend_state_t state) -{ - int ret = -EINVAL; - - switch (state) { - case PM_SUSPEND_STANDBY: - ret = brcmstb_pm_standby(false); - break; - case PM_SUSPEND_MEM: - ret = brcmstb_pm_standby(true); - break; - } - - return ret; -} - -static int brcmstb_pm_valid(suspend_state_t state) -{ - switch (state) { - case PM_SUSPEND_STANDBY: - return true; - case PM_SUSPEND_MEM: - return ctrl.support_warm_boot; - default: - return false; - } -} - -static const struct platform_suspend_ops brcmstb_pm_ops = { - .enter = brcmstb_pm_enter, - .valid = brcmstb_pm_valid, -}; - -static const struct of_device_id aon_ctrl_dt_ids[] = { - { .compatible = "brcm,brcmstb-aon-ctrl" }, - {} -}; - -struct ddr_phy_ofdata { - bool supports_warm_boot; - size_t pll_status_offset; - int s3entry_method; - u32 warm_boot_offset; - u32 phy_a_standby_ctrl_offs; - u32 phy_b_standby_ctrl_offs; -}; - -static struct ddr_phy_ofdata ddr_phy_71_1 = { - .supports_warm_boot = true, - .pll_status_offset = 0x0c, - .s3entry_method = 1, - .warm_boot_offset = 0x2c, - .phy_a_standby_ctrl_offs = 0x198, - .phy_b_standby_ctrl_offs = DDR_PHY_NO_CHANNEL -}; - -static struct ddr_phy_ofdata ddr_phy_72_0 = { - .supports_warm_boot = true, - .pll_status_offset = 0x10, - .s3entry_method = 1, - .warm_boot_offset = 0x40, - .phy_a_standby_ctrl_offs = 0x2a4, - .phy_b_standby_ctrl_offs = 0x8a4 -}; - -static struct ddr_phy_ofdata ddr_phy_225_1 = { - .supports_warm_boot = false, - .pll_status_offset = 0x4, - .s3entry_method = 0 -}; - -static struct ddr_phy_ofdata ddr_phy_240_1 = { - .supports_warm_boot = true, - .pll_status_offset = 0x4, - .s3entry_method = 0 -}; - -static const struct of_device_id ddr_phy_dt_ids[] = { - { - .compatible = "brcm,brcmstb-ddr-phy-v71.1", - .data = &ddr_phy_71_1, - }, - { - .compatible = "brcm,brcmstb-ddr-phy-v72.0", - .data = &ddr_phy_72_0, - }, - { - .compatible = "brcm,brcmstb-ddr-phy-v225.1", - .data = &ddr_phy_225_1, - }, - { - .compatible = "brcm,brcmstb-ddr-phy-v240.1", - .data = &ddr_phy_240_1, - }, - { - /* Same as v240.1, for the registers we care about */ - .compatible = "brcm,brcmstb-ddr-phy-v240.2", - .data = &ddr_phy_240_1, - }, - {} -}; - -struct ddr_seq_ofdata { - bool needs_ddr_pad; - u32 warm_boot_offset; -}; - -static const struct ddr_seq_ofdata ddr_seq_b22 = { - .needs_ddr_pad = false, - .warm_boot_offset = 0x2c, -}; - -static const struct ddr_seq_ofdata ddr_seq = { - .needs_ddr_pad = true, -}; - -static const struct of_device_id ddr_shimphy_dt_ids[] = { - { .compatible = "brcm,brcmstb-ddr-shimphy-v1.0" }, - {} -}; - -static const struct of_device_id brcmstb_memc_of_match[] = { - { - .compatible = "brcm,brcmstb-memc-ddr-rev-b.2.1", - .data = &ddr_seq, - }, - { - .compatible = "brcm,brcmstb-memc-ddr-rev-b.2.2", - .data = &ddr_seq_b22, - }, - { - .compatible = "brcm,brcmstb-memc-ddr-rev-b.2.3", - .data = &ddr_seq_b22, - }, - { - .compatible = "brcm,brcmstb-memc-ddr-rev-b.3.0", - .data = &ddr_seq_b22, - }, - { - .compatible = "brcm,brcmstb-memc-ddr-rev-b.3.1", - .data = &ddr_seq_b22, - }, - { - .compatible = "brcm,brcmstb-memc-ddr", - .data = &ddr_seq, - }, - {}, -}; - -static void __iomem *brcmstb_ioremap_match(const struct of_device_id *matches, - int index, const void **ofdata) -{ - struct device_node *dn; - const struct of_device_id *match; - - dn = of_find_matching_node_and_match(NULL, matches, &match); - if (!dn) - return ERR_PTR(-EINVAL); - - if (ofdata) - *ofdata = match->data; - - return of_io_request_and_map(dn, index, dn->full_name); -} -/* - * The AON is a small domain in the SoC that can retain its state across - * various system wide sleep states and specific reset conditions; the - * AON DATA RAM is a small RAM of a few words (< 1KB) which can store - * persistent information across such events. - * - * The purpose of the below panic notifier is to help with notifying - * the bootloader that a panic occurred and so that it should try its - * best to preserve the DRAM contents holding that buffer for recovery - * by the kernel as opposed to wiping out DRAM clean again. - * - * Reference: comment from Florian Fainelli, at - * https://lore.kernel.org/lkml/781cafb0-8d06-8b56-907a-5175c2da196a@gmail.com - */ -static int brcmstb_pm_panic_notify(struct notifier_block *nb, - unsigned long action, void *data) -{ - writel_relaxed(BRCMSTB_PANIC_MAGIC, ctrl.aon_sram + AON_REG_PANIC); - - return NOTIFY_DONE; -} - -static struct notifier_block brcmstb_pm_panic_nb = { - .notifier_call = brcmstb_pm_panic_notify, -}; - -static int brcmstb_pm_probe(struct platform_device *pdev) -{ - const struct ddr_phy_ofdata *ddr_phy_data; - const struct ddr_seq_ofdata *ddr_seq_data; - const struct of_device_id *of_id = NULL; - struct device_node *dn; - void __iomem *base; - int ret, i, s; - - /* AON ctrl registers */ - base = brcmstb_ioremap_match(aon_ctrl_dt_ids, 0, NULL); - if (IS_ERR(base)) { - pr_err("error mapping AON_CTRL\n"); - ret = PTR_ERR(base); - goto aon_err; - } - ctrl.aon_ctrl_base = base; - - /* AON SRAM registers */ - base = brcmstb_ioremap_match(aon_ctrl_dt_ids, 1, NULL); - if (IS_ERR(base)) { - /* Assume standard offset */ - ctrl.aon_sram = ctrl.aon_ctrl_base + - AON_CTRL_SYSTEM_DATA_RAM_OFS; - s = 0; - } else { - ctrl.aon_sram = base; - s = 1; - } - - writel_relaxed(0, ctrl.aon_sram + AON_REG_PANIC); - - /* DDR PHY registers */ - base = brcmstb_ioremap_match(ddr_phy_dt_ids, 0, - (const void **)&ddr_phy_data); - if (IS_ERR(base)) { - pr_err("error mapping DDR PHY\n"); - ret = PTR_ERR(base); - goto ddr_phy_err; - } - ctrl.support_warm_boot = ddr_phy_data->supports_warm_boot; - ctrl.pll_status_offset = ddr_phy_data->pll_status_offset; - /* Only need DDR PHY 0 for now? */ - ctrl.memcs[0].ddr_phy_base = base; - ctrl.s3entry_method = ddr_phy_data->s3entry_method; - ctrl.phy_a_standby_ctrl_offs = ddr_phy_data->phy_a_standby_ctrl_offs; - ctrl.phy_b_standby_ctrl_offs = ddr_phy_data->phy_b_standby_ctrl_offs; - /* - * Slightly gross to use the phy ver to get a memc, - * offset but that is the only versioned things so far - * we can test for. - */ - ctrl.warm_boot_offset = ddr_phy_data->warm_boot_offset; - - /* DDR SHIM-PHY registers */ - for_each_matching_node(dn, ddr_shimphy_dt_ids) { - i = ctrl.num_memc; - if (i >= MAX_NUM_MEMC) { - of_node_put(dn); - pr_warn("too many MEMCs (max %d)\n", MAX_NUM_MEMC); - break; - } - - base = of_io_request_and_map(dn, 0, dn->full_name); - if (IS_ERR(base)) { - of_node_put(dn); - if (!ctrl.support_warm_boot) - break; - - pr_err("error mapping DDR SHIMPHY %d\n", i); - ret = PTR_ERR(base); - goto ddr_shimphy_err; - } - ctrl.memcs[i].ddr_shimphy_base = base; - ctrl.num_memc++; - } - - /* Sequencer DRAM Param and Control Registers */ - i = 0; - for_each_matching_node(dn, brcmstb_memc_of_match) { - base = of_iomap(dn, 0); - if (!base) { - of_node_put(dn); - pr_err("error mapping DDR Sequencer %d\n", i); - ret = -ENOMEM; - goto brcmstb_memc_err; - } - - of_id = of_match_node(brcmstb_memc_of_match, dn); - if (!of_id) { - iounmap(base); - of_node_put(dn); - ret = -EINVAL; - goto brcmstb_memc_err; - } - - ddr_seq_data = of_id->data; - ctrl.needs_ddr_pad = ddr_seq_data->needs_ddr_pad; - /* Adjust warm boot offset based on the DDR sequencer */ - if (ddr_seq_data->warm_boot_offset) - ctrl.warm_boot_offset = ddr_seq_data->warm_boot_offset; - - ctrl.memcs[i].ddr_ctrl = base; - i++; - } - - pr_debug("PM: supports warm boot:%d, method:%d, wboffs:%x\n", - ctrl.support_warm_boot, ctrl.s3entry_method, - ctrl.warm_boot_offset); - - dn = of_find_matching_node(NULL, sram_dt_ids); - if (!dn) { - pr_err("SRAM not found\n"); - ret = -EINVAL; - goto brcmstb_memc_err; - } - - ret = brcmstb_init_sram(dn); - of_node_put(dn); - if (ret) { - pr_err("error setting up SRAM for PM\n"); - goto brcmstb_memc_err; - } - - ctrl.pdev = pdev; - - ctrl.s3_params = kmalloc(sizeof(*ctrl.s3_params), GFP_KERNEL); - if (!ctrl.s3_params) { - ret = -ENOMEM; - goto s3_params_err; - } - ctrl.s3_params_pa = dma_map_single(&pdev->dev, ctrl.s3_params, - sizeof(*ctrl.s3_params), - DMA_TO_DEVICE); - if (dma_mapping_error(&pdev->dev, ctrl.s3_params_pa)) { - pr_err("error mapping DMA memory\n"); - ret = -ENOMEM; - goto out; - } - - atomic_notifier_chain_register(&panic_notifier_list, - &brcmstb_pm_panic_nb); - - pm_power_off = brcmstb_pm_poweroff; - suspend_set_ops(&brcmstb_pm_ops); - - return 0; - -out: - kfree(ctrl.s3_params); -s3_params_err: - iounmap(ctrl.boot_sram); -brcmstb_memc_err: - for (i--; i >= 0; i--) - iounmap(ctrl.memcs[i].ddr_ctrl); -ddr_shimphy_err: - for (i = 0; i < ctrl.num_memc; i++) - iounmap(ctrl.memcs[i].ddr_shimphy_base); - - iounmap(ctrl.memcs[0].ddr_phy_base); -ddr_phy_err: - iounmap(ctrl.aon_ctrl_base); - if (s) - iounmap(ctrl.aon_sram); -aon_err: - pr_warn("PM: initialization failed with code %d\n", ret); - - return ret; -} - -static struct platform_driver brcmstb_pm_driver = { - .driver = { - .name = "brcmstb-pm", - .of_match_table = aon_ctrl_dt_ids, - }, -}; - -static int __init brcmstb_pm_init(void) -{ - return platform_driver_probe(&brcmstb_pm_driver, - brcmstb_pm_probe); -} -module_init(brcmstb_pm_init); diff --git a/drivers/soc/bcm/brcmstb/pm/s2-arm.S b/drivers/soc/bcm/brcmstb/pm/s2-arm.S deleted file mode 100644 index 0d693795de27..000000000000 --- a/drivers/soc/bcm/brcmstb/pm/s2-arm.S +++ /dev/null @@ -1,69 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright © 2014-2017 Broadcom - */ - -#include -#include - -#include "pm.h" - - .arch armv7-a - .text - .align 3 - -#define AON_CTRL_REG r10 -#define DDR_PHY_STATUS_REG r11 - -/* - * r0: AON_CTRL base address - * r1: DDRY PHY PLL status register address - */ -ENTRY(brcmstb_pm_do_s2) - stmfd sp!, {r4-r11, lr} - mov AON_CTRL_REG, r0 - mov DDR_PHY_STATUS_REG, r1 - - /* Flush memory transactions */ - dsb - - /* Cache DDR_PHY_STATUS_REG translation */ - ldr r0, [DDR_PHY_STATUS_REG] - - /* power down request */ - ldr r0, =PM_S2_COMMAND - ldr r1, =0 - str r1, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] - ldr r1, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] - str r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] - ldr r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] - - /* Wait for interrupt */ - wfi - nop - - /* Bring MEMC back up */ -1: ldr r0, [DDR_PHY_STATUS_REG] - ands r0, #1 - beq 1b - - /* Power-up handshake */ - ldr r0, =1 - str r0, [AON_CTRL_REG, #AON_CTRL_HOST_MISC_CMDS] - ldr r0, [AON_CTRL_REG, #AON_CTRL_HOST_MISC_CMDS] - - ldr r0, =0 - str r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] - ldr r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] - - /* Return to caller */ - ldr r0, =0 - ldmfd sp!, {r4-r11, pc} - - ENDPROC(brcmstb_pm_do_s2) - - /* Place literal pool here */ - .ltorg - -ENTRY(brcmstb_pm_do_s2_sz) - .word . - brcmstb_pm_do_s2 -- cgit v1.2.3 From 49f965b6fbca63904d7397ce96066fa992f401a3 Mon Sep 17 00:00:00 2001 From: Jesse Taube Date: Tue, 14 Mar 2023 17:10:30 -0400 Subject: soc: canaan: Make K210_SYSCTL depend on CLK_K210 CLK_K210 is no longer a dependency of SOC_CANAAN, but K210_SYSCTL depends on CLK_K210. This patch makes K210_SYSCTL depend on CLK_K210. Also fix whitespace errors. Reported-by: Randy Dunlap Link: https://lore.kernel.org/all/42446784-a88b-df09-41e9-5f685b4df6ee@infradead.org Fixes: 3af577f9826f ("RISC-V: stop directly selecting drivers for SOC_CANAAN") Signed-off-by: Jesse Taube Reviewed-by: Damien Le Moal Signed-off-by: Conor Dooley --- drivers/soc/canaan/Kconfig | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/canaan/Kconfig b/drivers/soc/canaan/Kconfig index 2527cf5757ec..43ced2bf8444 100644 --- a/drivers/soc/canaan/Kconfig +++ b/drivers/soc/canaan/Kconfig @@ -3,8 +3,9 @@ config SOC_K210_SYSCTL bool "Canaan Kendryte K210 SoC system controller" depends on RISCV && SOC_CANAAN && OF + depends on COMMON_CLK_K210 default SOC_CANAAN - select PM - select MFD_SYSCON + select PM + select MFD_SYSCON help Canaan Kendryte K210 SoC system controller driver. -- cgit v1.2.3 From 18290c2eec4be239318cb4e01cafe12217e36de8 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Wed, 15 Mar 2023 11:17:27 +0100 Subject: soc: qcom: socinfo: Add IDs for QCM2290/QRB2210 Add the missing IDs for scuba and its QRB variant. Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230314-topic-scuba_socinfo-v2-2-44fa1256aa6d@linaro.org --- drivers/soc/qcom/socinfo.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers') diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c index 89081ec34dba..f352cd58630d 100644 --- a/drivers/soc/qcom/socinfo.c +++ b/drivers/soc/qcom/socinfo.c @@ -431,6 +431,7 @@ static const struct soc_id soc_id[] = { { qcom_board_id(QCM2150) }, { qcom_board_id(SDA429W) }, { qcom_board_id(SM8350) }, + { qcom_board_id(QCM2290) }, { qcom_board_id(SM6115) }, { qcom_board_id(SC8280XP) }, { qcom_board_id(IPQ6005) }, @@ -447,6 +448,7 @@ static const struct soc_id soc_id[] = { { qcom_board_id(SC7180P) }, { qcom_board_id(SM6375) }, { qcom_board_id(SM8550) }, + { qcom_board_id(QRB2210) }, { qcom_board_id(SA8775P) }, { qcom_board_id(QRU1000) }, { qcom_board_id(QDU1000) }, -- cgit v1.2.3 From ee13b5008707948d3052c1b5aab485c6cd53658e Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Tue, 14 Mar 2023 13:34:41 +0530 Subject: qcom: llcc/edac: Fix the base address used for accessing LLCC banks The Qualcomm LLCC/EDAC drivers were using a fixed register stride for accessing the (Control and Status Registers) CSRs of each LLCC bank. This stride only works for some SoCs like SDM845 for which driver support was initially added. But the later SoCs use different register stride that vary between the banks with holes in-between. So it is not possible to use a single register stride for accessing the CSRs of each bank. By doing so could result in a crash. For fixing this issue, let's obtain the base address of each LLCC bank from devicetree and get rid of the fixed stride. This also means, there is no need to rely on reg-names property and the base addresses can be obtained using the index. First index is LLCC bank 0 and last index is LLCC broadcast. If the SoC supports more than one bank, then those need to be defined in devicetree for index from 1..N-1. Reported-by: Parikshit Pareek Tested-by: Luca Weiss Tested-by: Steev Klimaszewski # Thinkpad X13s Tested-by: Andrew Halaney # sa8540p-ride Reviewed-by: Borislav Petkov (AMD) Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230314080443.64635-13-manivannan.sadhasivam@linaro.org --- drivers/edac/qcom_edac.c | 14 +++----- drivers/soc/qcom/llcc-qcom.c | 72 ++++++++++++++++++++++---------------- include/linux/soc/qcom/llcc-qcom.h | 6 ++-- 3 files changed, 48 insertions(+), 44 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index 3256254c3722..1d3cc1930a74 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -213,7 +213,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) for (i = 0; i < reg_data.reg_cnt; i++) { synd_reg = reg_data.synd_reg + (i * 4); - ret = regmap_read(drv->regmap, drv->offsets[bank] + synd_reg, + ret = regmap_read(drv->regmaps[bank], synd_reg, &synd_val); if (ret) goto clear; @@ -222,8 +222,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) reg_data.name, i, synd_val); } - ret = regmap_read(drv->regmap, - drv->offsets[bank] + reg_data.count_status_reg, + ret = regmap_read(drv->regmaps[bank], reg_data.count_status_reg, &err_cnt); if (ret) goto clear; @@ -233,8 +232,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) edac_printk(KERN_CRIT, EDAC_LLCC, "%s: Error count: 0x%4x\n", reg_data.name, err_cnt); - ret = regmap_read(drv->regmap, - drv->offsets[bank] + reg_data.ways_status_reg, + ret = regmap_read(drv->regmaps[bank], reg_data.ways_status_reg, &err_ways); if (ret) goto clear; @@ -296,8 +294,7 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) /* Iterate over the banks and look for Tag RAM or Data RAM errors */ for (i = 0; i < drv->num_banks; i++) { - ret = regmap_read(drv->regmap, - drv->offsets[i] + DRP_INTERRUPT_STATUS, + ret = regmap_read(drv->regmaps[i], DRP_INTERRUPT_STATUS, &drp_error); if (!ret && (drp_error & SB_ECC_ERROR)) { @@ -312,8 +309,7 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) if (!ret) irq_rc = IRQ_HANDLED; - ret = regmap_read(drv->regmap, - drv->offsets[i] + TRP_INTERRUPT_0_STATUS, + ret = regmap_read(drv->regmaps[i], TRP_INTERRUPT_0_STATUS, &trp_error); if (!ret && (trp_error & SB_ECC_ERROR)) { diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 23ce2f78c4ed..72f3f2a9aaa0 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -62,8 +62,6 @@ #define LLCC_TRP_WRSC_CACHEABLE_EN 0x21f2c #define LLCC_TRP_ALGO_CFG8 0x21f30 -#define BANK_OFFSET_STRIDE 0x80000 - #define LLCC_VERSION_2_0_0_0 0x02000000 #define LLCC_VERSION_2_1_0_0 0x02010000 #define LLCC_VERSION_4_1_0_0 0x04010000 @@ -898,8 +896,8 @@ static int qcom_llcc_remove(struct platform_device *pdev) return 0; } -static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, - const char *name) +static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, u8 index, + const char *name) { void __iomem *base; struct regmap_config llcc_regmap_config = { @@ -909,7 +907,7 @@ static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, .fast_io = true, }; - base = devm_platform_ioremap_resource_byname(pdev, name); + base = devm_platform_ioremap_resource(pdev, index); if (IS_ERR(base)) return ERR_CAST(base); @@ -927,6 +925,7 @@ static int qcom_llcc_probe(struct platform_device *pdev) const struct llcc_slice_config *llcc_cfg; u32 sz; u32 version; + struct regmap *regmap; drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL); if (!drv_data) { @@ -934,21 +933,51 @@ static int qcom_llcc_probe(struct platform_device *pdev) goto err; } - drv_data->regmap = qcom_llcc_init_mmio(pdev, "llcc_base"); - if (IS_ERR(drv_data->regmap)) { - ret = PTR_ERR(drv_data->regmap); + /* Initialize the first LLCC bank regmap */ + regmap = qcom_llcc_init_mmio(pdev, 0, "llcc0_base"); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); goto err; } - drv_data->bcast_regmap = - qcom_llcc_init_mmio(pdev, "llcc_broadcast_base"); + cfg = of_device_get_match_data(&pdev->dev); + + ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks); + if (ret) + goto err; + + num_banks &= LLCC_LB_CNT_MASK; + num_banks >>= LLCC_LB_CNT_SHIFT; + drv_data->num_banks = num_banks; + + drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL); + if (!drv_data->regmaps) { + ret = -ENOMEM; + goto err; + } + + drv_data->regmaps[0] = regmap; + + /* Initialize rest of LLCC bank regmaps */ + for (i = 1; i < num_banks; i++) { + char *base = kasprintf(GFP_KERNEL, "llcc%d_base", i); + + drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base); + if (IS_ERR(drv_data->regmaps[i])) { + ret = PTR_ERR(drv_data->regmaps[i]); + kfree(base); + goto err; + } + + kfree(base); + } + + drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base"); if (IS_ERR(drv_data->bcast_regmap)) { ret = PTR_ERR(drv_data->bcast_regmap); goto err; } - cfg = of_device_get_match_data(&pdev->dev); - /* Extract version of the IP */ ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO], &version); @@ -957,15 +986,6 @@ static int qcom_llcc_probe(struct platform_device *pdev) drv_data->version = version; - ret = regmap_read(drv_data->regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], - &num_banks); - if (ret) - goto err; - - num_banks &= LLCC_LB_CNT_MASK; - num_banks >>= LLCC_LB_CNT_SHIFT; - drv_data->num_banks = num_banks; - llcc_cfg = cfg->sct_data; sz = cfg->size; @@ -973,16 +993,6 @@ static int qcom_llcc_probe(struct platform_device *pdev) if (llcc_cfg[i].slice_id > drv_data->max_slices) drv_data->max_slices = llcc_cfg[i].slice_id; - drv_data->offsets = devm_kcalloc(dev, num_banks, sizeof(u32), - GFP_KERNEL); - if (!drv_data->offsets) { - ret = -ENOMEM; - goto err; - } - - for (i = 0; i < num_banks; i++) - drv_data->offsets[i] = i * BANK_OFFSET_STRIDE; - drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices, GFP_KERNEL); if (!drv_data->bitmap) { diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h index ad1fd718169d..423220e66026 100644 --- a/include/linux/soc/qcom/llcc-qcom.h +++ b/include/linux/soc/qcom/llcc-qcom.h @@ -120,7 +120,7 @@ struct llcc_edac_reg_offset { /** * struct llcc_drv_data - Data associated with the llcc driver - * @regmap: regmap associated with the llcc device + * @regmaps: regmaps associated with the llcc device * @bcast_regmap: regmap associated with llcc broadcast offset * @cfg: pointer to the data structure for slice configuration * @edac_reg_offset: Offset of the LLCC EDAC registers @@ -129,12 +129,11 @@ struct llcc_edac_reg_offset { * @max_slices: max slices as read from device tree * @num_banks: Number of llcc banks * @bitmap: Bit map to track the active slice ids - * @offsets: Pointer to the bank offsets array * @ecc_irq: interrupt for llcc cache error detection and reporting * @version: Indicates the LLCC version */ struct llcc_drv_data { - struct regmap *regmap; + struct regmap **regmaps; struct regmap *bcast_regmap; const struct llcc_slice_config *cfg; const struct llcc_edac_reg_offset *edac_reg_offset; @@ -143,7 +142,6 @@ struct llcc_drv_data { u32 max_slices; u32 num_banks; unsigned long *bitmap; - u32 *offsets; int ecc_irq; u32 version; }; -- cgit v1.2.3 From 721d3e91bfc93975c5e1a76c7d588dd8df5d82da Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Tue, 14 Mar 2023 13:34:42 +0530 Subject: qcom: llcc/edac: Support polling mode for ECC handling Not all Qcom platforms support IRQ mode for ECC handling. For those platforms, the current EDAC driver will not be probed due to missing ECC IRQ in devicetree. So add support for polling mode so that the EDAC driver can be used on all Qcom platforms supporting LLCC. The polling delay of 5000ms is chosen based on Qcom downstream/vendor driver. Reported-by: Luca Weiss Tested-by: Luca Weiss Tested-by: Steev Klimaszewski # Thinkpad X13s Tested-by: Andrew Halaney # sa8540p-ride Reviewed-by: Borislav Petkov (AMD) Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230314080443.64635-14-manivannan.sadhasivam@linaro.org --- drivers/edac/qcom_edac.c | 50 +++++++++++++++++++++++++------------------- drivers/soc/qcom/llcc-qcom.c | 13 ++++++------ 2 files changed, 35 insertions(+), 28 deletions(-) (limited to 'drivers') diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index 1d3cc1930a74..265e0fb39bc7 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -76,6 +76,8 @@ #define DRP0_INTERRUPT_ENABLE BIT(6) #define SB_DB_DRP_INTERRUPT_ENABLE 0x3 +#define ECC_POLL_MSEC 5000 + enum { LLCC_DRAM_CE = 0, LLCC_DRAM_UE, @@ -283,8 +285,7 @@ dump_syn_reg(struct edac_device_ctl_info *edev_ctl, int err_type, u32 bank) return ret; } -static irqreturn_t -llcc_ecc_irq_handler(int irq, void *edev_ctl) +static irqreturn_t llcc_ecc_irq_handler(int irq, void *edev_ctl) { struct edac_device_ctl_info *edac_dev_ctl = edev_ctl; struct llcc_drv_data *drv = edac_dev_ctl->dev->platform_data; @@ -328,6 +329,11 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) return irq_rc; } +static void llcc_ecc_check(struct edac_device_ctl_info *edev_ctl) +{ + llcc_ecc_irq_handler(0, edev_ctl); +} + static int qcom_llcc_edac_probe(struct platform_device *pdev) { struct llcc_drv_data *llcc_driv_data = pdev->dev.platform_data; @@ -355,29 +361,31 @@ static int qcom_llcc_edac_probe(struct platform_device *pdev) edev_ctl->ctl_name = "llcc"; edev_ctl->panic_on_ue = LLCC_ERP_PANIC_ON_UE; - rc = edac_device_add_device(edev_ctl); - if (rc) - goto out_mem; - - platform_set_drvdata(pdev, edev_ctl); - - /* Request for ecc irq */ + /* Check if LLCC driver has passed ECC IRQ */ ecc_irq = llcc_driv_data->ecc_irq; - if (ecc_irq < 0) { - rc = -ENODEV; - goto out_dev; - } - rc = devm_request_irq(dev, ecc_irq, llcc_ecc_irq_handler, + if (ecc_irq > 0) { + /* Use interrupt mode if IRQ is available */ + rc = devm_request_irq(dev, ecc_irq, llcc_ecc_irq_handler, IRQF_TRIGGER_HIGH, "llcc_ecc", edev_ctl); - if (rc) - goto out_dev; + if (!rc) { + edac_op_state = EDAC_OPSTATE_INT; + goto irq_done; + } + } - return rc; + /* Fall back to polling mode otherwise */ + edev_ctl->poll_msec = ECC_POLL_MSEC; + edev_ctl->edac_check = llcc_ecc_check; + edac_op_state = EDAC_OPSTATE_POLL; -out_dev: - edac_device_del_device(edev_ctl->dev); -out_mem: - edac_device_free_ctl_info(edev_ctl); +irq_done: + rc = edac_device_add_device(edev_ctl); + if (rc) { + edac_device_free_ctl_info(edev_ctl); + return rc; + } + + platform_set_drvdata(pdev, edev_ctl); return rc; } diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 72f3f2a9aaa0..7b7c5a38bac6 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -1011,13 +1011,12 @@ static int qcom_llcc_probe(struct platform_device *pdev) goto err; drv_data->ecc_irq = platform_get_irq_optional(pdev, 0); - if (drv_data->ecc_irq >= 0) { - llcc_edac = platform_device_register_data(&pdev->dev, - "qcom_llcc_edac", -1, drv_data, - sizeof(*drv_data)); - if (IS_ERR(llcc_edac)) - dev_err(dev, "Failed to register llcc edac driver\n"); - } + + llcc_edac = platform_device_register_data(&pdev->dev, + "qcom_llcc_edac", -1, drv_data, + sizeof(*drv_data)); + if (IS_ERR(llcc_edac)) + dev_err(dev, "Failed to register llcc edac driver\n"); return 0; err: -- cgit v1.2.3 From cca94f1dd6d0a4c7e5c8190672f5747e3c00ddde Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Tue, 14 Mar 2023 13:34:43 +0530 Subject: soc: qcom: llcc: Do not create EDAC platform device on SDM845 The platforms based on SDM845 SoC locks the access to EDAC registers in the bootloader. So probing the EDAC driver will result in a crash. Hence, disable the creation of EDAC platform device on all SDM845 devices. The issue has been observed on Lenovo Yoga C630 and DB845c. While at it, also sort the members of `struct qcom_llcc_config` to avoid any holes in-between. Cc: # 5.10 Reported-by: Steev Klimaszewski Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230314080443.64635-15-manivannan.sadhasivam@linaro.org --- drivers/soc/qcom/llcc-qcom.c | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 7b7c5a38bac6..a5140f19f200 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -120,10 +120,11 @@ struct llcc_slice_config { struct qcom_llcc_config { const struct llcc_slice_config *sct_data; - int size; - bool need_llcc_cfg; const u32 *reg_offset; const struct llcc_edac_reg_offset *edac_reg_offset; + int size; + bool need_llcc_cfg; + bool no_edac; }; enum llcc_reg_offset { @@ -452,6 +453,7 @@ static const struct qcom_llcc_config sdm845_cfg = { .need_llcc_cfg = false, .reg_offset = llcc_v1_reg_offset, .edac_reg_offset = &llcc_v1_edac_reg_offset, + .no_edac = true, }; static const struct qcom_llcc_config sm6350_cfg = { @@ -1012,11 +1014,19 @@ static int qcom_llcc_probe(struct platform_device *pdev) drv_data->ecc_irq = platform_get_irq_optional(pdev, 0); - llcc_edac = platform_device_register_data(&pdev->dev, - "qcom_llcc_edac", -1, drv_data, - sizeof(*drv_data)); - if (IS_ERR(llcc_edac)) - dev_err(dev, "Failed to register llcc edac driver\n"); + /* + * On some platforms, the access to EDAC registers will be locked by + * the bootloader. So probing the EDAC driver will result in a crash. + * Hence, disable the creation of EDAC platform device for the + * problematic platforms. + */ + if (!cfg->no_edac) { + llcc_edac = platform_device_register_data(&pdev->dev, + "qcom_llcc_edac", -1, drv_data, + sizeof(*drv_data)); + if (IS_ERR(llcc_edac)) + dev_err(dev, "Failed to register llcc edac driver\n"); + } return 0; err: -- cgit v1.2.3 From c6653d8f24f4bcc255e3ffb28c629ff5d0e0ba13 Mon Sep 17 00:00:00 2001 From: Varadarajan Narayanan Date: Tue, 14 Mar 2023 11:43:34 +0530 Subject: soc: qcom: socinfo: Add IDs for IPQ9574 and its variants Add SOC ID for Qualcomm IPQ9574, IPQ9570, IPQ9554, IPQ9550, IPQ9514 and IPQ9510 Signed-off-by: Varadarajan Narayanan Reviewed-by: Krzysztof Kozlowski Reviewed-by: Kathiravan T Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1678774414-14414-3-git-send-email-quic_varada@quicinc.com --- drivers/soc/qcom/socinfo.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers') diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c index f352cd58630d..cc1204ae2198 100644 --- a/drivers/soc/qcom/socinfo.c +++ b/drivers/soc/qcom/socinfo.c @@ -447,7 +447,13 @@ static const struct soc_id soc_id[] = { { qcom_board_id(SC7280) }, { qcom_board_id(SC7180P) }, { qcom_board_id(SM6375) }, + { qcom_board_id(IPQ9514) }, + { qcom_board_id(IPQ9550) }, + { qcom_board_id(IPQ9554) }, + { qcom_board_id(IPQ9570) }, + { qcom_board_id(IPQ9574) }, { qcom_board_id(SM8550) }, + { qcom_board_id(IPQ9510) }, { qcom_board_id(QRB2210) }, { qcom_board_id(SA8775P) }, { qcom_board_id(QRU1000) }, -- cgit v1.2.3 From a11bc4a5b371e05e89c0fba5756efe5788a4d1ab Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Wed, 15 Mar 2023 21:31:51 +0530 Subject: soc: qcom: socinfo: Add IDs for QRB4210 Add the ID for QRB4210 variant. Signed-off-by: Bhupesh Sharma Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230315160151.2166861-3-bhupesh.sharma@linaro.org --- drivers/soc/qcom/socinfo.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c index cc1204ae2198..cd370fe28d19 100644 --- a/drivers/soc/qcom/socinfo.c +++ b/drivers/soc/qcom/socinfo.c @@ -454,6 +454,7 @@ static const struct soc_id soc_id[] = { { qcom_board_id(IPQ9574) }, { qcom_board_id(SM8550) }, { qcom_board_id(IPQ9510) }, + { qcom_board_id(QRB4210) }, { qcom_board_id(QRB2210) }, { qcom_board_id(SA8775P) }, { qcom_board_id(QRU1000) }, -- cgit v1.2.3 From bad8cdc20690fa830c49783b68c6403dd44bc0bd Mon Sep 17 00:00:00 2001 From: David Wronek Date: Sun, 5 Mar 2023 22:17:45 +0300 Subject: soc: qcom: socinfo: Add Soc ID for SM7150 Add Soc ID table entries for Qualcomm SM7150. Signed-off-by: David Wronek Signed-off-by: Danila Tikhonov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230305191745.386862-3-danila@jiaxyga.com --- drivers/soc/qcom/socinfo.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c index cd370fe28d19..c2e4a57dd666 100644 --- a/drivers/soc/qcom/socinfo.c +++ b/drivers/soc/qcom/socinfo.c @@ -410,6 +410,7 @@ static const struct soc_id soc_id[] = { { qcom_board_id(SA8155) }, { qcom_board_id(SDA439) }, { qcom_board_id(SDA429) }, + { qcom_board_id(SM7150) }, { qcom_board_id(IPQ8070) }, { qcom_board_id(IPQ8071) }, { qcom_board_id(QM215) }, -- cgit v1.2.3 From f1eb5e6fc18c5e6f4ee7fd2985743f2fe7978951 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 13 Mar 2023 20:59:59 +0100 Subject: soc: qcom: rpmpd: Remove SoC names from RPMPD definitions Replace the SoC names with type+id_key (or type+id+..name..+key for fixed-key definitions) and remove duplicate entries. Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-1-06a4f448ff90@linaro.org --- drivers/soc/qcom/rpmpd.c | 360 +++++++++++++++++++++-------------------------- 1 file changed, 164 insertions(+), 196 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c index 337b1ad1cd3b..d99a56509e33 100644 --- a/drivers/soc/qcom/rpmpd.c +++ b/drivers/soc/qcom/rpmpd.c @@ -40,51 +40,50 @@ #define MAX_CORNER_RPMPD_STATE 6 -#define DEFINE_RPMPD_PAIR(_platform, _name, _active, r_type, r_key, \ - r_id) \ - static struct rpmpd _platform##_##_active; \ - static struct rpmpd _platform##_##_name = { \ +#define DEFINE_RPMPD_PAIR(_name, _active, r_type, r_key, r_id) \ + static struct rpmpd r_type##r_id##_##r_key##_##_active; \ + static struct rpmpd r_type##r_id##_##r_key##_##_name = { \ .pd = { .name = #_name, }, \ - .peer = &_platform##_##_active, \ + .peer = &r_type##r_id##_##r_key##_##_active, \ .res_type = RPMPD_##r_type, \ .res_id = r_id, \ .key = KEY_##r_key, \ }; \ - static struct rpmpd _platform##_##_active = { \ + static struct rpmpd r_type##r_id##_##r_key##_##_active = { \ .pd = { .name = #_active, }, \ - .peer = &_platform##_##_name, \ + .peer = &r_type##r_id##_##r_key##_##_name, \ .active_only = true, \ .res_type = RPMPD_##r_type, \ .res_id = r_id, \ .key = KEY_##r_key, \ } -#define DEFINE_RPMPD_CORNER(_platform, _name, r_type, r_id) \ - static struct rpmpd _platform##_##_name = { \ +#define DEFINE_RPMPD_CORNER(_name, r_type, r_id) \ + static struct rpmpd r_type##r_id##_##_name##_corner = { \ .pd = { .name = #_name, }, \ .res_type = RPMPD_##r_type, \ .res_id = r_id, \ .key = KEY_CORNER, \ } -#define DEFINE_RPMPD_LEVEL(_platform, _name, r_type, r_id) \ - static struct rpmpd _platform##_##_name = { \ +#define DEFINE_RPMPD_LEVEL(_name, r_type, r_id) \ + static struct rpmpd r_type##r_id##_##_name##_lvl = { \ .pd = { .name = #_name, }, \ .res_type = RPMPD_##r_type, \ .res_id = r_id, \ .key = KEY_LEVEL, \ } -#define DEFINE_RPMPD_VFC(_platform, _name, r_type, r_id) \ - static struct rpmpd _platform##_##_name = { \ +#define DEFINE_RPMPD_VFC(_name, r_type, r_id) \ + static struct rpmpd r_type##r_id##_##_name = { \ .pd = { .name = #_name, }, \ .res_type = RPMPD_##r_type, \ .res_id = r_id, \ .key = KEY_FLOOR_CORNER, \ } -#define DEFINE_RPMPD_VFL(_platform, _name, r_type, r_id) \ - static struct rpmpd _platform##_##_name = { \ +#define DEFINE_RPMPD_VFL(_name, r_type, r_id) \ + static struct rpmpd r_type##r_id##_##_name = { \ .pd = { .name = #_name, }, \ .res_type = RPMPD_##r_type, \ .res_id = r_id, \ @@ -119,18 +118,18 @@ struct rpmpd_desc { static DEFINE_MUTEX(rpmpd_lock); /* mdm9607 RPM Power Domains */ -DEFINE_RPMPD_PAIR(mdm9607, vddcx, vddcx_ao, SMPA, LEVEL, 3); -DEFINE_RPMPD_VFL(mdm9607, vddcx_vfl, SMPA, 3); +DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, LEVEL, 3); +DEFINE_RPMPD_VFL(vddcx_vfl, SMPA, 3); -DEFINE_RPMPD_PAIR(mdm9607, vddmx, vddmx_ao, LDOA, LEVEL, 12); -DEFINE_RPMPD_VFL(mdm9607, vddmx_vfl, LDOA, 12); +DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, LDOA, LEVEL, 12); +DEFINE_RPMPD_VFL(vddmx_vfl, LDOA, 12); static struct rpmpd *mdm9607_rpmpds[] = { - [MDM9607_VDDCX] = &mdm9607_vddcx, - [MDM9607_VDDCX_AO] = &mdm9607_vddcx_ao, - [MDM9607_VDDCX_VFL] = &mdm9607_vddcx_vfl, - [MDM9607_VDDMX] = &mdm9607_vddmx, - [MDM9607_VDDMX_AO] = &mdm9607_vddmx_ao, - [MDM9607_VDDMX_VFL] = &mdm9607_vddmx_vfl, + [MDM9607_VDDCX] = &SMPA3_LEVEL_vddcx, + [MDM9607_VDDCX_AO] = &SMPA3_LEVEL_vddcx_ao, + [MDM9607_VDDCX_VFL] = &SMPA3_vddcx_vfl, + [MDM9607_VDDMX] = &LDOA12_LEVEL_vddmx, + [MDM9607_VDDMX_AO] = &LDOA12_LEVEL_vddmx_ao, + [MDM9607_VDDMX_VFL] = &LDOA12_vddmx_vfl, }; static const struct rpmpd_desc mdm9607_desc = { @@ -140,13 +139,13 @@ static const struct rpmpd_desc mdm9607_desc = { }; /* msm8226 RPM Power Domains */ -DEFINE_RPMPD_PAIR(msm8226, vddcx, vddcx_ao, SMPA, CORNER, 1); -DEFINE_RPMPD_VFC(msm8226, vddcx_vfc, SMPA, 1); +DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, CORNER, 1); +DEFINE_RPMPD_VFC(vddcx_vfc, SMPA, 1); static struct rpmpd *msm8226_rpmpds[] = { - [MSM8226_VDDCX] = &msm8226_vddcx, - [MSM8226_VDDCX_AO] = &msm8226_vddcx_ao, - [MSM8226_VDDCX_VFC] = &msm8226_vddcx_vfc, + [MSM8226_VDDCX] = &SMPA1_CORNER_vddcx, + [MSM8226_VDDCX_AO] = &SMPA1_CORNER_vddcx_ao, + [MSM8226_VDDCX_VFC] = &SMPA1_vddcx_vfc, }; static const struct rpmpd_desc msm8226_desc = { @@ -156,23 +155,23 @@ static const struct rpmpd_desc msm8226_desc = { }; /* msm8939 RPM Power Domains */ -DEFINE_RPMPD_PAIR(msm8939, vddmd, vddmd_ao, SMPA, CORNER, 1); -DEFINE_RPMPD_VFC(msm8939, vddmd_vfc, SMPA, 1); +DEFINE_RPMPD_PAIR(vddmd, vddmd_ao, SMPA, CORNER, 1); +DEFINE_RPMPD_VFC(vddmd_vfc, SMPA, 1); -DEFINE_RPMPD_PAIR(msm8939, vddcx, vddcx_ao, SMPA, CORNER, 2); -DEFINE_RPMPD_VFC(msm8939, vddcx_vfc, SMPA, 2); +DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, CORNER, 2); +DEFINE_RPMPD_VFC(vddcx_vfc, SMPA, 2); -DEFINE_RPMPD_PAIR(msm8939, vddmx, vddmx_ao, LDOA, CORNER, 3); +DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, LDOA, CORNER, 3); static struct rpmpd *msm8939_rpmpds[] = { - [MSM8939_VDDMDCX] = &msm8939_vddmd, - [MSM8939_VDDMDCX_AO] = &msm8939_vddmd_ao, - [MSM8939_VDDMDCX_VFC] = &msm8939_vddmd_vfc, - [MSM8939_VDDCX] = &msm8939_vddcx, - [MSM8939_VDDCX_AO] = &msm8939_vddcx_ao, - [MSM8939_VDDCX_VFC] = &msm8939_vddcx_vfc, - [MSM8939_VDDMX] = &msm8939_vddmx, - [MSM8939_VDDMX_AO] = &msm8939_vddmx_ao, + [MSM8939_VDDMDCX] = &SMPA1_CORNER_vddmd, + [MSM8939_VDDMDCX_AO] = &SMPA1_CORNER_vddmd_ao, + [MSM8939_VDDMDCX_VFC] = &SMPA1_vddmd_vfc, + [MSM8939_VDDCX] = &SMPA2_CORNER_vddcx, + [MSM8939_VDDCX_AO] = &SMPA2_CORNER_vddcx_ao, + [MSM8939_VDDCX_VFC] = &SMPA2_vddcx_vfc, + [MSM8939_VDDMX] = &LDOA3_CORNER_vddmx, + [MSM8939_VDDMX_AO] = &LDOA3_CORNER_vddmx_ao, }; static const struct rpmpd_desc msm8939_desc = { @@ -182,17 +181,12 @@ static const struct rpmpd_desc msm8939_desc = { }; /* msm8916 RPM Power Domains */ -DEFINE_RPMPD_PAIR(msm8916, vddcx, vddcx_ao, SMPA, CORNER, 1); -DEFINE_RPMPD_PAIR(msm8916, vddmx, vddmx_ao, LDOA, CORNER, 3); - -DEFINE_RPMPD_VFC(msm8916, vddcx_vfc, SMPA, 1); - static struct rpmpd *msm8916_rpmpds[] = { - [MSM8916_VDDCX] = &msm8916_vddcx, - [MSM8916_VDDCX_AO] = &msm8916_vddcx_ao, - [MSM8916_VDDCX_VFC] = &msm8916_vddcx_vfc, - [MSM8916_VDDMX] = &msm8916_vddmx, - [MSM8916_VDDMX_AO] = &msm8916_vddmx_ao, + [MSM8916_VDDCX] = &SMPA1_CORNER_vddcx, + [MSM8916_VDDCX_AO] = &SMPA1_CORNER_vddcx_ao, + [MSM8916_VDDCX_VFC] = &SMPA1_vddcx_vfc, + [MSM8916_VDDMX] = &LDOA3_CORNER_vddmx, + [MSM8916_VDDMX_AO] = &LDOA3_CORNER_vddmx_ao, }; static const struct rpmpd_desc msm8916_desc = { @@ -202,20 +196,20 @@ static const struct rpmpd_desc msm8916_desc = { }; /* msm8953 RPM Power Domains */ -DEFINE_RPMPD_PAIR(msm8953, vddmd, vddmd_ao, SMPA, LEVEL, 1); -DEFINE_RPMPD_PAIR(msm8953, vddcx, vddcx_ao, SMPA, LEVEL, 2); -DEFINE_RPMPD_PAIR(msm8953, vddmx, vddmx_ao, SMPA, LEVEL, 7); +DEFINE_RPMPD_PAIR(vddmd, vddmd_ao, SMPA, LEVEL, 1); +DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, LEVEL, 2); +DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, SMPA, LEVEL, 7); -DEFINE_RPMPD_VFL(msm8953, vddcx_vfl, SMPA, 2); +DEFINE_RPMPD_VFL(vddcx_vfl, SMPA, 2); static struct rpmpd *msm8953_rpmpds[] = { - [MSM8953_VDDMD] = &msm8953_vddmd, - [MSM8953_VDDMD_AO] = &msm8953_vddmd_ao, - [MSM8953_VDDCX] = &msm8953_vddcx, - [MSM8953_VDDCX_AO] = &msm8953_vddcx_ao, - [MSM8953_VDDCX_VFL] = &msm8953_vddcx_vfl, - [MSM8953_VDDMX] = &msm8953_vddmx, - [MSM8953_VDDMX_AO] = &msm8953_vddmx_ao, + [MSM8953_VDDMD] = &SMPA1_LEVEL_vddmd, + [MSM8953_VDDMD_AO] = &SMPA1_LEVEL_vddmd_ao, + [MSM8953_VDDCX] = &SMPA2_LEVEL_vddcx, + [MSM8953_VDDCX_AO] = &SMPA2_LEVEL_vddcx_ao, + [MSM8953_VDDCX_VFL] = &SMPA2_vddcx_vfl, + [MSM8953_VDDMX] = &SMPA7_LEVEL_vddmx, + [MSM8953_VDDMX_AO] = &SMPA7_LEVEL_vddmx_ao, }; static const struct rpmpd_desc msm8953_desc = { @@ -225,19 +219,18 @@ static const struct rpmpd_desc msm8953_desc = { }; /* msm8976 RPM Power Domains */ -DEFINE_RPMPD_PAIR(msm8976, vddcx, vddcx_ao, SMPA, LEVEL, 2); -DEFINE_RPMPD_PAIR(msm8976, vddmx, vddmx_ao, SMPA, LEVEL, 6); +DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, SMPA, LEVEL, 6); -DEFINE_RPMPD_VFL(msm8976, vddcx_vfl, RWSC, 2); -DEFINE_RPMPD_VFL(msm8976, vddmx_vfl, RWSM, 6); +DEFINE_RPMPD_VFL(vddcx_vfl, RWSC, 2); +DEFINE_RPMPD_VFL(vddmx_vfl, RWSM, 6); static struct rpmpd *msm8976_rpmpds[] = { - [MSM8976_VDDCX] = &msm8976_vddcx, - [MSM8976_VDDCX_AO] = &msm8976_vddcx_ao, - [MSM8976_VDDCX_VFL] = &msm8976_vddcx_vfl, - [MSM8976_VDDMX] = &msm8976_vddmx, - [MSM8976_VDDMX_AO] = &msm8976_vddmx_ao, - [MSM8976_VDDMX_VFL] = &msm8976_vddmx_vfl, + [MSM8976_VDDCX] = &SMPA2_LEVEL_vddcx, + [MSM8976_VDDCX_AO] = &SMPA2_LEVEL_vddcx_ao, + [MSM8976_VDDCX_VFL] = &RWSC2_vddcx_vfl, + [MSM8976_VDDMX] = &SMPA6_LEVEL_vddmx, + [MSM8976_VDDMX_AO] = &SMPA6_LEVEL_vddmx_ao, + [MSM8976_VDDMX_VFL] = &RWSM6_vddmx_vfl, }; static const struct rpmpd_desc msm8976_desc = { @@ -247,22 +240,20 @@ static const struct rpmpd_desc msm8976_desc = { }; /* msm8994 RPM Power domains */ -DEFINE_RPMPD_PAIR(msm8994, vddcx, vddcx_ao, SMPA, CORNER, 1); -DEFINE_RPMPD_PAIR(msm8994, vddmx, vddmx_ao, SMPA, CORNER, 2); +DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, SMPA, CORNER, 2); /* Attention! *Some* 8994 boards with pm8004 may use SMPC here! */ -DEFINE_RPMPD_CORNER(msm8994, vddgfx, SMPB, 2); +DEFINE_RPMPD_CORNER(vddgfx, SMPB, 2); -DEFINE_RPMPD_VFC(msm8994, vddcx_vfc, SMPA, 1); -DEFINE_RPMPD_VFC(msm8994, vddgfx_vfc, SMPB, 2); +DEFINE_RPMPD_VFC(vddgfx_vfc, SMPB, 2); static struct rpmpd *msm8994_rpmpds[] = { - [MSM8994_VDDCX] = &msm8994_vddcx, - [MSM8994_VDDCX_AO] = &msm8994_vddcx_ao, - [MSM8994_VDDCX_VFC] = &msm8994_vddcx_vfc, - [MSM8994_VDDMX] = &msm8994_vddmx, - [MSM8994_VDDMX_AO] = &msm8994_vddmx_ao, - [MSM8994_VDDGFX] = &msm8994_vddgfx, - [MSM8994_VDDGFX_VFC] = &msm8994_vddgfx_vfc, + [MSM8994_VDDCX] = &SMPA1_CORNER_vddcx, + [MSM8994_VDDCX_AO] = &SMPA1_CORNER_vddcx_ao, + [MSM8994_VDDCX_VFC] = &SMPA1_vddcx_vfc, + [MSM8994_VDDMX] = &SMPA2_CORNER_vddmx, + [MSM8994_VDDMX_AO] = &SMPA2_CORNER_vddmx_ao, + [MSM8994_VDDGFX] = &SMPB2_vddgfx_corner, + [MSM8994_VDDGFX_VFC] = &SMPB2_vddgfx_vfc, }; static const struct rpmpd_desc msm8994_desc = { @@ -272,21 +263,18 @@ static const struct rpmpd_desc msm8994_desc = { }; /* msm8996 RPM Power domains */ -DEFINE_RPMPD_PAIR(msm8996, vddcx, vddcx_ao, SMPA, CORNER, 1); -DEFINE_RPMPD_PAIR(msm8996, vddmx, vddmx_ao, SMPA, CORNER, 2); -DEFINE_RPMPD_CORNER(msm8996, vddsscx, LDOA, 26); +DEFINE_RPMPD_CORNER(vddsscx, LDOA, 26); -DEFINE_RPMPD_VFC(msm8996, vddcx_vfc, SMPA, 1); -DEFINE_RPMPD_VFC(msm8996, vddsscx_vfc, LDOA, 26); +DEFINE_RPMPD_VFC(vddsscx_vfc, LDOA, 26); static struct rpmpd *msm8996_rpmpds[] = { - [MSM8996_VDDCX] = &msm8996_vddcx, - [MSM8996_VDDCX_AO] = &msm8996_vddcx_ao, - [MSM8996_VDDCX_VFC] = &msm8996_vddcx_vfc, - [MSM8996_VDDMX] = &msm8996_vddmx, - [MSM8996_VDDMX_AO] = &msm8996_vddmx_ao, - [MSM8996_VDDSSCX] = &msm8996_vddsscx, - [MSM8996_VDDSSCX_VFC] = &msm8996_vddsscx_vfc, + [MSM8996_VDDCX] = &SMPA1_CORNER_vddcx, + [MSM8996_VDDCX_AO] = &SMPA1_CORNER_vddcx_ao, + [MSM8996_VDDCX_VFC] = &SMPA1_vddcx_vfc, + [MSM8996_VDDMX] = &SMPA2_CORNER_vddmx, + [MSM8996_VDDMX_AO] = &SMPA2_CORNER_vddmx_ao, + [MSM8996_VDDSSCX] = &LDOA26_vddsscx_corner, + [MSM8996_VDDSSCX_VFC] = &LDOA26_vddsscx_vfc, }; static const struct rpmpd_desc msm8996_desc = { @@ -296,29 +284,29 @@ static const struct rpmpd_desc msm8996_desc = { }; /* msm8998 RPM Power domains */ -DEFINE_RPMPD_PAIR(msm8998, vddcx, vddcx_ao, RWCX, LEVEL, 0); -DEFINE_RPMPD_VFL(msm8998, vddcx_vfl, RWCX, 0); +DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, RWCX, LEVEL, 0); +DEFINE_RPMPD_VFL(vddcx_vfl, RWCX, 0); -DEFINE_RPMPD_PAIR(msm8998, vddmx, vddmx_ao, RWMX, LEVEL, 0); -DEFINE_RPMPD_VFL(msm8998, vddmx_vfl, RWMX, 0); +DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, RWMX, LEVEL, 0); +DEFINE_RPMPD_VFL(vddmx_vfl, RWMX, 0); -DEFINE_RPMPD_LEVEL(msm8998, vdd_ssccx, RWSC, 0); -DEFINE_RPMPD_VFL(msm8998, vdd_ssccx_vfl, RWSC, 0); +DEFINE_RPMPD_LEVEL(vdd_ssccx, RWSC, 0); +DEFINE_RPMPD_VFL(vdd_ssccx_vfl, RWSC, 0); -DEFINE_RPMPD_LEVEL(msm8998, vdd_sscmx, RWSM, 0); -DEFINE_RPMPD_VFL(msm8998, vdd_sscmx_vfl, RWSM, 0); +DEFINE_RPMPD_LEVEL(vdd_sscmx, RWSM, 0); +DEFINE_RPMPD_VFL(vdd_sscmx_vfl, RWSM, 0); static struct rpmpd *msm8998_rpmpds[] = { - [MSM8998_VDDCX] = &msm8998_vddcx, - [MSM8998_VDDCX_AO] = &msm8998_vddcx_ao, - [MSM8998_VDDCX_VFL] = &msm8998_vddcx_vfl, - [MSM8998_VDDMX] = &msm8998_vddmx, - [MSM8998_VDDMX_AO] = &msm8998_vddmx_ao, - [MSM8998_VDDMX_VFL] = &msm8998_vddmx_vfl, - [MSM8998_SSCCX] = &msm8998_vdd_ssccx, - [MSM8998_SSCCX_VFL] = &msm8998_vdd_ssccx_vfl, - [MSM8998_SSCMX] = &msm8998_vdd_sscmx, - [MSM8998_SSCMX_VFL] = &msm8998_vdd_sscmx_vfl, + [MSM8998_VDDCX] = &RWCX0_LEVEL_vddcx, + [MSM8998_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, + [MSM8998_VDDCX_VFL] = &RWCX0_vddcx_vfl, + [MSM8998_VDDMX] = &RWMX0_LEVEL_vddmx, + [MSM8998_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, + [MSM8998_VDDMX_VFL] = &RWMX0_vddmx_vfl, + [MSM8998_SSCCX] = &RWSC0_vdd_ssccx_lvl, + [MSM8998_SSCCX_VFL] = &RWSC0_vdd_ssccx_vfl, + [MSM8998_SSCMX] = &RWSM0_vdd_sscmx_lvl, + [MSM8998_SSCMX_VFL] = &RWSM0_vdd_sscmx_vfl, }; static const struct rpmpd_desc msm8998_desc = { @@ -328,23 +316,20 @@ static const struct rpmpd_desc msm8998_desc = { }; /* qcs404 RPM Power domains */ -DEFINE_RPMPD_PAIR(qcs404, vddmx, vddmx_ao, RWMX, LEVEL, 0); -DEFINE_RPMPD_VFL(qcs404, vddmx_vfl, RWMX, 0); +DEFINE_RPMPD_LEVEL(vdd_lpicx, RWLC, 0); +DEFINE_RPMPD_VFL(vdd_lpicx_vfl, RWLC, 0); -DEFINE_RPMPD_LEVEL(qcs404, vdd_lpicx, RWLC, 0); -DEFINE_RPMPD_VFL(qcs404, vdd_lpicx_vfl, RWLC, 0); - -DEFINE_RPMPD_LEVEL(qcs404, vdd_lpimx, RWLM, 0); -DEFINE_RPMPD_VFL(qcs404, vdd_lpimx_vfl, RWLM, 0); +DEFINE_RPMPD_LEVEL(vdd_lpimx, RWLM, 0); +DEFINE_RPMPD_VFL(vdd_lpimx_vfl, RWLM, 0); static struct rpmpd *qcs404_rpmpds[] = { - [QCS404_VDDMX] = &qcs404_vddmx, - [QCS404_VDDMX_AO] = &qcs404_vddmx_ao, - [QCS404_VDDMX_VFL] = &qcs404_vddmx_vfl, - [QCS404_LPICX] = &qcs404_vdd_lpicx, - [QCS404_LPICX_VFL] = &qcs404_vdd_lpicx_vfl, - [QCS404_LPIMX] = &qcs404_vdd_lpimx, - [QCS404_LPIMX_VFL] = &qcs404_vdd_lpimx_vfl, + [QCS404_VDDMX] = &RWMX0_LEVEL_vddmx, + [QCS404_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, + [QCS404_VDDMX_VFL] = &RWMX0_vddmx_vfl, + [QCS404_LPICX] = &RWLC0_vdd_lpicx_lvl, + [QCS404_LPICX_VFL] = &RWLC0_vdd_lpicx_vfl, + [QCS404_LPIMX] = &RWLM0_vdd_lpimx_lvl, + [QCS404_LPIMX_VFL] = &RWLM0_vdd_lpimx_vfl, }; static const struct rpmpd_desc qcs404_desc = { @@ -354,29 +339,24 @@ static const struct rpmpd_desc qcs404_desc = { }; /* sdm660 RPM Power domains */ -DEFINE_RPMPD_PAIR(sdm660, vddcx, vddcx_ao, RWCX, LEVEL, 0); -DEFINE_RPMPD_VFL(sdm660, vddcx_vfl, RWCX, 0); - -DEFINE_RPMPD_PAIR(sdm660, vddmx, vddmx_ao, RWMX, LEVEL, 0); -DEFINE_RPMPD_VFL(sdm660, vddmx_vfl, RWMX, 0); -DEFINE_RPMPD_LEVEL(sdm660, vdd_ssccx, RWLC, 0); -DEFINE_RPMPD_VFL(sdm660, vdd_ssccx_vfl, RWLC, 0); +DEFINE_RPMPD_LEVEL(vdd_ssccx, RWLC, 0); +DEFINE_RPMPD_VFL(vdd_ssccx_vfl, RWLC, 0); -DEFINE_RPMPD_LEVEL(sdm660, vdd_sscmx, RWLM, 0); -DEFINE_RPMPD_VFL(sdm660, vdd_sscmx_vfl, RWLM, 0); +DEFINE_RPMPD_LEVEL(vdd_sscmx, RWLM, 0); +DEFINE_RPMPD_VFL(vdd_sscmx_vfl, RWLM, 0); static struct rpmpd *sdm660_rpmpds[] = { - [SDM660_VDDCX] = &sdm660_vddcx, - [SDM660_VDDCX_AO] = &sdm660_vddcx_ao, - [SDM660_VDDCX_VFL] = &sdm660_vddcx_vfl, - [SDM660_VDDMX] = &sdm660_vddmx, - [SDM660_VDDMX_AO] = &sdm660_vddmx_ao, - [SDM660_VDDMX_VFL] = &sdm660_vddmx_vfl, - [SDM660_SSCCX] = &sdm660_vdd_ssccx, - [SDM660_SSCCX_VFL] = &sdm660_vdd_ssccx_vfl, - [SDM660_SSCMX] = &sdm660_vdd_sscmx, - [SDM660_SSCMX_VFL] = &sdm660_vdd_sscmx_vfl, + [SDM660_VDDCX] = &RWCX0_LEVEL_vddcx, + [SDM660_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, + [SDM660_VDDCX_VFL] = &RWCX0_vddcx_vfl, + [SDM660_VDDMX] = &RWMX0_LEVEL_vddmx, + [SDM660_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, + [SDM660_VDDMX_VFL] = &RWMX0_vddmx_vfl, + [SDM660_SSCCX] = &RWLC0_vdd_ssccx_lvl, + [SDM660_SSCCX_VFL] = &RWLC0_vdd_ssccx_vfl, + [SDM660_SSCMX] = &RWLM0_vdd_sscmx_lvl, + [SDM660_SSCMX_VFL] = &RWLM0_vdd_sscmx_vfl, }; static const struct rpmpd_desc sdm660_desc = { @@ -386,24 +366,18 @@ static const struct rpmpd_desc sdm660_desc = { }; /* sm4250/6115 RPM Power domains */ -DEFINE_RPMPD_PAIR(sm6115, vddcx, vddcx_ao, RWCX, LEVEL, 0); -DEFINE_RPMPD_VFL(sm6115, vddcx_vfl, RWCX, 0); - -DEFINE_RPMPD_PAIR(sm6115, vddmx, vddmx_ao, RWMX, LEVEL, 0); -DEFINE_RPMPD_VFL(sm6115, vddmx_vfl, RWMX, 0); - -DEFINE_RPMPD_LEVEL(sm6115, vdd_lpi_cx, RWLC, 0); -DEFINE_RPMPD_LEVEL(sm6115, vdd_lpi_mx, RWLM, 0); +DEFINE_RPMPD_LEVEL(vdd_lpi_cx, RWLC, 0); +DEFINE_RPMPD_LEVEL(vdd_lpi_mx, RWLM, 0); static struct rpmpd *sm6115_rpmpds[] = { - [SM6115_VDDCX] = &sm6115_vddcx, - [SM6115_VDDCX_AO] = &sm6115_vddcx_ao, - [SM6115_VDDCX_VFL] = &sm6115_vddcx_vfl, - [SM6115_VDDMX] = &sm6115_vddmx, - [SM6115_VDDMX_AO] = &sm6115_vddmx_ao, - [SM6115_VDDMX_VFL] = &sm6115_vddmx_vfl, - [SM6115_VDD_LPI_CX] = &sm6115_vdd_lpi_cx, - [SM6115_VDD_LPI_MX] = &sm6115_vdd_lpi_mx, + [SM6115_VDDCX] = &RWCX0_LEVEL_vddcx, + [SM6115_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, + [SM6115_VDDCX_VFL] = &RWCX0_vddcx_vfl, + [SM6115_VDDMX] = &RWMX0_LEVEL_vddmx, + [SM6115_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, + [SM6115_VDDMX_VFL] = &RWMX0_vddmx_vfl, + [SM6115_VDD_LPI_CX] = &RWLC0_vdd_lpi_cx_lvl, + [SM6115_VDD_LPI_MX] = &RWLM0_vdd_lpi_mx_lvl, }; static const struct rpmpd_desc sm6115_desc = { @@ -413,19 +387,13 @@ static const struct rpmpd_desc sm6115_desc = { }; /* sm6125 RPM Power domains */ -DEFINE_RPMPD_PAIR(sm6125, vddcx, vddcx_ao, RWCX, LEVEL, 0); -DEFINE_RPMPD_VFL(sm6125, vddcx_vfl, RWCX, 0); - -DEFINE_RPMPD_PAIR(sm6125, vddmx, vddmx_ao, RWMX, LEVEL, 0); -DEFINE_RPMPD_VFL(sm6125, vddmx_vfl, RWMX, 0); - static struct rpmpd *sm6125_rpmpds[] = { - [SM6125_VDDCX] = &sm6125_vddcx, - [SM6125_VDDCX_AO] = &sm6125_vddcx_ao, - [SM6125_VDDCX_VFL] = &sm6125_vddcx_vfl, - [SM6125_VDDMX] = &sm6125_vddmx, - [SM6125_VDDMX_AO] = &sm6125_vddmx_ao, - [SM6125_VDDMX_VFL] = &sm6125_vddmx_vfl, + [SM6125_VDDCX] = &RWCX0_LEVEL_vddcx, + [SM6125_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, + [SM6125_VDDCX_VFL] = &RWCX0_vddcx_vfl, + [SM6125_VDDMX] = &RWMX0_LEVEL_vddmx, + [SM6125_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, + [SM6125_VDDMX_VFL] = &RWMX0_vddmx_vfl, }; static const struct rpmpd_desc sm6125_desc = { @@ -434,18 +402,18 @@ static const struct rpmpd_desc sm6125_desc = { .max_state = RPM_SMD_LEVEL_BINNING, }; -DEFINE_RPMPD_PAIR(sm6375, vddgx, vddgx_ao, RWGX, LEVEL, 0); +DEFINE_RPMPD_PAIR(vddgx, vddgx_ao, RWGX, LEVEL, 0); static struct rpmpd *sm6375_rpmpds[] = { - [SM6375_VDDCX] = &sm6125_vddcx, - [SM6375_VDDCX_AO] = &sm6125_vddcx_ao, - [SM6375_VDDCX_VFL] = &sm6125_vddcx_vfl, - [SM6375_VDDMX] = &sm6125_vddmx, - [SM6375_VDDMX_AO] = &sm6125_vddmx_ao, - [SM6375_VDDMX_VFL] = &sm6125_vddmx_vfl, - [SM6375_VDDGX] = &sm6375_vddgx, - [SM6375_VDDGX_AO] = &sm6375_vddgx_ao, - [SM6375_VDD_LPI_CX] = &sm6115_vdd_lpi_cx, - [SM6375_VDD_LPI_MX] = &sm6115_vdd_lpi_mx, + [SM6375_VDDCX] = &RWCX0_LEVEL_vddcx, + [SM6375_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, + [SM6375_VDDCX_VFL] = &RWCX0_vddcx_vfl, + [SM6375_VDDMX] = &RWMX0_LEVEL_vddmx, + [SM6375_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, + [SM6375_VDDMX_VFL] = &RWMX0_vddmx_vfl, + [SM6375_VDDGX] = &RWGX0_LEVEL_vddgx, + [SM6375_VDDGX_AO] = &RWGX0_LEVEL_vddgx_ao, + [SM6375_VDD_LPI_CX] = &RWLC0_vdd_lpi_cx_lvl, + [SM6375_VDD_LPI_MX] = &RWLM0_vdd_lpi_mx_lvl, }; static const struct rpmpd_desc sm6375_desc = { @@ -455,14 +423,14 @@ static const struct rpmpd_desc sm6375_desc = { }; static struct rpmpd *qcm2290_rpmpds[] = { - [QCM2290_VDDCX] = &sm6115_vddcx, - [QCM2290_VDDCX_AO] = &sm6115_vddcx_ao, - [QCM2290_VDDCX_VFL] = &sm6115_vddcx_vfl, - [QCM2290_VDDMX] = &sm6115_vddmx, - [QCM2290_VDDMX_AO] = &sm6115_vddmx_ao, - [QCM2290_VDDMX_VFL] = &sm6115_vddmx_vfl, - [QCM2290_VDD_LPI_CX] = &sm6115_vdd_lpi_cx, - [QCM2290_VDD_LPI_MX] = &sm6115_vdd_lpi_mx, + [QCM2290_VDDCX] = &RWCX0_LEVEL_vddcx, + [QCM2290_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, + [QCM2290_VDDCX_VFL] = &RWCX0_vddcx_vfl, + [QCM2290_VDDMX] = &RWMX0_LEVEL_vddmx, + [QCM2290_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, + [QCM2290_VDDMX_VFL] = &RWMX0_vddmx_vfl, + [QCM2290_VDD_LPI_CX] = &RWLC0_vdd_lpi_cx_lvl, + [QCM2290_VDD_LPI_MX] = &RWLM0_vdd_lpi_mx_lvl, }; static const struct rpmpd_desc qcm2290_desc = { -- cgit v1.2.3 From a5d0e2819fd013e3629d3fedcae877777214ed34 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 13 Mar 2023 21:00:00 +0100 Subject: soc: qcom: rpmpd: Bring all definitions to the top Keep all definitions in one place in preparation for a cleanup to make things tidier. Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-2-06a4f448ff90@linaro.org --- drivers/soc/qcom/rpmpd.c | 111 +++++++++++++++++++++-------------------------- 1 file changed, 49 insertions(+), 62 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c index d99a56509e33..7d9e762232ea 100644 --- a/drivers/soc/qcom/rpmpd.c +++ b/drivers/soc/qcom/rpmpd.c @@ -117,12 +117,58 @@ struct rpmpd_desc { static DEFINE_MUTEX(rpmpd_lock); -/* mdm9607 RPM Power Domains */ +DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, RWCX, LEVEL, 0); +DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, CORNER, 1); +DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, CORNER, 2); +DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, LEVEL, 2); DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, LEVEL, 3); +DEFINE_RPMPD_VFL(vddcx_vfl, RWCX, 0); +DEFINE_RPMPD_VFL(vddcx_vfl, RWSC, 2); +DEFINE_RPMPD_VFC(vddcx_vfc, SMPA, 1); +DEFINE_RPMPD_VFC(vddcx_vfc, SMPA, 2); +DEFINE_RPMPD_VFL(vddcx_vfl, SMPA, 2); DEFINE_RPMPD_VFL(vddcx_vfl, SMPA, 3); +DEFINE_RPMPD_CORNER(vddgfx, SMPB, 2); +DEFINE_RPMPD_VFC(vddgfx_vfc, SMPB, 2); + +DEFINE_RPMPD_PAIR(vddgx, vddgx_ao, RWGX, LEVEL, 0); + +DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, LDOA, CORNER, 3); DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, LDOA, LEVEL, 12); +DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, SMPA, CORNER, 2); +DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, RWMX, LEVEL, 0); +DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, SMPA, LEVEL, 6); +DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, SMPA, LEVEL, 7); DEFINE_RPMPD_VFL(vddmx_vfl, LDOA, 12); +DEFINE_RPMPD_VFL(vddmx_vfl, RWMX, 0); +DEFINE_RPMPD_VFL(vddmx_vfl, RWSM, 6); + +DEFINE_RPMPD_PAIR(vddmd, vddmd_ao, SMPA, CORNER, 1); +DEFINE_RPMPD_PAIR(vddmd, vddmd_ao, SMPA, LEVEL, 1); +DEFINE_RPMPD_VFC(vddmd_vfc, SMPA, 1); + +DEFINE_RPMPD_LEVEL(vdd_lpi_cx, RWLC, 0); +DEFINE_RPMPD_LEVEL(vdd_lpicx, RWLC, 0); +DEFINE_RPMPD_VFL(vdd_lpicx_vfl, RWLC, 0); + +DEFINE_RPMPD_LEVEL(vdd_lpi_mx, RWLM, 0); +DEFINE_RPMPD_LEVEL(vdd_lpimx, RWLM, 0); +DEFINE_RPMPD_VFL(vdd_lpimx_vfl, RWLM, 0); + +DEFINE_RPMPD_CORNER(vddsscx, LDOA, 26); +DEFINE_RPMPD_LEVEL(vdd_ssccx, RWLC, 0); +DEFINE_RPMPD_LEVEL(vdd_ssccx, RWSC, 0); +DEFINE_RPMPD_VFC(vddsscx_vfc, LDOA, 26); +DEFINE_RPMPD_VFL(vdd_ssccx_vfl, RWLC, 0); +DEFINE_RPMPD_VFL(vdd_ssccx_vfl, RWSC, 0); + +DEFINE_RPMPD_LEVEL(vdd_sscmx, RWLM, 0); +DEFINE_RPMPD_LEVEL(vdd_sscmx, RWSM, 0); +DEFINE_RPMPD_VFL(vdd_sscmx_vfl, RWLM, 0); +DEFINE_RPMPD_VFL(vdd_sscmx_vfl, RWSM, 0); + +/* mdm9607 RPM Power Domains */ static struct rpmpd *mdm9607_rpmpds[] = { [MDM9607_VDDCX] = &SMPA3_LEVEL_vddcx, [MDM9607_VDDCX_AO] = &SMPA3_LEVEL_vddcx_ao, @@ -139,9 +185,6 @@ static const struct rpmpd_desc mdm9607_desc = { }; /* msm8226 RPM Power Domains */ -DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, CORNER, 1); -DEFINE_RPMPD_VFC(vddcx_vfc, SMPA, 1); - static struct rpmpd *msm8226_rpmpds[] = { [MSM8226_VDDCX] = &SMPA1_CORNER_vddcx, [MSM8226_VDDCX_AO] = &SMPA1_CORNER_vddcx_ao, @@ -155,14 +198,6 @@ static const struct rpmpd_desc msm8226_desc = { }; /* msm8939 RPM Power Domains */ -DEFINE_RPMPD_PAIR(vddmd, vddmd_ao, SMPA, CORNER, 1); -DEFINE_RPMPD_VFC(vddmd_vfc, SMPA, 1); - -DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, CORNER, 2); -DEFINE_RPMPD_VFC(vddcx_vfc, SMPA, 2); - -DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, LDOA, CORNER, 3); - static struct rpmpd *msm8939_rpmpds[] = { [MSM8939_VDDMDCX] = &SMPA1_CORNER_vddmd, [MSM8939_VDDMDCX_AO] = &SMPA1_CORNER_vddmd_ao, @@ -196,12 +231,6 @@ static const struct rpmpd_desc msm8916_desc = { }; /* msm8953 RPM Power Domains */ -DEFINE_RPMPD_PAIR(vddmd, vddmd_ao, SMPA, LEVEL, 1); -DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, LEVEL, 2); -DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, SMPA, LEVEL, 7); - -DEFINE_RPMPD_VFL(vddcx_vfl, SMPA, 2); - static struct rpmpd *msm8953_rpmpds[] = { [MSM8953_VDDMD] = &SMPA1_LEVEL_vddmd, [MSM8953_VDDMD_AO] = &SMPA1_LEVEL_vddmd_ao, @@ -219,11 +248,6 @@ static const struct rpmpd_desc msm8953_desc = { }; /* msm8976 RPM Power Domains */ -DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, SMPA, LEVEL, 6); - -DEFINE_RPMPD_VFL(vddcx_vfl, RWSC, 2); -DEFINE_RPMPD_VFL(vddmx_vfl, RWSM, 6); - static struct rpmpd *msm8976_rpmpds[] = { [MSM8976_VDDCX] = &SMPA2_LEVEL_vddcx, [MSM8976_VDDCX_AO] = &SMPA2_LEVEL_vddcx_ao, @@ -240,18 +264,14 @@ static const struct rpmpd_desc msm8976_desc = { }; /* msm8994 RPM Power domains */ -DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, SMPA, CORNER, 2); -/* Attention! *Some* 8994 boards with pm8004 may use SMPC here! */ -DEFINE_RPMPD_CORNER(vddgfx, SMPB, 2); - -DEFINE_RPMPD_VFC(vddgfx_vfc, SMPB, 2); - static struct rpmpd *msm8994_rpmpds[] = { [MSM8994_VDDCX] = &SMPA1_CORNER_vddcx, [MSM8994_VDDCX_AO] = &SMPA1_CORNER_vddcx_ao, [MSM8994_VDDCX_VFC] = &SMPA1_vddcx_vfc, [MSM8994_VDDMX] = &SMPA2_CORNER_vddmx, [MSM8994_VDDMX_AO] = &SMPA2_CORNER_vddmx_ao, + + /* Attention! *Some* 8994 boards with pm8004 may use SMPC here! */ [MSM8994_VDDGFX] = &SMPB2_vddgfx_corner, [MSM8994_VDDGFX_VFC] = &SMPB2_vddgfx_vfc, }; @@ -263,10 +283,6 @@ static const struct rpmpd_desc msm8994_desc = { }; /* msm8996 RPM Power domains */ -DEFINE_RPMPD_CORNER(vddsscx, LDOA, 26); - -DEFINE_RPMPD_VFC(vddsscx_vfc, LDOA, 26); - static struct rpmpd *msm8996_rpmpds[] = { [MSM8996_VDDCX] = &SMPA1_CORNER_vddcx, [MSM8996_VDDCX_AO] = &SMPA1_CORNER_vddcx_ao, @@ -284,18 +300,6 @@ static const struct rpmpd_desc msm8996_desc = { }; /* msm8998 RPM Power domains */ -DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, RWCX, LEVEL, 0); -DEFINE_RPMPD_VFL(vddcx_vfl, RWCX, 0); - -DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, RWMX, LEVEL, 0); -DEFINE_RPMPD_VFL(vddmx_vfl, RWMX, 0); - -DEFINE_RPMPD_LEVEL(vdd_ssccx, RWSC, 0); -DEFINE_RPMPD_VFL(vdd_ssccx_vfl, RWSC, 0); - -DEFINE_RPMPD_LEVEL(vdd_sscmx, RWSM, 0); -DEFINE_RPMPD_VFL(vdd_sscmx_vfl, RWSM, 0); - static struct rpmpd *msm8998_rpmpds[] = { [MSM8998_VDDCX] = &RWCX0_LEVEL_vddcx, [MSM8998_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, @@ -316,12 +320,6 @@ static const struct rpmpd_desc msm8998_desc = { }; /* qcs404 RPM Power domains */ -DEFINE_RPMPD_LEVEL(vdd_lpicx, RWLC, 0); -DEFINE_RPMPD_VFL(vdd_lpicx_vfl, RWLC, 0); - -DEFINE_RPMPD_LEVEL(vdd_lpimx, RWLM, 0); -DEFINE_RPMPD_VFL(vdd_lpimx_vfl, RWLM, 0); - static struct rpmpd *qcs404_rpmpds[] = { [QCS404_VDDMX] = &RWMX0_LEVEL_vddmx, [QCS404_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, @@ -339,13 +337,6 @@ static const struct rpmpd_desc qcs404_desc = { }; /* sdm660 RPM Power domains */ - -DEFINE_RPMPD_LEVEL(vdd_ssccx, RWLC, 0); -DEFINE_RPMPD_VFL(vdd_ssccx_vfl, RWLC, 0); - -DEFINE_RPMPD_LEVEL(vdd_sscmx, RWLM, 0); -DEFINE_RPMPD_VFL(vdd_sscmx_vfl, RWLM, 0); - static struct rpmpd *sdm660_rpmpds[] = { [SDM660_VDDCX] = &RWCX0_LEVEL_vddcx, [SDM660_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, @@ -366,9 +357,6 @@ static const struct rpmpd_desc sdm660_desc = { }; /* sm4250/6115 RPM Power domains */ -DEFINE_RPMPD_LEVEL(vdd_lpi_cx, RWLC, 0); -DEFINE_RPMPD_LEVEL(vdd_lpi_mx, RWLM, 0); - static struct rpmpd *sm6115_rpmpds[] = { [SM6115_VDDCX] = &RWCX0_LEVEL_vddcx, [SM6115_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, @@ -402,7 +390,6 @@ static const struct rpmpd_desc sm6125_desc = { .max_state = RPM_SMD_LEVEL_BINNING, }; -DEFINE_RPMPD_PAIR(vddgx, vddgx_ao, RWGX, LEVEL, 0); static struct rpmpd *sm6375_rpmpds[] = { [SM6375_VDDCX] = &RWCX0_LEVEL_vddcx, [SM6375_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, -- cgit v1.2.3 From d280f3d66d9a79b1bd50258ccb3fbb413216c1be Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 13 Mar 2023 21:00:01 +0100 Subject: soc: qcom: rpmpd: Unify Low Power Island definitions Up until now, we had 2 separate entries for VDD_LPI[CM]X and VDD_LPI_[CM]X which both pointed to the same RPM resource. Fix it. Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-3-06a4f448ff90@linaro.org --- drivers/soc/qcom/rpmpd.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c index 7d9e762232ea..8ba025c4eca3 100644 --- a/drivers/soc/qcom/rpmpd.c +++ b/drivers/soc/qcom/rpmpd.c @@ -149,11 +149,9 @@ DEFINE_RPMPD_PAIR(vddmd, vddmd_ao, SMPA, LEVEL, 1); DEFINE_RPMPD_VFC(vddmd_vfc, SMPA, 1); DEFINE_RPMPD_LEVEL(vdd_lpi_cx, RWLC, 0); -DEFINE_RPMPD_LEVEL(vdd_lpicx, RWLC, 0); DEFINE_RPMPD_VFL(vdd_lpicx_vfl, RWLC, 0); DEFINE_RPMPD_LEVEL(vdd_lpi_mx, RWLM, 0); -DEFINE_RPMPD_LEVEL(vdd_lpimx, RWLM, 0); DEFINE_RPMPD_VFL(vdd_lpimx_vfl, RWLM, 0); DEFINE_RPMPD_CORNER(vddsscx, LDOA, 26); @@ -324,9 +322,9 @@ static struct rpmpd *qcs404_rpmpds[] = { [QCS404_VDDMX] = &RWMX0_LEVEL_vddmx, [QCS404_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, [QCS404_VDDMX_VFL] = &RWMX0_vddmx_vfl, - [QCS404_LPICX] = &RWLC0_vdd_lpicx_lvl, + [QCS404_LPICX] = &RWLC0_vdd_lpi_cx_lvl, [QCS404_LPICX_VFL] = &RWLC0_vdd_lpicx_vfl, - [QCS404_LPIMX] = &RWLM0_vdd_lpimx_lvl, + [QCS404_LPIMX] = &RWLM0_vdd_lpi_mx_lvl, [QCS404_LPIMX_VFL] = &RWLM0_vdd_lpimx_vfl, }; -- cgit v1.2.3 From 1c940cc42aba5b27a259634f4aedb71e5f46dac1 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 13 Mar 2023 21:00:02 +0100 Subject: soc: qcom: rpmpd: Remove vdd* from struct names It's rather obvious by the characteristic of these resources that they correspond to some voltage lines governed by RPM. Remove the "vdd" unnecessary prefix from them. Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-4-06a4f448ff90@linaro.org --- drivers/soc/qcom/rpmpd.c | 312 +++++++++++++++++++++++------------------------ 1 file changed, 156 insertions(+), 156 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c index 8ba025c4eca3..8f145663af9a 100644 --- a/drivers/soc/qcom/rpmpd.c +++ b/drivers/soc/qcom/rpmpd.c @@ -117,63 +117,63 @@ struct rpmpd_desc { static DEFINE_MUTEX(rpmpd_lock); -DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, RWCX, LEVEL, 0); -DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, CORNER, 1); -DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, CORNER, 2); -DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, LEVEL, 2); -DEFINE_RPMPD_PAIR(vddcx, vddcx_ao, SMPA, LEVEL, 3); -DEFINE_RPMPD_VFL(vddcx_vfl, RWCX, 0); -DEFINE_RPMPD_VFL(vddcx_vfl, RWSC, 2); -DEFINE_RPMPD_VFC(vddcx_vfc, SMPA, 1); -DEFINE_RPMPD_VFC(vddcx_vfc, SMPA, 2); -DEFINE_RPMPD_VFL(vddcx_vfl, SMPA, 2); -DEFINE_RPMPD_VFL(vddcx_vfl, SMPA, 3); - -DEFINE_RPMPD_CORNER(vddgfx, SMPB, 2); -DEFINE_RPMPD_VFC(vddgfx_vfc, SMPB, 2); - -DEFINE_RPMPD_PAIR(vddgx, vddgx_ao, RWGX, LEVEL, 0); - -DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, LDOA, CORNER, 3); -DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, LDOA, LEVEL, 12); -DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, SMPA, CORNER, 2); -DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, RWMX, LEVEL, 0); -DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, SMPA, LEVEL, 6); -DEFINE_RPMPD_PAIR(vddmx, vddmx_ao, SMPA, LEVEL, 7); -DEFINE_RPMPD_VFL(vddmx_vfl, LDOA, 12); -DEFINE_RPMPD_VFL(vddmx_vfl, RWMX, 0); -DEFINE_RPMPD_VFL(vddmx_vfl, RWSM, 6); - -DEFINE_RPMPD_PAIR(vddmd, vddmd_ao, SMPA, CORNER, 1); -DEFINE_RPMPD_PAIR(vddmd, vddmd_ao, SMPA, LEVEL, 1); -DEFINE_RPMPD_VFC(vddmd_vfc, SMPA, 1); - -DEFINE_RPMPD_LEVEL(vdd_lpi_cx, RWLC, 0); -DEFINE_RPMPD_VFL(vdd_lpicx_vfl, RWLC, 0); - -DEFINE_RPMPD_LEVEL(vdd_lpi_mx, RWLM, 0); -DEFINE_RPMPD_VFL(vdd_lpimx_vfl, RWLM, 0); - -DEFINE_RPMPD_CORNER(vddsscx, LDOA, 26); -DEFINE_RPMPD_LEVEL(vdd_ssccx, RWLC, 0); -DEFINE_RPMPD_LEVEL(vdd_ssccx, RWSC, 0); -DEFINE_RPMPD_VFC(vddsscx_vfc, LDOA, 26); -DEFINE_RPMPD_VFL(vdd_ssccx_vfl, RWLC, 0); -DEFINE_RPMPD_VFL(vdd_ssccx_vfl, RWSC, 0); - -DEFINE_RPMPD_LEVEL(vdd_sscmx, RWLM, 0); -DEFINE_RPMPD_LEVEL(vdd_sscmx, RWSM, 0); -DEFINE_RPMPD_VFL(vdd_sscmx_vfl, RWLM, 0); -DEFINE_RPMPD_VFL(vdd_sscmx_vfl, RWSM, 0); +DEFINE_RPMPD_PAIR(cx, cx_ao, RWCX, LEVEL, 0); +DEFINE_RPMPD_PAIR(cx, cx_ao, SMPA, CORNER, 1); +DEFINE_RPMPD_PAIR(cx, cx_ao, SMPA, CORNER, 2); +DEFINE_RPMPD_PAIR(cx, cx_ao, SMPA, LEVEL, 2); +DEFINE_RPMPD_PAIR(cx, cx_ao, SMPA, LEVEL, 3); +DEFINE_RPMPD_VFL(cx_vfl, RWCX, 0); +DEFINE_RPMPD_VFL(cx_vfl, RWSC, 2); +DEFINE_RPMPD_VFC(cx_vfc, SMPA, 1); +DEFINE_RPMPD_VFC(cx_vfc, SMPA, 2); +DEFINE_RPMPD_VFL(cx_vfl, SMPA, 2); +DEFINE_RPMPD_VFL(cx_vfl, SMPA, 3); + +DEFINE_RPMPD_CORNER(gfx, SMPB, 2); +DEFINE_RPMPD_VFC(gfx_vfc, SMPB, 2); + +DEFINE_RPMPD_PAIR(gx, gx_ao, RWGX, LEVEL, 0); + +DEFINE_RPMPD_PAIR(mx, mx_ao, LDOA, CORNER, 3); +DEFINE_RPMPD_PAIR(mx, mx_ao, LDOA, LEVEL, 12); +DEFINE_RPMPD_PAIR(mx, mx_ao, SMPA, CORNER, 2); +DEFINE_RPMPD_PAIR(mx, mx_ao, RWMX, LEVEL, 0); +DEFINE_RPMPD_PAIR(mx, mx_ao, SMPA, LEVEL, 6); +DEFINE_RPMPD_PAIR(mx, mx_ao, SMPA, LEVEL, 7); +DEFINE_RPMPD_VFL(mx_vfl, LDOA, 12); +DEFINE_RPMPD_VFL(mx_vfl, RWMX, 0); +DEFINE_RPMPD_VFL(mx_vfl, RWSM, 6); + +DEFINE_RPMPD_PAIR(md, md_ao, SMPA, CORNER, 1); +DEFINE_RPMPD_PAIR(md, md_ao, SMPA, LEVEL, 1); +DEFINE_RPMPD_VFC(md_vfc, SMPA, 1); + +DEFINE_RPMPD_LEVEL(lpi_cx, RWLC, 0); +DEFINE_RPMPD_VFL(lpicx_vfl, RWLC, 0); + +DEFINE_RPMPD_LEVEL(lpi_mx, RWLM, 0); +DEFINE_RPMPD_VFL(lpimx_vfl, RWLM, 0); + +DEFINE_RPMPD_CORNER(sscx, LDOA, 26); +DEFINE_RPMPD_LEVEL(ssccx, RWLC, 0); +DEFINE_RPMPD_LEVEL(ssccx, RWSC, 0); +DEFINE_RPMPD_VFC(sscx_vfc, LDOA, 26); +DEFINE_RPMPD_VFL(ssccx_vfl, RWLC, 0); +DEFINE_RPMPD_VFL(ssccx_vfl, RWSC, 0); + +DEFINE_RPMPD_LEVEL(sscmx, RWLM, 0); +DEFINE_RPMPD_LEVEL(sscmx, RWSM, 0); +DEFINE_RPMPD_VFL(sscmx_vfl, RWLM, 0); +DEFINE_RPMPD_VFL(sscmx_vfl, RWSM, 0); /* mdm9607 RPM Power Domains */ static struct rpmpd *mdm9607_rpmpds[] = { - [MDM9607_VDDCX] = &SMPA3_LEVEL_vddcx, - [MDM9607_VDDCX_AO] = &SMPA3_LEVEL_vddcx_ao, - [MDM9607_VDDCX_VFL] = &SMPA3_vddcx_vfl, - [MDM9607_VDDMX] = &LDOA12_LEVEL_vddmx, - [MDM9607_VDDMX_AO] = &LDOA12_LEVEL_vddmx_ao, - [MDM9607_VDDMX_VFL] = &LDOA12_vddmx_vfl, + [MDM9607_VDDCX] = &SMPA3_LEVEL_cx, + [MDM9607_VDDCX_AO] = &SMPA3_LEVEL_cx_ao, + [MDM9607_VDDCX_VFL] = &SMPA3_cx_vfl, + [MDM9607_VDDMX] = &LDOA12_LEVEL_mx, + [MDM9607_VDDMX_AO] = &LDOA12_LEVEL_mx_ao, + [MDM9607_VDDMX_VFL] = &LDOA12_mx_vfl, }; static const struct rpmpd_desc mdm9607_desc = { @@ -184,9 +184,9 @@ static const struct rpmpd_desc mdm9607_desc = { /* msm8226 RPM Power Domains */ static struct rpmpd *msm8226_rpmpds[] = { - [MSM8226_VDDCX] = &SMPA1_CORNER_vddcx, - [MSM8226_VDDCX_AO] = &SMPA1_CORNER_vddcx_ao, - [MSM8226_VDDCX_VFC] = &SMPA1_vddcx_vfc, + [MSM8226_VDDCX] = &SMPA1_CORNER_cx, + [MSM8226_VDDCX_AO] = &SMPA1_CORNER_cx_ao, + [MSM8226_VDDCX_VFC] = &SMPA1_cx_vfc, }; static const struct rpmpd_desc msm8226_desc = { @@ -197,14 +197,14 @@ static const struct rpmpd_desc msm8226_desc = { /* msm8939 RPM Power Domains */ static struct rpmpd *msm8939_rpmpds[] = { - [MSM8939_VDDMDCX] = &SMPA1_CORNER_vddmd, - [MSM8939_VDDMDCX_AO] = &SMPA1_CORNER_vddmd_ao, - [MSM8939_VDDMDCX_VFC] = &SMPA1_vddmd_vfc, - [MSM8939_VDDCX] = &SMPA2_CORNER_vddcx, - [MSM8939_VDDCX_AO] = &SMPA2_CORNER_vddcx_ao, - [MSM8939_VDDCX_VFC] = &SMPA2_vddcx_vfc, - [MSM8939_VDDMX] = &LDOA3_CORNER_vddmx, - [MSM8939_VDDMX_AO] = &LDOA3_CORNER_vddmx_ao, + [MSM8939_VDDMDCX] = &SMPA1_CORNER_md, + [MSM8939_VDDMDCX_AO] = &SMPA1_CORNER_md_ao, + [MSM8939_VDDMDCX_VFC] = &SMPA1_md_vfc, + [MSM8939_VDDCX] = &SMPA2_CORNER_cx, + [MSM8939_VDDCX_AO] = &SMPA2_CORNER_cx_ao, + [MSM8939_VDDCX_VFC] = &SMPA2_cx_vfc, + [MSM8939_VDDMX] = &LDOA3_CORNER_mx, + [MSM8939_VDDMX_AO] = &LDOA3_CORNER_mx_ao, }; static const struct rpmpd_desc msm8939_desc = { @@ -215,11 +215,11 @@ static const struct rpmpd_desc msm8939_desc = { /* msm8916 RPM Power Domains */ static struct rpmpd *msm8916_rpmpds[] = { - [MSM8916_VDDCX] = &SMPA1_CORNER_vddcx, - [MSM8916_VDDCX_AO] = &SMPA1_CORNER_vddcx_ao, - [MSM8916_VDDCX_VFC] = &SMPA1_vddcx_vfc, - [MSM8916_VDDMX] = &LDOA3_CORNER_vddmx, - [MSM8916_VDDMX_AO] = &LDOA3_CORNER_vddmx_ao, + [MSM8916_VDDCX] = &SMPA1_CORNER_cx, + [MSM8916_VDDCX_AO] = &SMPA1_CORNER_cx_ao, + [MSM8916_VDDCX_VFC] = &SMPA1_cx_vfc, + [MSM8916_VDDMX] = &LDOA3_CORNER_mx, + [MSM8916_VDDMX_AO] = &LDOA3_CORNER_mx_ao, }; static const struct rpmpd_desc msm8916_desc = { @@ -230,13 +230,13 @@ static const struct rpmpd_desc msm8916_desc = { /* msm8953 RPM Power Domains */ static struct rpmpd *msm8953_rpmpds[] = { - [MSM8953_VDDMD] = &SMPA1_LEVEL_vddmd, - [MSM8953_VDDMD_AO] = &SMPA1_LEVEL_vddmd_ao, - [MSM8953_VDDCX] = &SMPA2_LEVEL_vddcx, - [MSM8953_VDDCX_AO] = &SMPA2_LEVEL_vddcx_ao, - [MSM8953_VDDCX_VFL] = &SMPA2_vddcx_vfl, - [MSM8953_VDDMX] = &SMPA7_LEVEL_vddmx, - [MSM8953_VDDMX_AO] = &SMPA7_LEVEL_vddmx_ao, + [MSM8953_VDDMD] = &SMPA1_LEVEL_md, + [MSM8953_VDDMD_AO] = &SMPA1_LEVEL_md_ao, + [MSM8953_VDDCX] = &SMPA2_LEVEL_cx, + [MSM8953_VDDCX_AO] = &SMPA2_LEVEL_cx_ao, + [MSM8953_VDDCX_VFL] = &SMPA2_cx_vfl, + [MSM8953_VDDMX] = &SMPA7_LEVEL_mx, + [MSM8953_VDDMX_AO] = &SMPA7_LEVEL_mx_ao, }; static const struct rpmpd_desc msm8953_desc = { @@ -247,12 +247,12 @@ static const struct rpmpd_desc msm8953_desc = { /* msm8976 RPM Power Domains */ static struct rpmpd *msm8976_rpmpds[] = { - [MSM8976_VDDCX] = &SMPA2_LEVEL_vddcx, - [MSM8976_VDDCX_AO] = &SMPA2_LEVEL_vddcx_ao, - [MSM8976_VDDCX_VFL] = &RWSC2_vddcx_vfl, - [MSM8976_VDDMX] = &SMPA6_LEVEL_vddmx, - [MSM8976_VDDMX_AO] = &SMPA6_LEVEL_vddmx_ao, - [MSM8976_VDDMX_VFL] = &RWSM6_vddmx_vfl, + [MSM8976_VDDCX] = &SMPA2_LEVEL_cx, + [MSM8976_VDDCX_AO] = &SMPA2_LEVEL_cx_ao, + [MSM8976_VDDCX_VFL] = &RWSC2_cx_vfl, + [MSM8976_VDDMX] = &SMPA6_LEVEL_mx, + [MSM8976_VDDMX_AO] = &SMPA6_LEVEL_mx_ao, + [MSM8976_VDDMX_VFL] = &RWSM6_mx_vfl, }; static const struct rpmpd_desc msm8976_desc = { @@ -263,15 +263,15 @@ static const struct rpmpd_desc msm8976_desc = { /* msm8994 RPM Power domains */ static struct rpmpd *msm8994_rpmpds[] = { - [MSM8994_VDDCX] = &SMPA1_CORNER_vddcx, - [MSM8994_VDDCX_AO] = &SMPA1_CORNER_vddcx_ao, - [MSM8994_VDDCX_VFC] = &SMPA1_vddcx_vfc, - [MSM8994_VDDMX] = &SMPA2_CORNER_vddmx, - [MSM8994_VDDMX_AO] = &SMPA2_CORNER_vddmx_ao, + [MSM8994_VDDCX] = &SMPA1_CORNER_cx, + [MSM8994_VDDCX_AO] = &SMPA1_CORNER_cx_ao, + [MSM8994_VDDCX_VFC] = &SMPA1_cx_vfc, + [MSM8994_VDDMX] = &SMPA2_CORNER_mx, + [MSM8994_VDDMX_AO] = &SMPA2_CORNER_mx_ao, /* Attention! *Some* 8994 boards with pm8004 may use SMPC here! */ - [MSM8994_VDDGFX] = &SMPB2_vddgfx_corner, - [MSM8994_VDDGFX_VFC] = &SMPB2_vddgfx_vfc, + [MSM8994_VDDGFX] = &SMPB2_gfx_corner, + [MSM8994_VDDGFX_VFC] = &SMPB2_gfx_vfc, }; static const struct rpmpd_desc msm8994_desc = { @@ -282,13 +282,13 @@ static const struct rpmpd_desc msm8994_desc = { /* msm8996 RPM Power domains */ static struct rpmpd *msm8996_rpmpds[] = { - [MSM8996_VDDCX] = &SMPA1_CORNER_vddcx, - [MSM8996_VDDCX_AO] = &SMPA1_CORNER_vddcx_ao, - [MSM8996_VDDCX_VFC] = &SMPA1_vddcx_vfc, - [MSM8996_VDDMX] = &SMPA2_CORNER_vddmx, - [MSM8996_VDDMX_AO] = &SMPA2_CORNER_vddmx_ao, - [MSM8996_VDDSSCX] = &LDOA26_vddsscx_corner, - [MSM8996_VDDSSCX_VFC] = &LDOA26_vddsscx_vfc, + [MSM8996_VDDCX] = &SMPA1_CORNER_cx, + [MSM8996_VDDCX_AO] = &SMPA1_CORNER_cx_ao, + [MSM8996_VDDCX_VFC] = &SMPA1_cx_vfc, + [MSM8996_VDDMX] = &SMPA2_CORNER_mx, + [MSM8996_VDDMX_AO] = &SMPA2_CORNER_mx_ao, + [MSM8996_VDDSSCX] = &LDOA26_sscx_corner, + [MSM8996_VDDSSCX_VFC] = &LDOA26_sscx_vfc, }; static const struct rpmpd_desc msm8996_desc = { @@ -299,16 +299,16 @@ static const struct rpmpd_desc msm8996_desc = { /* msm8998 RPM Power domains */ static struct rpmpd *msm8998_rpmpds[] = { - [MSM8998_VDDCX] = &RWCX0_LEVEL_vddcx, - [MSM8998_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, - [MSM8998_VDDCX_VFL] = &RWCX0_vddcx_vfl, - [MSM8998_VDDMX] = &RWMX0_LEVEL_vddmx, - [MSM8998_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, - [MSM8998_VDDMX_VFL] = &RWMX0_vddmx_vfl, - [MSM8998_SSCCX] = &RWSC0_vdd_ssccx_lvl, - [MSM8998_SSCCX_VFL] = &RWSC0_vdd_ssccx_vfl, - [MSM8998_SSCMX] = &RWSM0_vdd_sscmx_lvl, - [MSM8998_SSCMX_VFL] = &RWSM0_vdd_sscmx_vfl, + [MSM8998_VDDCX] = &RWCX0_LEVEL_cx, + [MSM8998_VDDCX_AO] = &RWCX0_LEVEL_cx_ao, + [MSM8998_VDDCX_VFL] = &RWCX0_cx_vfl, + [MSM8998_VDDMX] = &RWMX0_LEVEL_mx, + [MSM8998_VDDMX_AO] = &RWMX0_LEVEL_mx_ao, + [MSM8998_VDDMX_VFL] = &RWMX0_mx_vfl, + [MSM8998_SSCCX] = &RWSC0_ssccx_lvl, + [MSM8998_SSCCX_VFL] = &RWSC0_ssccx_vfl, + [MSM8998_SSCMX] = &RWSM0_sscmx_lvl, + [MSM8998_SSCMX_VFL] = &RWSM0_sscmx_vfl, }; static const struct rpmpd_desc msm8998_desc = { @@ -319,13 +319,13 @@ static const struct rpmpd_desc msm8998_desc = { /* qcs404 RPM Power domains */ static struct rpmpd *qcs404_rpmpds[] = { - [QCS404_VDDMX] = &RWMX0_LEVEL_vddmx, - [QCS404_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, - [QCS404_VDDMX_VFL] = &RWMX0_vddmx_vfl, - [QCS404_LPICX] = &RWLC0_vdd_lpi_cx_lvl, - [QCS404_LPICX_VFL] = &RWLC0_vdd_lpicx_vfl, - [QCS404_LPIMX] = &RWLM0_vdd_lpi_mx_lvl, - [QCS404_LPIMX_VFL] = &RWLM0_vdd_lpimx_vfl, + [QCS404_VDDMX] = &RWMX0_LEVEL_mx, + [QCS404_VDDMX_AO] = &RWMX0_LEVEL_mx_ao, + [QCS404_VDDMX_VFL] = &RWMX0_mx_vfl, + [QCS404_LPICX] = &RWLC0_lpi_cx_lvl, + [QCS404_LPICX_VFL] = &RWLC0_lpicx_vfl, + [QCS404_LPIMX] = &RWLM0_lpi_mx_lvl, + [QCS404_LPIMX_VFL] = &RWLM0_lpimx_vfl, }; static const struct rpmpd_desc qcs404_desc = { @@ -336,16 +336,16 @@ static const struct rpmpd_desc qcs404_desc = { /* sdm660 RPM Power domains */ static struct rpmpd *sdm660_rpmpds[] = { - [SDM660_VDDCX] = &RWCX0_LEVEL_vddcx, - [SDM660_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, - [SDM660_VDDCX_VFL] = &RWCX0_vddcx_vfl, - [SDM660_VDDMX] = &RWMX0_LEVEL_vddmx, - [SDM660_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, - [SDM660_VDDMX_VFL] = &RWMX0_vddmx_vfl, - [SDM660_SSCCX] = &RWLC0_vdd_ssccx_lvl, - [SDM660_SSCCX_VFL] = &RWLC0_vdd_ssccx_vfl, - [SDM660_SSCMX] = &RWLM0_vdd_sscmx_lvl, - [SDM660_SSCMX_VFL] = &RWLM0_vdd_sscmx_vfl, + [SDM660_VDDCX] = &RWCX0_LEVEL_cx, + [SDM660_VDDCX_AO] = &RWCX0_LEVEL_cx_ao, + [SDM660_VDDCX_VFL] = &RWCX0_cx_vfl, + [SDM660_VDDMX] = &RWMX0_LEVEL_mx, + [SDM660_VDDMX_AO] = &RWMX0_LEVEL_mx_ao, + [SDM660_VDDMX_VFL] = &RWMX0_mx_vfl, + [SDM660_SSCCX] = &RWLC0_ssccx_lvl, + [SDM660_SSCCX_VFL] = &RWLC0_ssccx_vfl, + [SDM660_SSCMX] = &RWLM0_sscmx_lvl, + [SDM660_SSCMX_VFL] = &RWLM0_sscmx_vfl, }; static const struct rpmpd_desc sdm660_desc = { @@ -356,14 +356,14 @@ static const struct rpmpd_desc sdm660_desc = { /* sm4250/6115 RPM Power domains */ static struct rpmpd *sm6115_rpmpds[] = { - [SM6115_VDDCX] = &RWCX0_LEVEL_vddcx, - [SM6115_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, - [SM6115_VDDCX_VFL] = &RWCX0_vddcx_vfl, - [SM6115_VDDMX] = &RWMX0_LEVEL_vddmx, - [SM6115_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, - [SM6115_VDDMX_VFL] = &RWMX0_vddmx_vfl, - [SM6115_VDD_LPI_CX] = &RWLC0_vdd_lpi_cx_lvl, - [SM6115_VDD_LPI_MX] = &RWLM0_vdd_lpi_mx_lvl, + [SM6115_VDDCX] = &RWCX0_LEVEL_cx, + [SM6115_VDDCX_AO] = &RWCX0_LEVEL_cx_ao, + [SM6115_VDDCX_VFL] = &RWCX0_cx_vfl, + [SM6115_VDDMX] = &RWMX0_LEVEL_mx, + [SM6115_VDDMX_AO] = &RWMX0_LEVEL_mx_ao, + [SM6115_VDDMX_VFL] = &RWMX0_mx_vfl, + [SM6115_VDD_LPI_CX] = &RWLC0_lpi_cx_lvl, + [SM6115_VDD_LPI_MX] = &RWLM0_lpi_mx_lvl, }; static const struct rpmpd_desc sm6115_desc = { @@ -374,12 +374,12 @@ static const struct rpmpd_desc sm6115_desc = { /* sm6125 RPM Power domains */ static struct rpmpd *sm6125_rpmpds[] = { - [SM6125_VDDCX] = &RWCX0_LEVEL_vddcx, - [SM6125_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, - [SM6125_VDDCX_VFL] = &RWCX0_vddcx_vfl, - [SM6125_VDDMX] = &RWMX0_LEVEL_vddmx, - [SM6125_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, - [SM6125_VDDMX_VFL] = &RWMX0_vddmx_vfl, + [SM6125_VDDCX] = &RWCX0_LEVEL_cx, + [SM6125_VDDCX_AO] = &RWCX0_LEVEL_cx_ao, + [SM6125_VDDCX_VFL] = &RWCX0_cx_vfl, + [SM6125_VDDMX] = &RWMX0_LEVEL_mx, + [SM6125_VDDMX_AO] = &RWMX0_LEVEL_mx_ao, + [SM6125_VDDMX_VFL] = &RWMX0_mx_vfl, }; static const struct rpmpd_desc sm6125_desc = { @@ -389,16 +389,16 @@ static const struct rpmpd_desc sm6125_desc = { }; static struct rpmpd *sm6375_rpmpds[] = { - [SM6375_VDDCX] = &RWCX0_LEVEL_vddcx, - [SM6375_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, - [SM6375_VDDCX_VFL] = &RWCX0_vddcx_vfl, - [SM6375_VDDMX] = &RWMX0_LEVEL_vddmx, - [SM6375_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, - [SM6375_VDDMX_VFL] = &RWMX0_vddmx_vfl, - [SM6375_VDDGX] = &RWGX0_LEVEL_vddgx, - [SM6375_VDDGX_AO] = &RWGX0_LEVEL_vddgx_ao, - [SM6375_VDD_LPI_CX] = &RWLC0_vdd_lpi_cx_lvl, - [SM6375_VDD_LPI_MX] = &RWLM0_vdd_lpi_mx_lvl, + [SM6375_VDDCX] = &RWCX0_LEVEL_cx, + [SM6375_VDDCX_AO] = &RWCX0_LEVEL_cx_ao, + [SM6375_VDDCX_VFL] = &RWCX0_cx_vfl, + [SM6375_VDDMX] = &RWMX0_LEVEL_mx, + [SM6375_VDDMX_AO] = &RWMX0_LEVEL_mx_ao, + [SM6375_VDDMX_VFL] = &RWMX0_mx_vfl, + [SM6375_VDDGX] = &RWGX0_LEVEL_gx, + [SM6375_VDDGX_AO] = &RWGX0_LEVEL_gx_ao, + [SM6375_VDD_LPI_CX] = &RWLC0_lpi_cx_lvl, + [SM6375_VDD_LPI_MX] = &RWLM0_lpi_mx_lvl, }; static const struct rpmpd_desc sm6375_desc = { @@ -408,14 +408,14 @@ static const struct rpmpd_desc sm6375_desc = { }; static struct rpmpd *qcm2290_rpmpds[] = { - [QCM2290_VDDCX] = &RWCX0_LEVEL_vddcx, - [QCM2290_VDDCX_AO] = &RWCX0_LEVEL_vddcx_ao, - [QCM2290_VDDCX_VFL] = &RWCX0_vddcx_vfl, - [QCM2290_VDDMX] = &RWMX0_LEVEL_vddmx, - [QCM2290_VDDMX_AO] = &RWMX0_LEVEL_vddmx_ao, - [QCM2290_VDDMX_VFL] = &RWMX0_vddmx_vfl, - [QCM2290_VDD_LPI_CX] = &RWLC0_vdd_lpi_cx_lvl, - [QCM2290_VDD_LPI_MX] = &RWLM0_vdd_lpi_mx_lvl, + [QCM2290_VDDCX] = &RWCX0_LEVEL_cx, + [QCM2290_VDDCX_AO] = &RWCX0_LEVEL_cx_ao, + [QCM2290_VDDCX_VFL] = &RWCX0_cx_vfl, + [QCM2290_VDDMX] = &RWMX0_LEVEL_mx, + [QCM2290_VDDMX_AO] = &RWMX0_LEVEL_mx_ao, + [QCM2290_VDDMX_VFL] = &RWMX0_mx_vfl, + [QCM2290_VDD_LPI_CX] = &RWLC0_lpi_cx_lvl, + [QCM2290_VDD_LPI_MX] = &RWLM0_lpi_mx_lvl, }; static const struct rpmpd_desc qcm2290_desc = { -- cgit v1.2.3 From 91c0bcef25f985fd974b6f1ba3d3d7383ac032d2 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 13 Mar 2023 21:00:03 +0100 Subject: soc: qcom: rpmpd: Expand struct definition macros Expand the struct definition macros to make things easier to see and maintain. Now that the macros are unnecessary, remove them. Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-5-06a4f448ff90@linaro.org --- drivers/soc/qcom/rpmpd.c | 539 ++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 441 insertions(+), 98 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c index 8f145663af9a..df4e0d8a2aa9 100644 --- a/drivers/soc/qcom/rpmpd.c +++ b/drivers/soc/qcom/rpmpd.c @@ -40,56 +40,6 @@ #define MAX_CORNER_RPMPD_STATE 6 -#define DEFINE_RPMPD_PAIR(_name, _active, r_type, r_key, r_id) \ - static struct rpmpd r_type##r_id##_##r_key##_##_active; \ - static struct rpmpd r_type##r_id##_##r_key##_##_name = { \ - .pd = { .name = #_name, }, \ - .peer = &r_type##r_id##_##r_key##_##_active, \ - .res_type = RPMPD_##r_type, \ - .res_id = r_id, \ - .key = KEY_##r_key, \ - }; \ - static struct rpmpd r_type##r_id##_##r_key##_##_active = { \ - .pd = { .name = #_active, }, \ - .peer = &r_type##r_id##_##r_key##_##_name, \ - .active_only = true, \ - .res_type = RPMPD_##r_type, \ - .res_id = r_id, \ - .key = KEY_##r_key, \ - } - -#define DEFINE_RPMPD_CORNER(_name, r_type, r_id) \ - static struct rpmpd r_type##r_id##_##_name##_corner = { \ - .pd = { .name = #_name, }, \ - .res_type = RPMPD_##r_type, \ - .res_id = r_id, \ - .key = KEY_CORNER, \ - } - -#define DEFINE_RPMPD_LEVEL(_name, r_type, r_id) \ - static struct rpmpd r_type##r_id##_##_name##_lvl = { \ - .pd = { .name = #_name, }, \ - .res_type = RPMPD_##r_type, \ - .res_id = r_id, \ - .key = KEY_LEVEL, \ - } - -#define DEFINE_RPMPD_VFC(_name, r_type, r_id) \ - static struct rpmpd r_type##r_id##_##_name = { \ - .pd = { .name = #_name, }, \ - .res_type = RPMPD_##r_type, \ - .res_id = r_id, \ - .key = KEY_FLOOR_CORNER, \ - } - -#define DEFINE_RPMPD_VFL(_name, r_type, r_id) \ - static struct rpmpd r_type##r_id##_##_name = { \ - .pd = { .name = #_name, }, \ - .res_type = RPMPD_##r_type, \ - .res_id = r_id, \ - .key = KEY_FLOOR_LEVEL, \ - } - struct rpmpd_req { __le32 key; __le32 nbytes; @@ -117,54 +67,447 @@ struct rpmpd_desc { static DEFINE_MUTEX(rpmpd_lock); -DEFINE_RPMPD_PAIR(cx, cx_ao, RWCX, LEVEL, 0); -DEFINE_RPMPD_PAIR(cx, cx_ao, SMPA, CORNER, 1); -DEFINE_RPMPD_PAIR(cx, cx_ao, SMPA, CORNER, 2); -DEFINE_RPMPD_PAIR(cx, cx_ao, SMPA, LEVEL, 2); -DEFINE_RPMPD_PAIR(cx, cx_ao, SMPA, LEVEL, 3); -DEFINE_RPMPD_VFL(cx_vfl, RWCX, 0); -DEFINE_RPMPD_VFL(cx_vfl, RWSC, 2); -DEFINE_RPMPD_VFC(cx_vfc, SMPA, 1); -DEFINE_RPMPD_VFC(cx_vfc, SMPA, 2); -DEFINE_RPMPD_VFL(cx_vfl, SMPA, 2); -DEFINE_RPMPD_VFL(cx_vfl, SMPA, 3); - -DEFINE_RPMPD_CORNER(gfx, SMPB, 2); -DEFINE_RPMPD_VFC(gfx_vfc, SMPB, 2); - -DEFINE_RPMPD_PAIR(gx, gx_ao, RWGX, LEVEL, 0); - -DEFINE_RPMPD_PAIR(mx, mx_ao, LDOA, CORNER, 3); -DEFINE_RPMPD_PAIR(mx, mx_ao, LDOA, LEVEL, 12); -DEFINE_RPMPD_PAIR(mx, mx_ao, SMPA, CORNER, 2); -DEFINE_RPMPD_PAIR(mx, mx_ao, RWMX, LEVEL, 0); -DEFINE_RPMPD_PAIR(mx, mx_ao, SMPA, LEVEL, 6); -DEFINE_RPMPD_PAIR(mx, mx_ao, SMPA, LEVEL, 7); -DEFINE_RPMPD_VFL(mx_vfl, LDOA, 12); -DEFINE_RPMPD_VFL(mx_vfl, RWMX, 0); -DEFINE_RPMPD_VFL(mx_vfl, RWSM, 6); - -DEFINE_RPMPD_PAIR(md, md_ao, SMPA, CORNER, 1); -DEFINE_RPMPD_PAIR(md, md_ao, SMPA, LEVEL, 1); -DEFINE_RPMPD_VFC(md_vfc, SMPA, 1); - -DEFINE_RPMPD_LEVEL(lpi_cx, RWLC, 0); -DEFINE_RPMPD_VFL(lpicx_vfl, RWLC, 0); - -DEFINE_RPMPD_LEVEL(lpi_mx, RWLM, 0); -DEFINE_RPMPD_VFL(lpimx_vfl, RWLM, 0); - -DEFINE_RPMPD_CORNER(sscx, LDOA, 26); -DEFINE_RPMPD_LEVEL(ssccx, RWLC, 0); -DEFINE_RPMPD_LEVEL(ssccx, RWSC, 0); -DEFINE_RPMPD_VFC(sscx_vfc, LDOA, 26); -DEFINE_RPMPD_VFL(ssccx_vfl, RWLC, 0); -DEFINE_RPMPD_VFL(ssccx_vfl, RWSC, 0); - -DEFINE_RPMPD_LEVEL(sscmx, RWLM, 0); -DEFINE_RPMPD_LEVEL(sscmx, RWSM, 0); -DEFINE_RPMPD_VFL(sscmx_vfl, RWLM, 0); -DEFINE_RPMPD_VFL(sscmx_vfl, RWSM, 0); +/* CX */ +static struct rpmpd RWCX0_LEVEL_cx_ao; +static struct rpmpd RWCX0_LEVEL_cx = { + .pd = { .name = "cx", }, + .peer = &RWCX0_LEVEL_cx_ao, + .res_type = RPMPD_RWCX, + .res_id = 0, + .key = KEY_LEVEL, +}; + +static struct rpmpd RWCX0_LEVEL_cx_ao = { + .pd = { .name = "cx_ao", }, + .peer = &RWCX0_LEVEL_cx, + .active_only = true, + .res_type = RPMPD_RWCX, + .res_id = 0, + .key = KEY_LEVEL, +}; + +static struct rpmpd SMPA1_CORNER_cx_ao; +static struct rpmpd SMPA1_CORNER_cx = { + .pd = { .name = "cx", }, + .peer = &SMPA1_CORNER_cx_ao, + .res_type = RPMPD_SMPA, + .res_id = 1, + .key = KEY_CORNER, +}; + +static struct rpmpd SMPA1_CORNER_cx_ao = { + .pd = { .name = "cx_ao", }, + .peer = &SMPA1_CORNER_cx, + .active_only = true, + .res_type = RPMPD_SMPA, + .res_id = 1, + .key = KEY_CORNER, +}; + +static struct rpmpd SMPA2_CORNER_cx_ao; +static struct rpmpd SMPA2_CORNER_cx = { + .pd = { .name = "cx", }, + .peer = &SMPA2_CORNER_cx_ao, + .res_type = RPMPD_SMPA, + .res_id = 2, + .key = KEY_CORNER, +}; + +static struct rpmpd SMPA2_CORNER_cx_ao = { + .pd = { .name = "cx_ao", }, + .peer = &SMPA2_CORNER_cx, + .active_only = true, + .res_type = RPMPD_SMPA, + .res_id = 2, + .key = KEY_CORNER, +}; + +static struct rpmpd SMPA2_LEVEL_cx_ao; +static struct rpmpd SMPA2_LEVEL_cx = { + .pd = { .name = "cx", }, + .peer = &SMPA2_LEVEL_cx_ao, + .res_type = RPMPD_SMPA, + .res_id = 2, + .key = KEY_LEVEL, +}; + +static struct rpmpd SMPA2_LEVEL_cx_ao = { + .pd = { .name = "cx_ao", }, + .peer = &SMPA2_LEVEL_cx, + .active_only = true, + .res_type = RPMPD_SMPA, + .res_id = 2, + .key = KEY_LEVEL, +}; + +static struct rpmpd SMPA3_LEVEL_cx_ao; +static struct rpmpd SMPA3_LEVEL_cx = { + .pd = { .name = "cx", }, + .peer = &SMPA3_LEVEL_cx_ao, + .res_type = RPMPD_SMPA, + .res_id = 3, + .key = KEY_LEVEL, +}; + +static struct rpmpd SMPA3_LEVEL_cx_ao = { + .pd = { .name = "cx_ao", }, + .peer = &SMPA3_LEVEL_cx, + .active_only = true, + .res_type = RPMPD_SMPA, + .res_id = 3, + .key = KEY_LEVEL, +}; + +static struct rpmpd RWCX0_cx_vfl = { + .pd = { .name = "cx_vfl", }, + .res_type = RPMPD_RWCX, + .res_id = 0, + .key = KEY_FLOOR_LEVEL, +}; + +static struct rpmpd RWSC2_cx_vfl = { + .pd = { .name = "cx_vfl", }, + .res_type = RPMPD_RWSC, + .res_id = 2, + .key = KEY_FLOOR_LEVEL, +}; + +static struct rpmpd SMPA1_cx_vfc = { + .pd = { .name = "cx_vfc", }, + .res_type = RPMPD_SMPA, + .res_id = 1, + .key = KEY_FLOOR_CORNER, +}; + +static struct rpmpd SMPA2_cx_vfc = { + .pd = { .name = "cx_vfc", }, + .res_type = RPMPD_SMPA, + .res_id = 2, + .key = KEY_FLOOR_CORNER, +}; + +static struct rpmpd SMPA2_cx_vfl = { + .pd = { .name = "cx_vfl", }, + .res_type = RPMPD_SMPA, + .res_id = 2, + .key = KEY_FLOOR_LEVEL, +}; + +static struct rpmpd SMPA3_cx_vfl = { + .pd = { .name = "cx_vfl", }, + .res_type = RPMPD_SMPA, + .res_id = 3, + .key = KEY_FLOOR_LEVEL, +}; + +/* G(F)X */ +static struct rpmpd SMPB2_gfx_corner = { + .pd = { .name = "gfx", }, + .res_type = RPMPD_SMPB, + .res_id = 2, + .key = KEY_CORNER, +}; + +static struct rpmpd SMPB2_gfx_vfc = { + .pd = { .name = "gfx_vfc", }, + .res_type = RPMPD_SMPB, + .res_id = 2, + .key = KEY_FLOOR_CORNER, +}; + +static struct rpmpd RWGX0_LEVEL_gx_ao; +static struct rpmpd RWGX0_LEVEL_gx = { + .pd = { .name = "gx", }, + .peer = &RWGX0_LEVEL_gx_ao, + .res_type = RPMPD_RWGX, + .res_id = 0, + .key = KEY_LEVEL, +}; + +static struct rpmpd RWGX0_LEVEL_gx_ao = { + .pd = { .name = "gx_ao", }, + .peer = &RWGX0_LEVEL_gx, + .active_only = true, + .res_type = RPMPD_RWGX, + .res_id = 0, + .key = KEY_LEVEL, +}; + +/* MX */ +static struct rpmpd LDOA3_CORNER_mx_ao; +static struct rpmpd LDOA3_CORNER_mx = { + .pd = { .name = "mx", }, + .peer = &LDOA3_CORNER_mx_ao, + .res_type = RPMPD_LDOA, + .res_id = 3, + .key = KEY_CORNER, +}; + +static struct rpmpd LDOA3_CORNER_mx_ao = { + .pd = { .name = "mx_ao", }, + .peer = &LDOA3_CORNER_mx, + .active_only = true, + .res_type = RPMPD_LDOA, + .res_id = 3, + .key = KEY_CORNER, +}; + +static struct rpmpd LDOA12_LEVEL_mx_ao; +static struct rpmpd LDOA12_LEVEL_mx = { + .pd = { .name = "mx", }, + .peer = &LDOA12_LEVEL_mx_ao, + .res_type = RPMPD_LDOA, + .res_id = 12, + .key = KEY_LEVEL, +}; + +static struct rpmpd LDOA12_LEVEL_mx_ao = { + .pd = { .name = "mx_ao", }, + .peer = &LDOA12_LEVEL_mx, + .active_only = true, + .res_type = RPMPD_LDOA, + .res_id = 12, + .key = KEY_LEVEL, +}; + +static struct rpmpd SMPA2_CORNER_mx_ao; +static struct rpmpd SMPA2_CORNER_mx = { + .pd = { .name = "mx", }, + .peer = &SMPA2_CORNER_mx_ao, + .res_type = RPMPD_SMPA, + .res_id = 2, + .key = KEY_CORNER, +}; + +static struct rpmpd SMPA2_CORNER_mx_ao = { + .pd = { .name = "mx_ao", }, + .peer = &SMPA2_CORNER_mx, + .active_only = true, + .res_type = RPMPD_SMPA, + .res_id = 2, + .key = KEY_CORNER, +}; + +static struct rpmpd RWMX0_LEVEL_mx_ao; +static struct rpmpd RWMX0_LEVEL_mx = { + .pd = { .name = "mx", }, + .peer = &RWMX0_LEVEL_mx_ao, + .res_type = RPMPD_RWMX, + .res_id = 0, + .key = KEY_LEVEL, +}; + +static struct rpmpd RWMX0_LEVEL_mx_ao = { + .pd = { .name = "mx_ao", }, + .peer = &RWMX0_LEVEL_mx, + .active_only = true, + .res_type = RPMPD_RWMX, + .res_id = 0, + .key = KEY_LEVEL, +}; + +static struct rpmpd SMPA6_LEVEL_mx_ao; +static struct rpmpd SMPA6_LEVEL_mx = { + .pd = { .name = "mx", }, + .peer = &SMPA6_LEVEL_mx_ao, + .res_type = RPMPD_SMPA, + .res_id = 6, + .key = KEY_LEVEL, +}; + +static struct rpmpd SMPA6_LEVEL_mx_ao = { + .pd = { .name = "mx_ao", }, + .peer = &SMPA6_LEVEL_mx, + .active_only = true, + .res_type = RPMPD_SMPA, + .res_id = 6, + .key = KEY_LEVEL, +}; + +static struct rpmpd SMPA7_LEVEL_mx_ao; +static struct rpmpd SMPA7_LEVEL_mx = { + .pd = { .name = "mx", }, + .peer = &SMPA7_LEVEL_mx_ao, + .res_type = RPMPD_SMPA, + .res_id = 7, + .key = KEY_LEVEL, +}; + +static struct rpmpd SMPA7_LEVEL_mx_ao = { + .pd = { .name = "mx_ao", }, + .peer = &SMPA7_LEVEL_mx, + .active_only = true, + .res_type = RPMPD_SMPA, + .res_id = 7, + .key = KEY_LEVEL, +}; + +static struct rpmpd LDOA12_mx_vfl = { + .pd = { .name = "mx_vfl", }, + .res_type = RPMPD_LDOA, + .res_id = 12, + .key = KEY_FLOOR_LEVEL, +}; + +static struct rpmpd RWMX0_mx_vfl = { + .pd = { .name = "mx_vfl", }, + .res_type = RPMPD_RWMX, + .res_id = 0, + .key = KEY_FLOOR_LEVEL, +}; + +static struct rpmpd RWSM6_mx_vfl = { + .pd = { .name = "mx_vfl", }, + .res_type = RPMPD_RWSM, + .res_id = 6, + .key = KEY_FLOOR_LEVEL, +}; + +/* MD */ +static struct rpmpd SMPA1_CORNER_md_ao; +static struct rpmpd SMPA1_CORNER_md = { + .pd = { .name = "md", }, + .peer = &SMPA1_CORNER_md_ao, + .res_type = RPMPD_SMPA, + .res_id = 1, + .key = KEY_CORNER, +}; + +static struct rpmpd SMPA1_CORNER_md_ao = { + .pd = { .name = "md_ao", }, + .peer = &SMPA1_CORNER_md, + .active_only = true, + .res_type = RPMPD_SMPA, + .res_id = 1, + .key = KEY_CORNER, +}; + +static struct rpmpd SMPA1_LEVEL_md_ao; +static struct rpmpd SMPA1_LEVEL_md = { + .pd = { .name = "md", }, + .peer = &SMPA1_LEVEL_md_ao, + .res_type = RPMPD_SMPA, + .res_id = 1, + .key = KEY_LEVEL, +}; + +static struct rpmpd SMPA1_LEVEL_md_ao = { + .pd = { .name = "md_ao", }, + .peer = &SMPA1_LEVEL_md, + .active_only = true, + .res_type = RPMPD_SMPA, + .res_id = 1, + .key = KEY_LEVEL, +}; + +static struct rpmpd SMPA1_md_vfc = { + .pd = { .name = "md_vfc", }, + .res_type = RPMPD_SMPA, + .res_id = 1, + .key = KEY_FLOOR_CORNER, +}; + +/* LPI_CX */ +static struct rpmpd RWLC0_lpi_cx_lvl = { + .pd = { .name = "lpi_cx", }, + .res_type = RPMPD_RWLC, + .res_id = 0, + .key = KEY_LEVEL, +}; + +static struct rpmpd RWLC0_lpicx_vfl = { + .pd = { .name = "lpicx_vfl", }, + .res_type = RPMPD_RWLC, + .res_id = 0, + .key = KEY_FLOOR_LEVEL, +}; + +/* LPI_MX */ +static struct rpmpd RWLM0_lpi_mx_lvl = { + .pd = { .name = "lpi_mx", }, + .res_type = RPMPD_RWLM, + .res_id = 0, + .key = KEY_LEVEL, +}; + +static struct rpmpd RWLM0_lpimx_vfl = { + .pd = { .name = "lpimx_vfl", }, + .res_type = RPMPD_RWLM, + .res_id = 0, + .key = KEY_FLOOR_LEVEL, +}; + +/* SSC_CX */ +static struct rpmpd LDOA26_sscx_corner = { + .pd = { .name = "sscx", }, + .res_type = RPMPD_LDOA, + .res_id = 26, + .key = KEY_CORNER, +}; + +static struct rpmpd RWLC0_ssccx_lvl = { + .pd = { .name = "ssccx", }, + .res_type = RPMPD_RWLC, + .res_id = 0, + .key = KEY_LEVEL, +}; + +static struct rpmpd RWSC0_ssccx_lvl = { + .pd = { .name = "ssccx", }, + .res_type = RPMPD_RWSC, + .res_id = 0, + .key = KEY_LEVEL, +}; + +static struct rpmpd LDOA26_sscx_vfc = { + .pd = { .name = "sscx_vfc", }, + .res_type = RPMPD_LDOA, + .res_id = 26, + .key = KEY_FLOOR_CORNER, +}; + +static struct rpmpd RWLC0_ssccx_vfl = { + .pd = { .name = "ssccx_vfl", }, + .res_type = RPMPD_RWLC, + .res_id = 0, + .key = KEY_FLOOR_LEVEL, +}; + +static struct rpmpd RWSC0_ssccx_vfl = { + .pd = { .name = "ssccx_vfl", }, + .res_type = RPMPD_RWSC, + .res_id = 0, + .key = KEY_FLOOR_LEVEL, +}; + +/* SSC_MX */ +static struct rpmpd RWLM0_sscmx_lvl = { + .pd = { .name = "sscmx", }, + .res_type = RPMPD_RWLM, + .res_id = 0, + .key = KEY_LEVEL, +}; + +static struct rpmpd RWSM0_sscmx_lvl = { + .pd = { .name = "sscmx", }, + .res_type = RPMPD_RWSM, + .res_id = 0, + .key = KEY_LEVEL, +}; + +static struct rpmpd RWLM0_sscmx_vfl = { + .pd = { .name = "sscmx_vfl", }, + .res_type = RPMPD_RWLM, + .res_id = 0, + .key = KEY_FLOOR_LEVEL, +}; + +static struct rpmpd RWSM0_sscmx_vfl = { + .pd = { .name = "sscmx_vfl", }, + .res_type = RPMPD_RWSM, + .res_id = 0, + .key = KEY_FLOOR_LEVEL, +}; /* mdm9607 RPM Power Domains */ static struct rpmpd *mdm9607_rpmpds[] = { -- cgit v1.2.3 From 07df05025eb4cb65c1549d392f988aa5eeb9e758 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 13 Mar 2023 21:00:04 +0100 Subject: soc: qcom: rpmpd: Improve the naming Now that we aren't bound by the preprocessor macros, improve the naming to be a bit less preprocessor-y and touch up some rpmpd.pd.name fields while at it. Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-6-06a4f448ff90@linaro.org --- drivers/soc/qcom/rpmpd.c | 432 +++++++++++++++++++++++------------------------ 1 file changed, 216 insertions(+), 216 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c index df4e0d8a2aa9..695b2fc56f40 100644 --- a/drivers/soc/qcom/rpmpd.c +++ b/drivers/soc/qcom/rpmpd.c @@ -68,132 +68,132 @@ struct rpmpd_desc { static DEFINE_MUTEX(rpmpd_lock); /* CX */ -static struct rpmpd RWCX0_LEVEL_cx_ao; -static struct rpmpd RWCX0_LEVEL_cx = { +static struct rpmpd cx_rwcx0_lvl_ao; +static struct rpmpd cx_rwcx0_lvl = { .pd = { .name = "cx", }, - .peer = &RWCX0_LEVEL_cx_ao, + .peer = &cx_rwcx0_lvl_ao, .res_type = RPMPD_RWCX, .res_id = 0, .key = KEY_LEVEL, }; -static struct rpmpd RWCX0_LEVEL_cx_ao = { +static struct rpmpd cx_rwcx0_lvl_ao = { .pd = { .name = "cx_ao", }, - .peer = &RWCX0_LEVEL_cx, + .peer = &cx_rwcx0_lvl, .active_only = true, .res_type = RPMPD_RWCX, .res_id = 0, .key = KEY_LEVEL, }; -static struct rpmpd SMPA1_CORNER_cx_ao; -static struct rpmpd SMPA1_CORNER_cx = { +static struct rpmpd cx_s1a_corner_ao; +static struct rpmpd cx_s1a_corner = { .pd = { .name = "cx", }, - .peer = &SMPA1_CORNER_cx_ao, + .peer = &cx_s1a_corner_ao, .res_type = RPMPD_SMPA, .res_id = 1, .key = KEY_CORNER, }; -static struct rpmpd SMPA1_CORNER_cx_ao = { +static struct rpmpd cx_s1a_corner_ao = { .pd = { .name = "cx_ao", }, - .peer = &SMPA1_CORNER_cx, + .peer = &cx_s1a_corner, .active_only = true, .res_type = RPMPD_SMPA, .res_id = 1, .key = KEY_CORNER, }; -static struct rpmpd SMPA2_CORNER_cx_ao; -static struct rpmpd SMPA2_CORNER_cx = { +static struct rpmpd cx_s2a_corner_ao; +static struct rpmpd cx_s2a_corner = { .pd = { .name = "cx", }, - .peer = &SMPA2_CORNER_cx_ao, + .peer = &cx_s2a_corner_ao, .res_type = RPMPD_SMPA, .res_id = 2, .key = KEY_CORNER, }; -static struct rpmpd SMPA2_CORNER_cx_ao = { +static struct rpmpd cx_s2a_corner_ao = { .pd = { .name = "cx_ao", }, - .peer = &SMPA2_CORNER_cx, + .peer = &cx_s2a_corner, .active_only = true, .res_type = RPMPD_SMPA, .res_id = 2, .key = KEY_CORNER, }; -static struct rpmpd SMPA2_LEVEL_cx_ao; -static struct rpmpd SMPA2_LEVEL_cx = { +static struct rpmpd cx_s2a_lvl_ao; +static struct rpmpd cx_s2a_lvl = { .pd = { .name = "cx", }, - .peer = &SMPA2_LEVEL_cx_ao, + .peer = &cx_s2a_lvl_ao, .res_type = RPMPD_SMPA, .res_id = 2, .key = KEY_LEVEL, }; -static struct rpmpd SMPA2_LEVEL_cx_ao = { +static struct rpmpd cx_s2a_lvl_ao = { .pd = { .name = "cx_ao", }, - .peer = &SMPA2_LEVEL_cx, + .peer = &cx_s2a_lvl, .active_only = true, .res_type = RPMPD_SMPA, .res_id = 2, .key = KEY_LEVEL, }; -static struct rpmpd SMPA3_LEVEL_cx_ao; -static struct rpmpd SMPA3_LEVEL_cx = { +static struct rpmpd cx_s3a_lvl_ao; +static struct rpmpd cx_s3a_lvl = { .pd = { .name = "cx", }, - .peer = &SMPA3_LEVEL_cx_ao, + .peer = &cx_s3a_lvl_ao, .res_type = RPMPD_SMPA, .res_id = 3, .key = KEY_LEVEL, }; -static struct rpmpd SMPA3_LEVEL_cx_ao = { +static struct rpmpd cx_s3a_lvl_ao = { .pd = { .name = "cx_ao", }, - .peer = &SMPA3_LEVEL_cx, + .peer = &cx_s3a_lvl, .active_only = true, .res_type = RPMPD_SMPA, .res_id = 3, .key = KEY_LEVEL, }; -static struct rpmpd RWCX0_cx_vfl = { +static struct rpmpd cx_rwcx0_vfl = { .pd = { .name = "cx_vfl", }, .res_type = RPMPD_RWCX, .res_id = 0, .key = KEY_FLOOR_LEVEL, }; -static struct rpmpd RWSC2_cx_vfl = { +static struct rpmpd cx_rwsc2_vfl = { .pd = { .name = "cx_vfl", }, .res_type = RPMPD_RWSC, .res_id = 2, .key = KEY_FLOOR_LEVEL, }; -static struct rpmpd SMPA1_cx_vfc = { +static struct rpmpd cx_s1a_vfc = { .pd = { .name = "cx_vfc", }, .res_type = RPMPD_SMPA, .res_id = 1, .key = KEY_FLOOR_CORNER, }; -static struct rpmpd SMPA2_cx_vfc = { +static struct rpmpd cx_s2a_vfc = { .pd = { .name = "cx_vfc", }, .res_type = RPMPD_SMPA, .res_id = 2, .key = KEY_FLOOR_CORNER, }; -static struct rpmpd SMPA2_cx_vfl = { +static struct rpmpd cx_s2a_vfl = { .pd = { .name = "cx_vfl", }, .res_type = RPMPD_SMPA, .res_id = 2, .key = KEY_FLOOR_LEVEL, }; -static struct rpmpd SMPA3_cx_vfl = { +static struct rpmpd cx_s3a_vfl = { .pd = { .name = "cx_vfl", }, .res_type = RPMPD_SMPA, .res_id = 3, @@ -201,32 +201,32 @@ static struct rpmpd SMPA3_cx_vfl = { }; /* G(F)X */ -static struct rpmpd SMPB2_gfx_corner = { +static struct rpmpd gfx_s2b_corner = { .pd = { .name = "gfx", }, .res_type = RPMPD_SMPB, .res_id = 2, .key = KEY_CORNER, }; -static struct rpmpd SMPB2_gfx_vfc = { +static struct rpmpd gfx_s2b_vfc = { .pd = { .name = "gfx_vfc", }, .res_type = RPMPD_SMPB, .res_id = 2, .key = KEY_FLOOR_CORNER, }; -static struct rpmpd RWGX0_LEVEL_gx_ao; -static struct rpmpd RWGX0_LEVEL_gx = { +static struct rpmpd gx_rwgx0_lvl_ao; +static struct rpmpd gx_rwgx0_lvl = { .pd = { .name = "gx", }, - .peer = &RWGX0_LEVEL_gx_ao, + .peer = &gx_rwgx0_lvl_ao, .res_type = RPMPD_RWGX, .res_id = 0, .key = KEY_LEVEL, }; -static struct rpmpd RWGX0_LEVEL_gx_ao = { +static struct rpmpd gx_rwgx0_lvl_ao = { .pd = { .name = "gx_ao", }, - .peer = &RWGX0_LEVEL_gx, + .peer = &gx_rwgx0_lvl, .active_only = true, .res_type = RPMPD_RWGX, .res_id = 0, @@ -234,129 +234,129 @@ static struct rpmpd RWGX0_LEVEL_gx_ao = { }; /* MX */ -static struct rpmpd LDOA3_CORNER_mx_ao; -static struct rpmpd LDOA3_CORNER_mx = { +static struct rpmpd mx_l3a_corner_ao; +static struct rpmpd mx_l3a_corner = { .pd = { .name = "mx", }, - .peer = &LDOA3_CORNER_mx_ao, + .peer = &mx_l3a_corner_ao, .res_type = RPMPD_LDOA, .res_id = 3, .key = KEY_CORNER, }; -static struct rpmpd LDOA3_CORNER_mx_ao = { +static struct rpmpd mx_l3a_corner_ao = { .pd = { .name = "mx_ao", }, - .peer = &LDOA3_CORNER_mx, + .peer = &mx_l3a_corner, .active_only = true, .res_type = RPMPD_LDOA, .res_id = 3, .key = KEY_CORNER, }; -static struct rpmpd LDOA12_LEVEL_mx_ao; -static struct rpmpd LDOA12_LEVEL_mx = { +static struct rpmpd mx_l12a_lvl_ao; +static struct rpmpd mx_l12a_lvl = { .pd = { .name = "mx", }, - .peer = &LDOA12_LEVEL_mx_ao, + .peer = &mx_l12a_lvl_ao, .res_type = RPMPD_LDOA, .res_id = 12, .key = KEY_LEVEL, }; -static struct rpmpd LDOA12_LEVEL_mx_ao = { +static struct rpmpd mx_l12a_lvl_ao = { .pd = { .name = "mx_ao", }, - .peer = &LDOA12_LEVEL_mx, + .peer = &mx_l12a_lvl, .active_only = true, .res_type = RPMPD_LDOA, .res_id = 12, .key = KEY_LEVEL, }; -static struct rpmpd SMPA2_CORNER_mx_ao; -static struct rpmpd SMPA2_CORNER_mx = { +static struct rpmpd mx_s2a_corner_ao; +static struct rpmpd mx_s2a_corner = { .pd = { .name = "mx", }, - .peer = &SMPA2_CORNER_mx_ao, + .peer = &mx_s2a_corner_ao, .res_type = RPMPD_SMPA, .res_id = 2, .key = KEY_CORNER, }; -static struct rpmpd SMPA2_CORNER_mx_ao = { +static struct rpmpd mx_s2a_corner_ao = { .pd = { .name = "mx_ao", }, - .peer = &SMPA2_CORNER_mx, + .peer = &mx_s2a_corner, .active_only = true, .res_type = RPMPD_SMPA, .res_id = 2, .key = KEY_CORNER, }; -static struct rpmpd RWMX0_LEVEL_mx_ao; -static struct rpmpd RWMX0_LEVEL_mx = { +static struct rpmpd mx_rwmx0_lvl_ao; +static struct rpmpd mx_rwmx0_lvl = { .pd = { .name = "mx", }, - .peer = &RWMX0_LEVEL_mx_ao, + .peer = &mx_rwmx0_lvl_ao, .res_type = RPMPD_RWMX, .res_id = 0, .key = KEY_LEVEL, }; -static struct rpmpd RWMX0_LEVEL_mx_ao = { +static struct rpmpd mx_rwmx0_lvl_ao = { .pd = { .name = "mx_ao", }, - .peer = &RWMX0_LEVEL_mx, + .peer = &mx_rwmx0_lvl, .active_only = true, .res_type = RPMPD_RWMX, .res_id = 0, .key = KEY_LEVEL, }; -static struct rpmpd SMPA6_LEVEL_mx_ao; -static struct rpmpd SMPA6_LEVEL_mx = { +static struct rpmpd mx_s6a_lvl_ao; +static struct rpmpd mx_s6a_lvl = { .pd = { .name = "mx", }, - .peer = &SMPA6_LEVEL_mx_ao, + .peer = &mx_s6a_lvl_ao, .res_type = RPMPD_SMPA, .res_id = 6, .key = KEY_LEVEL, }; -static struct rpmpd SMPA6_LEVEL_mx_ao = { +static struct rpmpd mx_s6a_lvl_ao = { .pd = { .name = "mx_ao", }, - .peer = &SMPA6_LEVEL_mx, + .peer = &mx_s6a_lvl, .active_only = true, .res_type = RPMPD_SMPA, .res_id = 6, .key = KEY_LEVEL, }; -static struct rpmpd SMPA7_LEVEL_mx_ao; -static struct rpmpd SMPA7_LEVEL_mx = { +static struct rpmpd mx_s7a_lvl_ao; +static struct rpmpd mx_s7a_lvl = { .pd = { .name = "mx", }, - .peer = &SMPA7_LEVEL_mx_ao, + .peer = &mx_s7a_lvl_ao, .res_type = RPMPD_SMPA, .res_id = 7, .key = KEY_LEVEL, }; -static struct rpmpd SMPA7_LEVEL_mx_ao = { +static struct rpmpd mx_s7a_lvl_ao = { .pd = { .name = "mx_ao", }, - .peer = &SMPA7_LEVEL_mx, + .peer = &mx_s7a_lvl, .active_only = true, .res_type = RPMPD_SMPA, .res_id = 7, .key = KEY_LEVEL, }; -static struct rpmpd LDOA12_mx_vfl = { +static struct rpmpd mx_l12a_vfl = { .pd = { .name = "mx_vfl", }, .res_type = RPMPD_LDOA, .res_id = 12, .key = KEY_FLOOR_LEVEL, }; -static struct rpmpd RWMX0_mx_vfl = { +static struct rpmpd mx_rwmx0_vfl = { .pd = { .name = "mx_vfl", }, .res_type = RPMPD_RWMX, .res_id = 0, .key = KEY_FLOOR_LEVEL, }; -static struct rpmpd RWSM6_mx_vfl = { +static struct rpmpd mx_rwsm6_vfl = { .pd = { .name = "mx_vfl", }, .res_type = RPMPD_RWSM, .res_id = 6, @@ -364,43 +364,43 @@ static struct rpmpd RWSM6_mx_vfl = { }; /* MD */ -static struct rpmpd SMPA1_CORNER_md_ao; -static struct rpmpd SMPA1_CORNER_md = { +static struct rpmpd md_s1a_corner_ao; +static struct rpmpd md_s1a_corner = { .pd = { .name = "md", }, - .peer = &SMPA1_CORNER_md_ao, + .peer = &md_s1a_corner_ao, .res_type = RPMPD_SMPA, .res_id = 1, .key = KEY_CORNER, }; -static struct rpmpd SMPA1_CORNER_md_ao = { +static struct rpmpd md_s1a_corner_ao = { .pd = { .name = "md_ao", }, - .peer = &SMPA1_CORNER_md, + .peer = &md_s1a_corner, .active_only = true, .res_type = RPMPD_SMPA, .res_id = 1, .key = KEY_CORNER, }; -static struct rpmpd SMPA1_LEVEL_md_ao; -static struct rpmpd SMPA1_LEVEL_md = { +static struct rpmpd md_s1a_lvl_ao; +static struct rpmpd md_s1a_lvl = { .pd = { .name = "md", }, - .peer = &SMPA1_LEVEL_md_ao, + .peer = &md_s1a_lvl_ao, .res_type = RPMPD_SMPA, .res_id = 1, .key = KEY_LEVEL, }; -static struct rpmpd SMPA1_LEVEL_md_ao = { +static struct rpmpd md_s1a_lvl_ao = { .pd = { .name = "md_ao", }, - .peer = &SMPA1_LEVEL_md, + .peer = &md_s1a_lvl, .active_only = true, .res_type = RPMPD_SMPA, .res_id = 1, .key = KEY_LEVEL, }; -static struct rpmpd SMPA1_md_vfc = { +static struct rpmpd md_s1a_vfc = { .pd = { .name = "md_vfc", }, .res_type = RPMPD_SMPA, .res_id = 1, @@ -408,102 +408,102 @@ static struct rpmpd SMPA1_md_vfc = { }; /* LPI_CX */ -static struct rpmpd RWLC0_lpi_cx_lvl = { +static struct rpmpd lpi_cx_rwlc0_lvl = { .pd = { .name = "lpi_cx", }, .res_type = RPMPD_RWLC, .res_id = 0, .key = KEY_LEVEL, }; -static struct rpmpd RWLC0_lpicx_vfl = { - .pd = { .name = "lpicx_vfl", }, +static struct rpmpd lpi_cx_rwlc0_vfl = { + .pd = { .name = "lpi_cx_vfl", }, .res_type = RPMPD_RWLC, .res_id = 0, .key = KEY_FLOOR_LEVEL, }; /* LPI_MX */ -static struct rpmpd RWLM0_lpi_mx_lvl = { +static struct rpmpd lpi_mx_rwlm0_lvl = { .pd = { .name = "lpi_mx", }, .res_type = RPMPD_RWLM, .res_id = 0, .key = KEY_LEVEL, }; -static struct rpmpd RWLM0_lpimx_vfl = { - .pd = { .name = "lpimx_vfl", }, +static struct rpmpd lpi_mx_rwlm0_vfl = { + .pd = { .name = "lpi_mx_vfl", }, .res_type = RPMPD_RWLM, .res_id = 0, .key = KEY_FLOOR_LEVEL, }; /* SSC_CX */ -static struct rpmpd LDOA26_sscx_corner = { - .pd = { .name = "sscx", }, +static struct rpmpd ssc_cx_l26a_corner = { + .pd = { .name = "ssc_cx", }, .res_type = RPMPD_LDOA, .res_id = 26, .key = KEY_CORNER, }; -static struct rpmpd RWLC0_ssccx_lvl = { - .pd = { .name = "ssccx", }, +static struct rpmpd ssc_cx_rwlc0_lvl = { + .pd = { .name = "ssc_cx", }, .res_type = RPMPD_RWLC, .res_id = 0, .key = KEY_LEVEL, }; -static struct rpmpd RWSC0_ssccx_lvl = { - .pd = { .name = "ssccx", }, +static struct rpmpd ssc_cx_rwsc0_lvl = { + .pd = { .name = "ssc_cx", }, .res_type = RPMPD_RWSC, .res_id = 0, .key = KEY_LEVEL, }; -static struct rpmpd LDOA26_sscx_vfc = { - .pd = { .name = "sscx_vfc", }, +static struct rpmpd ssc_cx_l26a_vfc = { + .pd = { .name = "ssc_cx_vfc", }, .res_type = RPMPD_LDOA, .res_id = 26, .key = KEY_FLOOR_CORNER, }; -static struct rpmpd RWLC0_ssccx_vfl = { - .pd = { .name = "ssccx_vfl", }, +static struct rpmpd ssc_cx_rwlc0_vfl = { + .pd = { .name = "ssc_cx_vfl", }, .res_type = RPMPD_RWLC, .res_id = 0, .key = KEY_FLOOR_LEVEL, }; -static struct rpmpd RWSC0_ssccx_vfl = { - .pd = { .name = "ssccx_vfl", }, +static struct rpmpd ssc_cx_rwsc0_vfl = { + .pd = { .name = "ssc_cx_vfl", }, .res_type = RPMPD_RWSC, .res_id = 0, .key = KEY_FLOOR_LEVEL, }; /* SSC_MX */ -static struct rpmpd RWLM0_sscmx_lvl = { - .pd = { .name = "sscmx", }, +static struct rpmpd ssc_mx_rwlm0_lvl = { + .pd = { .name = "ssc_mx", }, .res_type = RPMPD_RWLM, .res_id = 0, .key = KEY_LEVEL, }; -static struct rpmpd RWSM0_sscmx_lvl = { - .pd = { .name = "sscmx", }, +static struct rpmpd ssc_mx_rwsm0_lvl = { + .pd = { .name = "ssc_mx", }, .res_type = RPMPD_RWSM, .res_id = 0, .key = KEY_LEVEL, }; -static struct rpmpd RWLM0_sscmx_vfl = { - .pd = { .name = "sscmx_vfl", }, +static struct rpmpd ssc_mx_rwlm0_vfl = { + .pd = { .name = "ssc_mx_vfl", }, .res_type = RPMPD_RWLM, .res_id = 0, .key = KEY_FLOOR_LEVEL, }; -static struct rpmpd RWSM0_sscmx_vfl = { - .pd = { .name = "sscmx_vfl", }, +static struct rpmpd ssc_mx_rwsm0_vfl = { + .pd = { .name = "ssc_mx_vfl", }, .res_type = RPMPD_RWSM, .res_id = 0, .key = KEY_FLOOR_LEVEL, @@ -511,12 +511,12 @@ static struct rpmpd RWSM0_sscmx_vfl = { /* mdm9607 RPM Power Domains */ static struct rpmpd *mdm9607_rpmpds[] = { - [MDM9607_VDDCX] = &SMPA3_LEVEL_cx, - [MDM9607_VDDCX_AO] = &SMPA3_LEVEL_cx_ao, - [MDM9607_VDDCX_VFL] = &SMPA3_cx_vfl, - [MDM9607_VDDMX] = &LDOA12_LEVEL_mx, - [MDM9607_VDDMX_AO] = &LDOA12_LEVEL_mx_ao, - [MDM9607_VDDMX_VFL] = &LDOA12_mx_vfl, + [MDM9607_VDDCX] = &cx_s3a_lvl, + [MDM9607_VDDCX_AO] = &cx_s3a_lvl_ao, + [MDM9607_VDDCX_VFL] = &cx_s3a_vfl, + [MDM9607_VDDMX] = &mx_l12a_lvl, + [MDM9607_VDDMX_AO] = &mx_l12a_lvl_ao, + [MDM9607_VDDMX_VFL] = &mx_l12a_vfl, }; static const struct rpmpd_desc mdm9607_desc = { @@ -527,9 +527,9 @@ static const struct rpmpd_desc mdm9607_desc = { /* msm8226 RPM Power Domains */ static struct rpmpd *msm8226_rpmpds[] = { - [MSM8226_VDDCX] = &SMPA1_CORNER_cx, - [MSM8226_VDDCX_AO] = &SMPA1_CORNER_cx_ao, - [MSM8226_VDDCX_VFC] = &SMPA1_cx_vfc, + [MSM8226_VDDCX] = &cx_s1a_corner, + [MSM8226_VDDCX_AO] = &cx_s1a_corner_ao, + [MSM8226_VDDCX_VFC] = &cx_s1a_vfc, }; static const struct rpmpd_desc msm8226_desc = { @@ -540,14 +540,14 @@ static const struct rpmpd_desc msm8226_desc = { /* msm8939 RPM Power Domains */ static struct rpmpd *msm8939_rpmpds[] = { - [MSM8939_VDDMDCX] = &SMPA1_CORNER_md, - [MSM8939_VDDMDCX_AO] = &SMPA1_CORNER_md_ao, - [MSM8939_VDDMDCX_VFC] = &SMPA1_md_vfc, - [MSM8939_VDDCX] = &SMPA2_CORNER_cx, - [MSM8939_VDDCX_AO] = &SMPA2_CORNER_cx_ao, - [MSM8939_VDDCX_VFC] = &SMPA2_cx_vfc, - [MSM8939_VDDMX] = &LDOA3_CORNER_mx, - [MSM8939_VDDMX_AO] = &LDOA3_CORNER_mx_ao, + [MSM8939_VDDMDCX] = &md_s1a_corner, + [MSM8939_VDDMDCX_AO] = &md_s1a_corner_ao, + [MSM8939_VDDMDCX_VFC] = &md_s1a_vfc, + [MSM8939_VDDCX] = &cx_s2a_corner, + [MSM8939_VDDCX_AO] = &cx_s2a_corner_ao, + [MSM8939_VDDCX_VFC] = &cx_s2a_vfc, + [MSM8939_VDDMX] = &mx_l3a_corner, + [MSM8939_VDDMX_AO] = &mx_l3a_corner_ao, }; static const struct rpmpd_desc msm8939_desc = { @@ -558,11 +558,11 @@ static const struct rpmpd_desc msm8939_desc = { /* msm8916 RPM Power Domains */ static struct rpmpd *msm8916_rpmpds[] = { - [MSM8916_VDDCX] = &SMPA1_CORNER_cx, - [MSM8916_VDDCX_AO] = &SMPA1_CORNER_cx_ao, - [MSM8916_VDDCX_VFC] = &SMPA1_cx_vfc, - [MSM8916_VDDMX] = &LDOA3_CORNER_mx, - [MSM8916_VDDMX_AO] = &LDOA3_CORNER_mx_ao, + [MSM8916_VDDCX] = &cx_s1a_corner, + [MSM8916_VDDCX_AO] = &cx_s1a_corner_ao, + [MSM8916_VDDCX_VFC] = &cx_s1a_vfc, + [MSM8916_VDDMX] = &mx_l3a_corner, + [MSM8916_VDDMX_AO] = &mx_l3a_corner_ao, }; static const struct rpmpd_desc msm8916_desc = { @@ -573,13 +573,13 @@ static const struct rpmpd_desc msm8916_desc = { /* msm8953 RPM Power Domains */ static struct rpmpd *msm8953_rpmpds[] = { - [MSM8953_VDDMD] = &SMPA1_LEVEL_md, - [MSM8953_VDDMD_AO] = &SMPA1_LEVEL_md_ao, - [MSM8953_VDDCX] = &SMPA2_LEVEL_cx, - [MSM8953_VDDCX_AO] = &SMPA2_LEVEL_cx_ao, - [MSM8953_VDDCX_VFL] = &SMPA2_cx_vfl, - [MSM8953_VDDMX] = &SMPA7_LEVEL_mx, - [MSM8953_VDDMX_AO] = &SMPA7_LEVEL_mx_ao, + [MSM8953_VDDMD] = &md_s1a_lvl, + [MSM8953_VDDMD_AO] = &md_s1a_lvl_ao, + [MSM8953_VDDCX] = &cx_s2a_lvl, + [MSM8953_VDDCX_AO] = &cx_s2a_lvl_ao, + [MSM8953_VDDCX_VFL] = &cx_s2a_vfl, + [MSM8953_VDDMX] = &mx_s7a_lvl, + [MSM8953_VDDMX_AO] = &mx_s7a_lvl_ao, }; static const struct rpmpd_desc msm8953_desc = { @@ -590,12 +590,12 @@ static const struct rpmpd_desc msm8953_desc = { /* msm8976 RPM Power Domains */ static struct rpmpd *msm8976_rpmpds[] = { - [MSM8976_VDDCX] = &SMPA2_LEVEL_cx, - [MSM8976_VDDCX_AO] = &SMPA2_LEVEL_cx_ao, - [MSM8976_VDDCX_VFL] = &RWSC2_cx_vfl, - [MSM8976_VDDMX] = &SMPA6_LEVEL_mx, - [MSM8976_VDDMX_AO] = &SMPA6_LEVEL_mx_ao, - [MSM8976_VDDMX_VFL] = &RWSM6_mx_vfl, + [MSM8976_VDDCX] = &cx_s2a_lvl, + [MSM8976_VDDCX_AO] = &cx_s2a_lvl_ao, + [MSM8976_VDDCX_VFL] = &cx_rwsc2_vfl, + [MSM8976_VDDMX] = &mx_s6a_lvl, + [MSM8976_VDDMX_AO] = &mx_s6a_lvl_ao, + [MSM8976_VDDMX_VFL] = &mx_rwsm6_vfl, }; static const struct rpmpd_desc msm8976_desc = { @@ -606,15 +606,15 @@ static const struct rpmpd_desc msm8976_desc = { /* msm8994 RPM Power domains */ static struct rpmpd *msm8994_rpmpds[] = { - [MSM8994_VDDCX] = &SMPA1_CORNER_cx, - [MSM8994_VDDCX_AO] = &SMPA1_CORNER_cx_ao, - [MSM8994_VDDCX_VFC] = &SMPA1_cx_vfc, - [MSM8994_VDDMX] = &SMPA2_CORNER_mx, - [MSM8994_VDDMX_AO] = &SMPA2_CORNER_mx_ao, + [MSM8994_VDDCX] = &cx_s1a_corner, + [MSM8994_VDDCX_AO] = &cx_s1a_corner_ao, + [MSM8994_VDDCX_VFC] = &cx_s1a_vfc, + [MSM8994_VDDMX] = &mx_s2a_corner, + [MSM8994_VDDMX_AO] = &mx_s2a_corner_ao, /* Attention! *Some* 8994 boards with pm8004 may use SMPC here! */ - [MSM8994_VDDGFX] = &SMPB2_gfx_corner, - [MSM8994_VDDGFX_VFC] = &SMPB2_gfx_vfc, + [MSM8994_VDDGFX] = &gfx_s2b_corner, + [MSM8994_VDDGFX_VFC] = &gfx_s2b_vfc, }; static const struct rpmpd_desc msm8994_desc = { @@ -625,13 +625,13 @@ static const struct rpmpd_desc msm8994_desc = { /* msm8996 RPM Power domains */ static struct rpmpd *msm8996_rpmpds[] = { - [MSM8996_VDDCX] = &SMPA1_CORNER_cx, - [MSM8996_VDDCX_AO] = &SMPA1_CORNER_cx_ao, - [MSM8996_VDDCX_VFC] = &SMPA1_cx_vfc, - [MSM8996_VDDMX] = &SMPA2_CORNER_mx, - [MSM8996_VDDMX_AO] = &SMPA2_CORNER_mx_ao, - [MSM8996_VDDSSCX] = &LDOA26_sscx_corner, - [MSM8996_VDDSSCX_VFC] = &LDOA26_sscx_vfc, + [MSM8996_VDDCX] = &cx_s1a_corner, + [MSM8996_VDDCX_AO] = &cx_s1a_corner_ao, + [MSM8996_VDDCX_VFC] = &cx_s1a_vfc, + [MSM8996_VDDMX] = &mx_s2a_corner, + [MSM8996_VDDMX_AO] = &mx_s2a_corner_ao, + [MSM8996_VDDSSCX] = &ssc_cx_l26a_corner, + [MSM8996_VDDSSCX_VFC] = &ssc_cx_l26a_vfc, }; static const struct rpmpd_desc msm8996_desc = { @@ -642,16 +642,16 @@ static const struct rpmpd_desc msm8996_desc = { /* msm8998 RPM Power domains */ static struct rpmpd *msm8998_rpmpds[] = { - [MSM8998_VDDCX] = &RWCX0_LEVEL_cx, - [MSM8998_VDDCX_AO] = &RWCX0_LEVEL_cx_ao, - [MSM8998_VDDCX_VFL] = &RWCX0_cx_vfl, - [MSM8998_VDDMX] = &RWMX0_LEVEL_mx, - [MSM8998_VDDMX_AO] = &RWMX0_LEVEL_mx_ao, - [MSM8998_VDDMX_VFL] = &RWMX0_mx_vfl, - [MSM8998_SSCCX] = &RWSC0_ssccx_lvl, - [MSM8998_SSCCX_VFL] = &RWSC0_ssccx_vfl, - [MSM8998_SSCMX] = &RWSM0_sscmx_lvl, - [MSM8998_SSCMX_VFL] = &RWSM0_sscmx_vfl, + [MSM8998_VDDCX] = &cx_rwcx0_lvl, + [MSM8998_VDDCX_AO] = &cx_rwcx0_lvl_ao, + [MSM8998_VDDCX_VFL] = &cx_rwcx0_vfl, + [MSM8998_VDDMX] = &mx_rwmx0_lvl, + [MSM8998_VDDMX_AO] = &mx_rwmx0_lvl_ao, + [MSM8998_VDDMX_VFL] = &mx_rwmx0_vfl, + [MSM8998_SSCCX] = &ssc_cx_rwsc0_lvl, + [MSM8998_SSCCX_VFL] = &ssc_cx_rwsc0_vfl, + [MSM8998_SSCMX] = &ssc_mx_rwsm0_lvl, + [MSM8998_SSCMX_VFL] = &ssc_mx_rwsm0_vfl, }; static const struct rpmpd_desc msm8998_desc = { @@ -662,13 +662,13 @@ static const struct rpmpd_desc msm8998_desc = { /* qcs404 RPM Power domains */ static struct rpmpd *qcs404_rpmpds[] = { - [QCS404_VDDMX] = &RWMX0_LEVEL_mx, - [QCS404_VDDMX_AO] = &RWMX0_LEVEL_mx_ao, - [QCS404_VDDMX_VFL] = &RWMX0_mx_vfl, - [QCS404_LPICX] = &RWLC0_lpi_cx_lvl, - [QCS404_LPICX_VFL] = &RWLC0_lpicx_vfl, - [QCS404_LPIMX] = &RWLM0_lpi_mx_lvl, - [QCS404_LPIMX_VFL] = &RWLM0_lpimx_vfl, + [QCS404_VDDMX] = &mx_rwmx0_lvl, + [QCS404_VDDMX_AO] = &mx_rwmx0_lvl_ao, + [QCS404_VDDMX_VFL] = &mx_rwmx0_vfl, + [QCS404_LPICX] = &lpi_cx_rwlc0_lvl, + [QCS404_LPICX_VFL] = &lpi_cx_rwlc0_vfl, + [QCS404_LPIMX] = &lpi_mx_rwlm0_lvl, + [QCS404_LPIMX_VFL] = &lpi_mx_rwlm0_vfl, }; static const struct rpmpd_desc qcs404_desc = { @@ -679,16 +679,16 @@ static const struct rpmpd_desc qcs404_desc = { /* sdm660 RPM Power domains */ static struct rpmpd *sdm660_rpmpds[] = { - [SDM660_VDDCX] = &RWCX0_LEVEL_cx, - [SDM660_VDDCX_AO] = &RWCX0_LEVEL_cx_ao, - [SDM660_VDDCX_VFL] = &RWCX0_cx_vfl, - [SDM660_VDDMX] = &RWMX0_LEVEL_mx, - [SDM660_VDDMX_AO] = &RWMX0_LEVEL_mx_ao, - [SDM660_VDDMX_VFL] = &RWMX0_mx_vfl, - [SDM660_SSCCX] = &RWLC0_ssccx_lvl, - [SDM660_SSCCX_VFL] = &RWLC0_ssccx_vfl, - [SDM660_SSCMX] = &RWLM0_sscmx_lvl, - [SDM660_SSCMX_VFL] = &RWLM0_sscmx_vfl, + [SDM660_VDDCX] = &cx_rwcx0_lvl, + [SDM660_VDDCX_AO] = &cx_rwcx0_lvl_ao, + [SDM660_VDDCX_VFL] = &cx_rwcx0_vfl, + [SDM660_VDDMX] = &mx_rwmx0_lvl, + [SDM660_VDDMX_AO] = &mx_rwmx0_lvl_ao, + [SDM660_VDDMX_VFL] = &mx_rwmx0_vfl, + [SDM660_SSCCX] = &ssc_cx_rwlc0_lvl, + [SDM660_SSCCX_VFL] = &ssc_cx_rwlc0_vfl, + [SDM660_SSCMX] = &ssc_mx_rwlm0_lvl, + [SDM660_SSCMX_VFL] = &ssc_mx_rwlm0_vfl, }; static const struct rpmpd_desc sdm660_desc = { @@ -699,14 +699,14 @@ static const struct rpmpd_desc sdm660_desc = { /* sm4250/6115 RPM Power domains */ static struct rpmpd *sm6115_rpmpds[] = { - [SM6115_VDDCX] = &RWCX0_LEVEL_cx, - [SM6115_VDDCX_AO] = &RWCX0_LEVEL_cx_ao, - [SM6115_VDDCX_VFL] = &RWCX0_cx_vfl, - [SM6115_VDDMX] = &RWMX0_LEVEL_mx, - [SM6115_VDDMX_AO] = &RWMX0_LEVEL_mx_ao, - [SM6115_VDDMX_VFL] = &RWMX0_mx_vfl, - [SM6115_VDD_LPI_CX] = &RWLC0_lpi_cx_lvl, - [SM6115_VDD_LPI_MX] = &RWLM0_lpi_mx_lvl, + [SM6115_VDDCX] = &cx_rwcx0_lvl, + [SM6115_VDDCX_AO] = &cx_rwcx0_lvl_ao, + [SM6115_VDDCX_VFL] = &cx_rwcx0_vfl, + [SM6115_VDDMX] = &mx_rwmx0_lvl, + [SM6115_VDDMX_AO] = &mx_rwmx0_lvl_ao, + [SM6115_VDDMX_VFL] = &mx_rwmx0_vfl, + [SM6115_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl, + [SM6115_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl, }; static const struct rpmpd_desc sm6115_desc = { @@ -717,12 +717,12 @@ static const struct rpmpd_desc sm6115_desc = { /* sm6125 RPM Power domains */ static struct rpmpd *sm6125_rpmpds[] = { - [SM6125_VDDCX] = &RWCX0_LEVEL_cx, - [SM6125_VDDCX_AO] = &RWCX0_LEVEL_cx_ao, - [SM6125_VDDCX_VFL] = &RWCX0_cx_vfl, - [SM6125_VDDMX] = &RWMX0_LEVEL_mx, - [SM6125_VDDMX_AO] = &RWMX0_LEVEL_mx_ao, - [SM6125_VDDMX_VFL] = &RWMX0_mx_vfl, + [SM6125_VDDCX] = &cx_rwcx0_lvl, + [SM6125_VDDCX_AO] = &cx_rwcx0_lvl_ao, + [SM6125_VDDCX_VFL] = &cx_rwcx0_vfl, + [SM6125_VDDMX] = &mx_rwmx0_lvl, + [SM6125_VDDMX_AO] = &mx_rwmx0_lvl_ao, + [SM6125_VDDMX_VFL] = &mx_rwmx0_vfl, }; static const struct rpmpd_desc sm6125_desc = { @@ -732,16 +732,16 @@ static const struct rpmpd_desc sm6125_desc = { }; static struct rpmpd *sm6375_rpmpds[] = { - [SM6375_VDDCX] = &RWCX0_LEVEL_cx, - [SM6375_VDDCX_AO] = &RWCX0_LEVEL_cx_ao, - [SM6375_VDDCX_VFL] = &RWCX0_cx_vfl, - [SM6375_VDDMX] = &RWMX0_LEVEL_mx, - [SM6375_VDDMX_AO] = &RWMX0_LEVEL_mx_ao, - [SM6375_VDDMX_VFL] = &RWMX0_mx_vfl, - [SM6375_VDDGX] = &RWGX0_LEVEL_gx, - [SM6375_VDDGX_AO] = &RWGX0_LEVEL_gx_ao, - [SM6375_VDD_LPI_CX] = &RWLC0_lpi_cx_lvl, - [SM6375_VDD_LPI_MX] = &RWLM0_lpi_mx_lvl, + [SM6375_VDDCX] = &cx_rwcx0_lvl, + [SM6375_VDDCX_AO] = &cx_rwcx0_lvl_ao, + [SM6375_VDDCX_VFL] = &cx_rwcx0_vfl, + [SM6375_VDDMX] = &mx_rwmx0_lvl, + [SM6375_VDDMX_AO] = &mx_rwmx0_lvl_ao, + [SM6375_VDDMX_VFL] = &mx_rwmx0_vfl, + [SM6375_VDDGX] = &gx_rwgx0_lvl, + [SM6375_VDDGX_AO] = &gx_rwgx0_lvl_ao, + [SM6375_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl, + [SM6375_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl, }; static const struct rpmpd_desc sm6375_desc = { @@ -751,14 +751,14 @@ static const struct rpmpd_desc sm6375_desc = { }; static struct rpmpd *qcm2290_rpmpds[] = { - [QCM2290_VDDCX] = &RWCX0_LEVEL_cx, - [QCM2290_VDDCX_AO] = &RWCX0_LEVEL_cx_ao, - [QCM2290_VDDCX_VFL] = &RWCX0_cx_vfl, - [QCM2290_VDDMX] = &RWMX0_LEVEL_mx, - [QCM2290_VDDMX_AO] = &RWMX0_LEVEL_mx_ao, - [QCM2290_VDDMX_VFL] = &RWMX0_mx_vfl, - [QCM2290_VDD_LPI_CX] = &RWLC0_lpi_cx_lvl, - [QCM2290_VDD_LPI_MX] = &RWLM0_lpi_mx_lvl, + [QCM2290_VDDCX] = &cx_rwcx0_lvl, + [QCM2290_VDDCX_AO] = &cx_rwcx0_lvl_ao, + [QCM2290_VDDCX_VFL] = &cx_rwcx0_vfl, + [QCM2290_VDDMX] = &mx_rwmx0_lvl, + [QCM2290_VDDMX_AO] = &mx_rwmx0_lvl_ao, + [QCM2290_VDDMX_VFL] = &mx_rwmx0_vfl, + [QCM2290_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl, + [QCM2290_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl, }; static const struct rpmpd_desc qcm2290_desc = { -- cgit v1.2.3 From d338fe40cf37c3f326b5cb743c6436369d452094 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 13 Mar 2023 21:00:05 +0100 Subject: soc: qcom: rpmpd: Make bindings assignments consistent Currently the whitespace between [DT_BINDING] = &struct is all over the place.. some SoC structs have a space, others have a tab, others have N tabs.. Make that a single tab for everybody to keep things coherent. Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-7-06a4f448ff90@linaro.org --- drivers/soc/qcom/rpmpd.c | 118 +++++++++++++++++++++++------------------------ 1 file changed, 59 insertions(+), 59 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c index 695b2fc56f40..946630d82b3d 100644 --- a/drivers/soc/qcom/rpmpd.c +++ b/drivers/soc/qcom/rpmpd.c @@ -642,16 +642,16 @@ static const struct rpmpd_desc msm8996_desc = { /* msm8998 RPM Power domains */ static struct rpmpd *msm8998_rpmpds[] = { - [MSM8998_VDDCX] = &cx_rwcx0_lvl, - [MSM8998_VDDCX_AO] = &cx_rwcx0_lvl_ao, - [MSM8998_VDDCX_VFL] = &cx_rwcx0_vfl, - [MSM8998_VDDMX] = &mx_rwmx0_lvl, - [MSM8998_VDDMX_AO] = &mx_rwmx0_lvl_ao, - [MSM8998_VDDMX_VFL] = &mx_rwmx0_vfl, - [MSM8998_SSCCX] = &ssc_cx_rwsc0_lvl, - [MSM8998_SSCCX_VFL] = &ssc_cx_rwsc0_vfl, - [MSM8998_SSCMX] = &ssc_mx_rwsm0_lvl, - [MSM8998_SSCMX_VFL] = &ssc_mx_rwsm0_vfl, + [MSM8998_VDDCX] = &cx_rwcx0_lvl, + [MSM8998_VDDCX_AO] = &cx_rwcx0_lvl_ao, + [MSM8998_VDDCX_VFL] = &cx_rwcx0_vfl, + [MSM8998_VDDMX] = &mx_rwmx0_lvl, + [MSM8998_VDDMX_AO] = &mx_rwmx0_lvl_ao, + [MSM8998_VDDMX_VFL] = &mx_rwmx0_vfl, + [MSM8998_SSCCX] = &ssc_cx_rwsc0_lvl, + [MSM8998_SSCCX_VFL] = &ssc_cx_rwsc0_vfl, + [MSM8998_SSCMX] = &ssc_mx_rwsm0_lvl, + [MSM8998_SSCMX_VFL] = &ssc_mx_rwsm0_vfl, }; static const struct rpmpd_desc msm8998_desc = { @@ -662,13 +662,13 @@ static const struct rpmpd_desc msm8998_desc = { /* qcs404 RPM Power domains */ static struct rpmpd *qcs404_rpmpds[] = { - [QCS404_VDDMX] = &mx_rwmx0_lvl, - [QCS404_VDDMX_AO] = &mx_rwmx0_lvl_ao, - [QCS404_VDDMX_VFL] = &mx_rwmx0_vfl, - [QCS404_LPICX] = &lpi_cx_rwlc0_lvl, - [QCS404_LPICX_VFL] = &lpi_cx_rwlc0_vfl, - [QCS404_LPIMX] = &lpi_mx_rwlm0_lvl, - [QCS404_LPIMX_VFL] = &lpi_mx_rwlm0_vfl, + [QCS404_VDDMX] = &mx_rwmx0_lvl, + [QCS404_VDDMX_AO] = &mx_rwmx0_lvl_ao, + [QCS404_VDDMX_VFL] = &mx_rwmx0_vfl, + [QCS404_LPICX] = &lpi_cx_rwlc0_lvl, + [QCS404_LPICX_VFL] = &lpi_cx_rwlc0_vfl, + [QCS404_LPIMX] = &lpi_mx_rwlm0_lvl, + [QCS404_LPIMX_VFL] = &lpi_mx_rwlm0_vfl, }; static const struct rpmpd_desc qcs404_desc = { @@ -679,16 +679,16 @@ static const struct rpmpd_desc qcs404_desc = { /* sdm660 RPM Power domains */ static struct rpmpd *sdm660_rpmpds[] = { - [SDM660_VDDCX] = &cx_rwcx0_lvl, - [SDM660_VDDCX_AO] = &cx_rwcx0_lvl_ao, - [SDM660_VDDCX_VFL] = &cx_rwcx0_vfl, - [SDM660_VDDMX] = &mx_rwmx0_lvl, - [SDM660_VDDMX_AO] = &mx_rwmx0_lvl_ao, - [SDM660_VDDMX_VFL] = &mx_rwmx0_vfl, - [SDM660_SSCCX] = &ssc_cx_rwlc0_lvl, - [SDM660_SSCCX_VFL] = &ssc_cx_rwlc0_vfl, - [SDM660_SSCMX] = &ssc_mx_rwlm0_lvl, - [SDM660_SSCMX_VFL] = &ssc_mx_rwlm0_vfl, + [SDM660_VDDCX] = &cx_rwcx0_lvl, + [SDM660_VDDCX_AO] = &cx_rwcx0_lvl_ao, + [SDM660_VDDCX_VFL] = &cx_rwcx0_vfl, + [SDM660_VDDMX] = &mx_rwmx0_lvl, + [SDM660_VDDMX_AO] = &mx_rwmx0_lvl_ao, + [SDM660_VDDMX_VFL] = &mx_rwmx0_vfl, + [SDM660_SSCCX] = &ssc_cx_rwlc0_lvl, + [SDM660_SSCCX_VFL] = &ssc_cx_rwlc0_vfl, + [SDM660_SSCMX] = &ssc_mx_rwlm0_lvl, + [SDM660_SSCMX_VFL] = &ssc_mx_rwlm0_vfl, }; static const struct rpmpd_desc sdm660_desc = { @@ -699,14 +699,14 @@ static const struct rpmpd_desc sdm660_desc = { /* sm4250/6115 RPM Power domains */ static struct rpmpd *sm6115_rpmpds[] = { - [SM6115_VDDCX] = &cx_rwcx0_lvl, - [SM6115_VDDCX_AO] = &cx_rwcx0_lvl_ao, - [SM6115_VDDCX_VFL] = &cx_rwcx0_vfl, - [SM6115_VDDMX] = &mx_rwmx0_lvl, - [SM6115_VDDMX_AO] = &mx_rwmx0_lvl_ao, - [SM6115_VDDMX_VFL] = &mx_rwmx0_vfl, - [SM6115_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl, - [SM6115_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl, + [SM6115_VDDCX] = &cx_rwcx0_lvl, + [SM6115_VDDCX_AO] = &cx_rwcx0_lvl_ao, + [SM6115_VDDCX_VFL] = &cx_rwcx0_vfl, + [SM6115_VDDMX] = &mx_rwmx0_lvl, + [SM6115_VDDMX_AO] = &mx_rwmx0_lvl_ao, + [SM6115_VDDMX_VFL] = &mx_rwmx0_vfl, + [SM6115_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl, + [SM6115_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl, }; static const struct rpmpd_desc sm6115_desc = { @@ -717,12 +717,12 @@ static const struct rpmpd_desc sm6115_desc = { /* sm6125 RPM Power domains */ static struct rpmpd *sm6125_rpmpds[] = { - [SM6125_VDDCX] = &cx_rwcx0_lvl, - [SM6125_VDDCX_AO] = &cx_rwcx0_lvl_ao, - [SM6125_VDDCX_VFL] = &cx_rwcx0_vfl, - [SM6125_VDDMX] = &mx_rwmx0_lvl, - [SM6125_VDDMX_AO] = &mx_rwmx0_lvl_ao, - [SM6125_VDDMX_VFL] = &mx_rwmx0_vfl, + [SM6125_VDDCX] = &cx_rwcx0_lvl, + [SM6125_VDDCX_AO] = &cx_rwcx0_lvl_ao, + [SM6125_VDDCX_VFL] = &cx_rwcx0_vfl, + [SM6125_VDDMX] = &mx_rwmx0_lvl, + [SM6125_VDDMX_AO] = &mx_rwmx0_lvl_ao, + [SM6125_VDDMX_VFL] = &mx_rwmx0_vfl, }; static const struct rpmpd_desc sm6125_desc = { @@ -732,16 +732,16 @@ static const struct rpmpd_desc sm6125_desc = { }; static struct rpmpd *sm6375_rpmpds[] = { - [SM6375_VDDCX] = &cx_rwcx0_lvl, - [SM6375_VDDCX_AO] = &cx_rwcx0_lvl_ao, - [SM6375_VDDCX_VFL] = &cx_rwcx0_vfl, - [SM6375_VDDMX] = &mx_rwmx0_lvl, - [SM6375_VDDMX_AO] = &mx_rwmx0_lvl_ao, - [SM6375_VDDMX_VFL] = &mx_rwmx0_vfl, - [SM6375_VDDGX] = &gx_rwgx0_lvl, - [SM6375_VDDGX_AO] = &gx_rwgx0_lvl_ao, - [SM6375_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl, - [SM6375_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl, + [SM6375_VDDCX] = &cx_rwcx0_lvl, + [SM6375_VDDCX_AO] = &cx_rwcx0_lvl_ao, + [SM6375_VDDCX_VFL] = &cx_rwcx0_vfl, + [SM6375_VDDMX] = &mx_rwmx0_lvl, + [SM6375_VDDMX_AO] = &mx_rwmx0_lvl_ao, + [SM6375_VDDMX_VFL] = &mx_rwmx0_vfl, + [SM6375_VDDGX] = &gx_rwgx0_lvl, + [SM6375_VDDGX_AO] = &gx_rwgx0_lvl_ao, + [SM6375_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl, + [SM6375_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl, }; static const struct rpmpd_desc sm6375_desc = { @@ -751,14 +751,14 @@ static const struct rpmpd_desc sm6375_desc = { }; static struct rpmpd *qcm2290_rpmpds[] = { - [QCM2290_VDDCX] = &cx_rwcx0_lvl, - [QCM2290_VDDCX_AO] = &cx_rwcx0_lvl_ao, - [QCM2290_VDDCX_VFL] = &cx_rwcx0_vfl, - [QCM2290_VDDMX] = &mx_rwmx0_lvl, - [QCM2290_VDDMX_AO] = &mx_rwmx0_lvl_ao, - [QCM2290_VDDMX_VFL] = &mx_rwmx0_vfl, - [QCM2290_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl, - [QCM2290_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl, + [QCM2290_VDDCX] = &cx_rwcx0_lvl, + [QCM2290_VDDCX_AO] = &cx_rwcx0_lvl_ao, + [QCM2290_VDDCX_VFL] = &cx_rwcx0_vfl, + [QCM2290_VDDMX] = &mx_rwmx0_lvl, + [QCM2290_VDDMX_AO] = &mx_rwmx0_lvl_ao, + [QCM2290_VDDMX_VFL] = &mx_rwmx0_vfl, + [QCM2290_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl, + [QCM2290_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl, }; static const struct rpmpd_desc qcm2290_desc = { -- cgit v1.2.3 From decd6e77e02eff517efe11dfc181ce1b5bef3405 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 13 Mar 2023 21:00:06 +0100 Subject: soc: qcom: rpmpd: Add parent PD support In some cases (like with the GPU core clock on GMU-less SoCs) it's required that we scale more than one voltage domain. This can be achieved by linking them in a parent-child relationship. Add support for specifying a parent PD, similarly to what has been done in the RPMhPD driver. Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-8-06a4f448ff90@linaro.org --- drivers/soc/qcom/rpmpd.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'drivers') diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c index 946630d82b3d..2027c820caa7 100644 --- a/drivers/soc/qcom/rpmpd.c +++ b/drivers/soc/qcom/rpmpd.c @@ -48,6 +48,7 @@ struct rpmpd_req { struct rpmpd { struct generic_pm_domain pd; + struct generic_pm_domain *parent; struct rpmpd *peer; const bool active_only; unsigned int corner; @@ -969,6 +970,15 @@ static int rpmpd_probe(struct platform_device *pdev) data->domains[i] = &rpmpds[i]->pd; } + /* Add subdomains */ + for (i = 0; i < num; i++) { + if (!rpmpds[i]) + continue; + + if (rpmpds[i]->parent) + pm_genpd_add_subdomain(rpmpds[i]->parent, &rpmpds[i]->pd); + } + return of_genpd_add_provider_onecell(pdev->dev.of_node, data); } -- cgit v1.2.3 From ec90637c9946cc8e37afa4c1feb33fdb1fa15b68 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 13 Mar 2023 21:00:07 +0100 Subject: soc: qcom: rpmpd: Hook up VDDMX as parent of SM6375 VDDGX The GPU core clock requires that both VDDGX and VDDMX domains are scaled at the same rate at the same time (well, MX just before GX but you get the idea). Set MX as parent of GX to take care of that. Suggested-by: Bjorn Andersson Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-9-06a4f448ff90@linaro.org --- drivers/soc/qcom/rpmpd.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers') diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c index 2027c820caa7..84283719853c 100644 --- a/drivers/soc/qcom/rpmpd.c +++ b/drivers/soc/qcom/rpmpd.c @@ -216,18 +216,22 @@ static struct rpmpd gfx_s2b_vfc = { .key = KEY_FLOOR_CORNER, }; +static struct rpmpd mx_rwmx0_lvl; static struct rpmpd gx_rwgx0_lvl_ao; static struct rpmpd gx_rwgx0_lvl = { .pd = { .name = "gx", }, .peer = &gx_rwgx0_lvl_ao, .res_type = RPMPD_RWGX, + .parent = &mx_rwmx0_lvl.pd, .res_id = 0, .key = KEY_LEVEL, }; +static struct rpmpd mx_rwmx0_lvl_ao; static struct rpmpd gx_rwgx0_lvl_ao = { .pd = { .name = "gx_ao", }, .peer = &gx_rwgx0_lvl, + .parent = &mx_rwmx0_lvl_ao.pd, .active_only = true, .res_type = RPMPD_RWGX, .res_id = 0, -- cgit v1.2.3 From e556c94e8c20bcfb6c910e93a0cfd2d0cce5adc8 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 13 Mar 2023 21:00:08 +0100 Subject: soc: qcom: rpmpd: Remove useless comments It goes without saying that socname_rpmpds[] is the array of the RPM power domains associated with socname. Remove these comments. Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-10-06a4f448ff90@linaro.org --- drivers/soc/qcom/rpmpd.c | 13 ------------- 1 file changed, 13 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c index 84283719853c..f8397dcb146c 100644 --- a/drivers/soc/qcom/rpmpd.c +++ b/drivers/soc/qcom/rpmpd.c @@ -514,7 +514,6 @@ static struct rpmpd ssc_mx_rwsm0_vfl = { .key = KEY_FLOOR_LEVEL, }; -/* mdm9607 RPM Power Domains */ static struct rpmpd *mdm9607_rpmpds[] = { [MDM9607_VDDCX] = &cx_s3a_lvl, [MDM9607_VDDCX_AO] = &cx_s3a_lvl_ao, @@ -530,7 +529,6 @@ static const struct rpmpd_desc mdm9607_desc = { .max_state = RPM_SMD_LEVEL_TURBO, }; -/* msm8226 RPM Power Domains */ static struct rpmpd *msm8226_rpmpds[] = { [MSM8226_VDDCX] = &cx_s1a_corner, [MSM8226_VDDCX_AO] = &cx_s1a_corner_ao, @@ -543,7 +541,6 @@ static const struct rpmpd_desc msm8226_desc = { .max_state = MAX_CORNER_RPMPD_STATE, }; -/* msm8939 RPM Power Domains */ static struct rpmpd *msm8939_rpmpds[] = { [MSM8939_VDDMDCX] = &md_s1a_corner, [MSM8939_VDDMDCX_AO] = &md_s1a_corner_ao, @@ -561,7 +558,6 @@ static const struct rpmpd_desc msm8939_desc = { .max_state = MAX_CORNER_RPMPD_STATE, }; -/* msm8916 RPM Power Domains */ static struct rpmpd *msm8916_rpmpds[] = { [MSM8916_VDDCX] = &cx_s1a_corner, [MSM8916_VDDCX_AO] = &cx_s1a_corner_ao, @@ -576,7 +572,6 @@ static const struct rpmpd_desc msm8916_desc = { .max_state = MAX_CORNER_RPMPD_STATE, }; -/* msm8953 RPM Power Domains */ static struct rpmpd *msm8953_rpmpds[] = { [MSM8953_VDDMD] = &md_s1a_lvl, [MSM8953_VDDMD_AO] = &md_s1a_lvl_ao, @@ -593,7 +588,6 @@ static const struct rpmpd_desc msm8953_desc = { .max_state = RPM_SMD_LEVEL_TURBO, }; -/* msm8976 RPM Power Domains */ static struct rpmpd *msm8976_rpmpds[] = { [MSM8976_VDDCX] = &cx_s2a_lvl, [MSM8976_VDDCX_AO] = &cx_s2a_lvl_ao, @@ -609,7 +603,6 @@ static const struct rpmpd_desc msm8976_desc = { .max_state = RPM_SMD_LEVEL_TURBO_HIGH, }; -/* msm8994 RPM Power domains */ static struct rpmpd *msm8994_rpmpds[] = { [MSM8994_VDDCX] = &cx_s1a_corner, [MSM8994_VDDCX_AO] = &cx_s1a_corner_ao, @@ -628,7 +621,6 @@ static const struct rpmpd_desc msm8994_desc = { .max_state = MAX_CORNER_RPMPD_STATE, }; -/* msm8996 RPM Power domains */ static struct rpmpd *msm8996_rpmpds[] = { [MSM8996_VDDCX] = &cx_s1a_corner, [MSM8996_VDDCX_AO] = &cx_s1a_corner_ao, @@ -645,7 +637,6 @@ static const struct rpmpd_desc msm8996_desc = { .max_state = MAX_CORNER_RPMPD_STATE, }; -/* msm8998 RPM Power domains */ static struct rpmpd *msm8998_rpmpds[] = { [MSM8998_VDDCX] = &cx_rwcx0_lvl, [MSM8998_VDDCX_AO] = &cx_rwcx0_lvl_ao, @@ -665,7 +656,6 @@ static const struct rpmpd_desc msm8998_desc = { .max_state = RPM_SMD_LEVEL_BINNING, }; -/* qcs404 RPM Power domains */ static struct rpmpd *qcs404_rpmpds[] = { [QCS404_VDDMX] = &mx_rwmx0_lvl, [QCS404_VDDMX_AO] = &mx_rwmx0_lvl_ao, @@ -682,7 +672,6 @@ static const struct rpmpd_desc qcs404_desc = { .max_state = RPM_SMD_LEVEL_BINNING, }; -/* sdm660 RPM Power domains */ static struct rpmpd *sdm660_rpmpds[] = { [SDM660_VDDCX] = &cx_rwcx0_lvl, [SDM660_VDDCX_AO] = &cx_rwcx0_lvl_ao, @@ -702,7 +691,6 @@ static const struct rpmpd_desc sdm660_desc = { .max_state = RPM_SMD_LEVEL_TURBO, }; -/* sm4250/6115 RPM Power domains */ static struct rpmpd *sm6115_rpmpds[] = { [SM6115_VDDCX] = &cx_rwcx0_lvl, [SM6115_VDDCX_AO] = &cx_rwcx0_lvl_ao, @@ -720,7 +708,6 @@ static const struct rpmpd_desc sm6115_desc = { .max_state = RPM_SMD_LEVEL_TURBO_NO_CPR, }; -/* sm6125 RPM Power domains */ static struct rpmpd *sm6125_rpmpds[] = { [SM6125_VDDCX] = &cx_rwcx0_lvl, [SM6125_VDDCX_AO] = &cx_rwcx0_lvl_ao, -- cgit v1.2.3 From 968a26a07f75377afbd4f7bb18ef587a1443c244 Mon Sep 17 00:00:00 2001 From: Elliot Berman Date: Mon, 13 Feb 2023 10:18:29 -0800 Subject: firmware: qcom_scm: Use fixed width src vm bitmap The maximum VMID for assign_mem is 63. Use a u64 to represent this bitmap instead of architecture-dependent "unsigned int" which varies in size on 32-bit and 64-bit platforms. Acked-by: Kalle Valo (ath10k) Tested-by: Gokul krishna Krishnakumar Signed-off-by: Elliot Berman Reviewed-by: Bjorn Andersson Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230213181832.3489174-1-quic_eberman@quicinc.com --- drivers/firmware/qcom_scm.c | 12 +++++++----- drivers/misc/fastrpc.c | 2 +- drivers/net/wireless/ath/ath10k/qmi.c | 4 ++-- drivers/remoteproc/qcom_q6v5_mss.c | 8 ++++---- drivers/remoteproc/qcom_q6v5_pas.c | 2 +- drivers/soc/qcom/rmtfs_mem.c | 2 +- include/linux/firmware/qcom/qcom_scm.h | 2 +- 7 files changed, 17 insertions(+), 15 deletions(-) (limited to 'drivers') diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 468d4d5ab550..b95616b35bff 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -905,7 +905,7 @@ static int __qcom_scm_assign_mem(struct device *dev, phys_addr_t mem_region, * Return negative errno on failure or 0 on success with @srcvm updated. */ int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz, - unsigned int *srcvm, + u64 *srcvm, const struct qcom_scm_vmperm *newvm, unsigned int dest_cnt) { @@ -922,9 +922,9 @@ int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz, __le32 *src; void *ptr; int ret, i, b; - unsigned long srcvm_bits = *srcvm; + u64 srcvm_bits = *srcvm; - src_sz = hweight_long(srcvm_bits) * sizeof(*src); + src_sz = hweight64(srcvm_bits) * sizeof(*src); mem_to_map_sz = sizeof(*mem_to_map); dest_sz = dest_cnt * sizeof(*destvm); ptr_sz = ALIGN(src_sz, SZ_64) + ALIGN(mem_to_map_sz, SZ_64) + @@ -937,8 +937,10 @@ int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz, /* Fill source vmid detail */ src = ptr; i = 0; - for_each_set_bit(b, &srcvm_bits, BITS_PER_LONG) - src[i++] = cpu_to_le32(b); + for (b = 0; b < BITS_PER_TYPE(u64); b++) { + if (srcvm_bits & BIT(b)) + src[i++] = cpu_to_le32(b); + } /* Fill details of mem buff to map */ mem_to_map = ptr + ALIGN(src_sz, SZ_64); diff --git a/drivers/misc/fastrpc.c b/drivers/misc/fastrpc.c index a701132638cf..f48466960f1b 100644 --- a/drivers/misc/fastrpc.c +++ b/drivers/misc/fastrpc.c @@ -262,7 +262,7 @@ struct fastrpc_channel_ctx { int domain_id; int sesscount; int vmcount; - u32 perms; + u64 perms; struct qcom_scm_vmperm vmperms[FASTRPC_MAX_VMIDS]; struct rpmsg_device *rpdev; struct fastrpc_session_ctx session[FASTRPC_MAX_SESSIONS]; diff --git a/drivers/net/wireless/ath/ath10k/qmi.c b/drivers/net/wireless/ath/ath10k/qmi.c index 90f457b8e1fe..038c5903c0dc 100644 --- a/drivers/net/wireless/ath/ath10k/qmi.c +++ b/drivers/net/wireless/ath/ath10k/qmi.c @@ -33,7 +33,7 @@ static int ath10k_qmi_map_msa_permission(struct ath10k_qmi *qmi, { struct qcom_scm_vmperm dst_perms[3]; struct ath10k *ar = qmi->ar; - unsigned int src_perms; + u64 src_perms; u32 perm_count; int ret; @@ -65,7 +65,7 @@ static int ath10k_qmi_unmap_msa_permission(struct ath10k_qmi *qmi, { struct qcom_scm_vmperm dst_perms; struct ath10k *ar = qmi->ar; - unsigned int src_perms; + u64 src_perms; int ret; src_perms = BIT(QCOM_SCM_VMID_MSS_MSA) | BIT(QCOM_SCM_VMID_WLAN); diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index ab053084f7a2..1ba711bc0100 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -235,8 +235,8 @@ struct q6v5 { bool has_qaccept_regs; bool has_ext_cntl_regs; bool has_vq6; - int mpss_perm; - int mba_perm; + u64 mpss_perm; + u64 mba_perm; const char *hexagon_mdt_image; int version; }; @@ -414,7 +414,7 @@ static void q6v5_pds_disable(struct q6v5 *qproc, struct device **pds, } } -static int q6v5_xfer_mem_ownership(struct q6v5 *qproc, int *current_perm, +static int q6v5_xfer_mem_ownership(struct q6v5 *qproc, u64 *current_perm, bool local, bool remote, phys_addr_t addr, size_t size) { @@ -967,7 +967,7 @@ static int q6v5_mpss_init_image(struct q6v5 *qproc, const struct firmware *fw, unsigned long dma_attrs = DMA_ATTR_FORCE_CONTIGUOUS; dma_addr_t phys; void *metadata; - int mdata_perm; + u64 mdata_perm; int xferop_ret; size_t size; void *ptr; diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index 0871108fb4dc..c99a20542685 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -94,7 +94,7 @@ struct qcom_adsp { size_t region_assign_size; int region_assign_idx; - int region_assign_perms; + u64 region_assign_perms; struct qcom_rproc_glink glink_subdev; struct qcom_rproc_subdev smd_subdev; diff --git a/drivers/soc/qcom/rmtfs_mem.c b/drivers/soc/qcom/rmtfs_mem.c index 2d3ee22b9249..2657c6105bb7 100644 --- a/drivers/soc/qcom/rmtfs_mem.c +++ b/drivers/soc/qcom/rmtfs_mem.c @@ -31,7 +31,7 @@ struct qcom_rmtfs_mem { unsigned int client_id; - unsigned int perms; + u64 perms; }; static ssize_t qcom_rmtfs_mem_show(struct device *dev, diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h index 1e449a5d7f5c..250ea4efb7cb 100644 --- a/include/linux/firmware/qcom/qcom_scm.h +++ b/include/linux/firmware/qcom/qcom_scm.h @@ -94,7 +94,7 @@ extern int qcom_scm_mem_protect_video_var(u32 cp_start, u32 cp_size, u32 cp_nonpixel_start, u32 cp_nonpixel_size); extern int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz, - unsigned int *src, + u64 *src, const struct qcom_scm_vmperm *newvm, unsigned int dest_cnt); -- cgit v1.2.3 From ddb705deeefc9807a5db9ef8da47a020371bfb9c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 12 Mar 2023 14:26:49 +0100 Subject: soc: renesas: mark OF related data as maybe unused MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The driver can be compile tested with !CONFIG_OF making certain data unused. With W=1: drivers/soc/renesas/renesas-soc.c:272:34: error: ‘renesas_socs’ defined but not used [-Werror=unused-const-variable=] Signed-off-by: Krzysztof Kozlowski Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230312132650.352796-1-krzysztof.kozlowski@linaro.org Signed-off-by: Geert Uytterhoeven --- drivers/soc/renesas/renesas-soc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c index a22e65916e20..ae07269f0d9c 100644 --- a/drivers/soc/renesas/renesas-soc.c +++ b/drivers/soc/renesas/renesas-soc.c @@ -269,7 +269,7 @@ static const struct renesas_soc soc_shmobile_ag5 __initconst __maybe_unused = { }; -static const struct of_device_id renesas_socs[] __initconst = { +static const struct of_device_id renesas_socs[] __initconst __maybe_unused = { #ifdef CONFIG_ARCH_R7S72100 { .compatible = "renesas,r7s72100", .data = &soc_rz_a1h }, #endif -- cgit v1.2.3 From 641a5e94dc9f61471736d6f776625348f46fb97f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 12 Mar 2023 14:26:50 +0100 Subject: soc: renesas: pwc-rzv2m: drop of_match_ptr for ID table MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The driver can match only via the DT table so the table should be always used and the of_match_ptr does not have any sense (this also allows ACPI matching via PRP0001, even though it might not be relevant here). This also fixes a !CONFIG_OF error with W=1: drivers/soc/renesas/pwc-rzv2m.c:124:34: error: ‘rzv2m_pwc_of_match’ defined but not used [-Werror=unused-const-variable=] Signed-off-by: Krzysztof Kozlowski Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230312132650.352796-2-krzysztof.kozlowski@linaro.org Signed-off-by: Geert Uytterhoeven --- drivers/soc/renesas/pwc-rzv2m.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/renesas/pwc-rzv2m.c b/drivers/soc/renesas/pwc-rzv2m.c index c83bdbdabb64..452cee8d68be 100644 --- a/drivers/soc/renesas/pwc-rzv2m.c +++ b/drivers/soc/renesas/pwc-rzv2m.c @@ -131,7 +131,7 @@ static struct platform_driver rzv2m_pwc_driver = { .probe = rzv2m_pwc_probe, .driver = { .name = "rzv2m_pwc", - .of_match_table = of_match_ptr(rzv2m_pwc_of_match), + .of_match_table = rzv2m_pwc_of_match, }, }; module_platform_driver(rzv2m_pwc_driver); -- cgit v1.2.3 From 2653d5bf1c9d123c0d8b8c1634cf54dacfcfdb52 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 13 Mar 2023 12:02:56 +0100 Subject: soc: renesas: Use "#ifdef" for single-symbol definition checks Replace "#if defined(CONFIG_)" by "#ifdef CONFIG_" for brevity. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/6026a3fe36735f0e6a0ecb037bf7c45f42aa3daf.1678705241.git.geert+renesas@glider.be --- drivers/soc/renesas/renesas-soc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c index ae07269f0d9c..4ba893e45427 100644 --- a/drivers/soc/renesas/renesas-soc.c +++ b/drivers/soc/renesas/renesas-soc.c @@ -373,20 +373,20 @@ static const struct of_device_id renesas_socs[] __initconst __maybe_unused = { #ifdef CONFIG_ARCH_R8A779G0 { .compatible = "renesas,r8a779g0", .data = &soc_rcar_v4h }, #endif -#if defined(CONFIG_ARCH_R9A07G043) +#ifdef CONFIG_ARCH_R9A07G043 #ifdef CONFIG_RISCV { .compatible = "renesas,r9a07g043", .data = &soc_rz_five }, #else { .compatible = "renesas,r9a07g043", .data = &soc_rz_g2ul }, #endif #endif -#if defined(CONFIG_ARCH_R9A07G044) +#ifdef CONFIG_ARCH_R9A07G044 { .compatible = "renesas,r9a07g044", .data = &soc_rz_g2l }, #endif -#if defined(CONFIG_ARCH_R9A07G054) +#ifdef CONFIG_ARCH_R9A07G054 { .compatible = "renesas,r9a07g054", .data = &soc_rz_v2l }, #endif -#if defined(CONFIG_ARCH_R9A09G011) +#ifdef CONFIG_ARCH_R9A09G011 { .compatible = "renesas,r9a09g011", .data = &soc_rz_v2m }, #endif #ifdef CONFIG_ARCH_SH73A0 -- cgit v1.2.3 From 781d32d1c9709fd25655c4e3e3e15370ae4ae4db Mon Sep 17 00:00:00 2001 From: Mukesh Ojha Date: Thu, 16 Mar 2023 20:44:26 +0530 Subject: firmware: qcom_scm: Clear download bit during reboot During normal restart of a system download bit should be cleared irrespective of whether download mode is set or not. Fixes: 8c1b7dc9ba22 ("firmware: qcom: scm: Expose download-mode control") Signed-off-by: Mukesh Ojha Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1678979666-551-1-git-send-email-quic_mojha@quicinc.com --- drivers/firmware/qcom_scm.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index b95616b35bff..ce76f5263aa3 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -1508,8 +1508,7 @@ static int qcom_scm_probe(struct platform_device *pdev) static void qcom_scm_shutdown(struct platform_device *pdev) { /* Clean shutdown, disable download mode to allow normal restart */ - if (download_mode) - qcom_scm_set_download_mode(false); + qcom_scm_set_download_mode(false); } static const struct of_device_id qcom_scm_dt_match[] = { -- cgit v1.2.3 From 00e34c94987e4fe866f12ad8eac17268c936880c Mon Sep 17 00:00:00 2001 From: Siddharth Vadapalli Date: Tue, 14 Mar 2023 14:25:00 +0530 Subject: soc: ti: k3-socinfo: Add entry for J784S4 SOC J784S4 SoC's JTAG ID is 0xBB80. Signed-off-by: Siddharth Vadapalli Signed-off-by: Jayesh Choudhary Link: https://lore.kernel.org/r/20230314085500.10597-1-j-choudhary@ti.com Signed-off-by: Nishanth Menon --- drivers/soc/ti/k3-socinfo.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/soc/ti/k3-socinfo.c b/drivers/soc/ti/k3-socinfo.c index d15764e19d96..ad97e08a25f6 100644 --- a/drivers/soc/ti/k3-socinfo.c +++ b/drivers/soc/ti/k3-socinfo.c @@ -43,6 +43,7 @@ static const struct k3_soc_id { { 0xBB38, "AM64X" }, { 0xBB75, "J721S2"}, { 0xBB7E, "AM62X" }, + { 0xBB80, "J784S4" }, { 0xBB8D, "AM62AX" }, }; -- cgit v1.2.3 From ff642773b6b5b801f2f3bbdabe22c3d02656981e Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Tue, 21 Mar 2023 14:21:44 +0100 Subject: soc: qcom: pmic_glink: register ucsi aux device Only register UCSI on know working devices, like on the SM8450 or SM8550 which requires UCSI to get USB mode switch events. Signed-off-by: Neil Armstrong Reviewed-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230130-topic-sm8450-upstream-pmic-glink-v5-4-552f3b721f9e@linaro.org --- drivers/soc/qcom/pmic_glink.c | 65 +++++++++++++++++++++++++++++++++++-------- 1 file changed, 54 insertions(+), 11 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/pmic_glink.c b/drivers/soc/qcom/pmic_glink.c index bb3fb57abcc6..8bf95df0a56a 100644 --- a/drivers/soc/qcom/pmic_glink.c +++ b/drivers/soc/qcom/pmic_glink.c @@ -4,6 +4,7 @@ * Copyright (c) 2022, Linaro Ltd */ #include +#include #include #include #include @@ -11,12 +12,23 @@ #include #include +enum { + PMIC_GLINK_CLIENT_BATT = 0, + PMIC_GLINK_CLIENT_ALTMODE, + PMIC_GLINK_CLIENT_UCSI, +}; + +#define PMIC_GLINK_CLIENT_DEFAULT (BIT(PMIC_GLINK_CLIENT_BATT) | \ + BIT(PMIC_GLINK_CLIENT_ALTMODE)) + struct pmic_glink { struct device *dev; struct pdr_handle *pdr; struct rpmsg_endpoint *ept; + unsigned long client_mask; + struct auxiliary_device altmode_aux; struct auxiliary_device ps_aux; struct auxiliary_device ucsi_aux; @@ -233,6 +245,7 @@ static struct rpmsg_driver pmic_glink_rpmsg_driver = { static int pmic_glink_probe(struct platform_device *pdev) { + const unsigned long *match_data; struct pdr_service *service; struct pmic_glink *pg; int ret; @@ -249,12 +262,27 @@ static int pmic_glink_probe(struct platform_device *pdev) mutex_init(&pg->client_lock); mutex_init(&pg->state_lock); - ret = pmic_glink_add_aux_device(pg, &pg->altmode_aux, "altmode"); - if (ret) - return ret; - ret = pmic_glink_add_aux_device(pg, &pg->ps_aux, "power-supply"); - if (ret) - goto out_release_altmode_aux; + match_data = (unsigned long *)of_device_get_match_data(&pdev->dev); + if (match_data) + pg->client_mask = *match_data; + else + pg->client_mask = PMIC_GLINK_CLIENT_DEFAULT; + + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI)) { + ret = pmic_glink_add_aux_device(pg, &pg->ucsi_aux, "ucsi"); + if (ret) + return ret; + } + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE)) { + ret = pmic_glink_add_aux_device(pg, &pg->altmode_aux, "altmode"); + if (ret) + goto out_release_ucsi_aux; + } + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT)) { + ret = pmic_glink_add_aux_device(pg, &pg->ps_aux, "power-supply"); + if (ret) + goto out_release_altmode_aux; + } pg->pdr = pdr_handle_alloc(pmic_glink_pdr_callback, pg); if (IS_ERR(pg->pdr)) { @@ -278,9 +306,14 @@ static int pmic_glink_probe(struct platform_device *pdev) out_release_pdr_handle: pdr_handle_release(pg->pdr); out_release_aux_devices: - pmic_glink_del_aux_device(pg, &pg->ps_aux); + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT)) + pmic_glink_del_aux_device(pg, &pg->ps_aux); out_release_altmode_aux: - pmic_glink_del_aux_device(pg, &pg->altmode_aux); + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE)) + pmic_glink_del_aux_device(pg, &pg->altmode_aux); +out_release_ucsi_aux: + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI)) + pmic_glink_del_aux_device(pg, &pg->ucsi_aux); return ret; } @@ -291,8 +324,12 @@ static int pmic_glink_remove(struct platform_device *pdev) pdr_handle_release(pg->pdr); - pmic_glink_del_aux_device(pg, &pg->ps_aux); - pmic_glink_del_aux_device(pg, &pg->altmode_aux); + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT)) + pmic_glink_del_aux_device(pg, &pg->ps_aux); + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE)) + pmic_glink_del_aux_device(pg, &pg->altmode_aux); + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI)) + pmic_glink_del_aux_device(pg, &pg->ucsi_aux); mutex_lock(&__pmic_glink_lock); __pmic_glink = NULL; @@ -301,8 +338,14 @@ static int pmic_glink_remove(struct platform_device *pdev) return 0; } +/* Do not handle altmode for now on those platforms */ +static const unsigned long pmic_glink_sm8450_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) | + BIT(PMIC_GLINK_CLIENT_UCSI); + static const struct of_device_id pmic_glink_of_match[] = { - { .compatible = "qcom,pmic-glink", }, + { .compatible = "qcom,sm8450-pmic-glink", .data = &pmic_glink_sm8450_client_mask }, + { .compatible = "qcom,sm8550-pmic-glink", .data = &pmic_glink_sm8450_client_mask }, + { .compatible = "qcom,pmic-glink" }, {} }; MODULE_DEVICE_TABLE(of, pmic_glink_of_match); -- cgit v1.2.3 From 92b9d86252c1d76faf06f155c2a73b0c673bf59d Mon Sep 17 00:00:00 2001 From: Danila Tikhonov Date: Sun, 5 Mar 2023 23:26:27 +0300 Subject: soc: qcom: llcc: Add configuration data for SM7150 Add LLCC configuration data for SM7150 SoC. Signed-off-by: Danila Tikhonov Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230305202627.402386-3-danila@jiaxyga.com --- drivers/soc/qcom/llcc-qcom.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'drivers') diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index a5140f19f200..97c0908c689c 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -226,6 +226,14 @@ static const struct llcc_slice_config sm6350_data[] = { { LLCC_MODPE, 29, 64, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 }, }; +static const struct llcc_slice_config sm7150_data[] = { + { LLCC_CPUSS, 1, 512, 1, 0, 0xF, 0x0, 0, 0, 0, 1, 1 }, + { LLCC_MDM, 8, 128, 2, 0, 0xF, 0x0, 0, 0, 0, 1, 0 }, + { LLCC_GPUHTW, 11, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 }, + { LLCC_GPU, 12, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 }, + { LLCC_NPU, 23, 512, 1, 0, 0xF, 0x0, 0, 0, 0, 1, 0 }, +}; + static const struct llcc_slice_config sm8150_data[] = { { LLCC_CPUSS, 1, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 1 }, { LLCC_VIDSC0, 2, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, @@ -464,6 +472,14 @@ static const struct qcom_llcc_config sm6350_cfg = { .edac_reg_offset = &llcc_v1_edac_reg_offset, }; +static const struct qcom_llcc_config sm7150_cfg = { + .sct_data = sm7150_data, + .size = ARRAY_SIZE(sm7150_data), + .need_llcc_cfg = true, + .reg_offset = llcc_v1_reg_offset, + .edac_reg_offset = &llcc_v1_edac_reg_offset, +}; + static const struct qcom_llcc_config sm8150_cfg = { .sct_data = sm8150_data, .size = ARRAY_SIZE(sm8150_data), @@ -1041,6 +1057,7 @@ static const struct of_device_id qcom_llcc_of_match[] = { { .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfg }, { .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfg }, { .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfg }, + { .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfg }, { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfg }, { .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfg }, { .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfg }, -- cgit v1.2.3 From fb1eb0b5dcf6f214479e853ee466958190785ab4 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Tue, 7 Mar 2023 02:22:47 +0100 Subject: firmware: qcom_scm: Add SM6375 compatible While it was introduced in bindings, requiring a core clock, and added into the DT, this compatible was apparently forgotten about on the driver side of things. Fix it. Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230307012247.3655547-1-konrad.dybcio@linaro.org --- drivers/firmware/qcom_scm.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index ce76f5263aa3..280d6a4ac71a 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -1543,6 +1543,7 @@ static const struct of_device_id qcom_scm_dt_match[] = { }, { .compatible = "qcom,scm-msm8994" }, { .compatible = "qcom,scm-msm8996" }, + { .compatible = "qcom,scm-sm6375", .data = (void *)SCM_HAS_CORE_CLK }, { .compatible = "qcom,scm" }, {} }; -- cgit v1.2.3 From 2ae66ecc0825b0b4707384772b848c79b0986ef5 Mon Sep 17 00:00:00 2001 From: Diogo Ivo Date: Sun, 19 Mar 2023 17:13:03 +0000 Subject: memory: tegra: remove redundant variable initialization tegra210_emc_table_device_init() sets count = 0 twice, so remove the second instance. Signed-off-by: Diogo Ivo Link: https://lore.kernel.org/r/20230319171303.120777-1-diogo.ivo@tecnico.ulisboa.pt Signed-off-by: Krzysztof Kozlowski --- drivers/memory/tegra/tegra210-emc-table.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers') diff --git a/drivers/memory/tegra/tegra210-emc-table.c b/drivers/memory/tegra/tegra210-emc-table.c index 3e0598363b87..34a8785d2861 100644 --- a/drivers/memory/tegra/tegra210-emc-table.c +++ b/drivers/memory/tegra/tegra210-emc-table.c @@ -22,8 +22,6 @@ static int tegra210_emc_table_device_init(struct reserved_mem *rmem, return -ENOMEM; } - count = 0; - for (i = 0; i < TEGRA_EMC_MAX_FREQS; i++) { if (timings[i].revision == 0) break; -- cgit v1.2.3 From 9737a63558deeec01ce202c6c06c96a0503a3128 Mon Sep 17 00:00:00 2001 From: Muhammad Usama Anjum Date: Fri, 3 Mar 2023 18:03:46 +0500 Subject: soc/tegra: cbb: remove linux/version.h make versioncheck reports the following: ./drivers/soc/tegra/cbb/tegra-cbb.c: 19 linux/version.h not needed. ./drivers/soc/tegra/cbb/tegra194-cbb.c: 26 linux/version.h not needed. ./drivers/soc/tegra/cbb/tegra234-cbb.c: 27 linux/version.h not needed. So remove linux/version.h from these files. Signed-off-by: Muhammad Usama Anjum Reviewed-by: Jon Hunter Signed-off-by: Thierry Reding --- drivers/soc/tegra/cbb/tegra-cbb.c | 1 - drivers/soc/tegra/cbb/tegra194-cbb.c | 1 - drivers/soc/tegra/cbb/tegra234-cbb.c | 1 - 3 files changed, 3 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/tegra/cbb/tegra-cbb.c b/drivers/soc/tegra/cbb/tegra-cbb.c index a8566b9dd8de..bd96204a68ee 100644 --- a/drivers/soc/tegra/cbb/tegra-cbb.c +++ b/drivers/soc/tegra/cbb/tegra-cbb.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include diff --git a/drivers/soc/tegra/cbb/tegra194-cbb.c b/drivers/soc/tegra/cbb/tegra194-cbb.c index d4112b683f00..a05fc2caff3b 100644 --- a/drivers/soc/tegra/cbb/tegra194-cbb.c +++ b/drivers/soc/tegra/cbb/tegra194-cbb.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include diff --git a/drivers/soc/tegra/cbb/tegra234-cbb.c b/drivers/soc/tegra/cbb/tegra234-cbb.c index f33d094e5ea6..e23e8acfd7c7 100644 --- a/drivers/soc/tegra/cbb/tegra234-cbb.c +++ b/drivers/soc/tegra/cbb/tegra234-cbb.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include -- cgit v1.2.3 From 74f9d27ac7591e0df05c85ca5eb538253f39919d Mon Sep 17 00:00:00 2001 From: Ye Xingchen Date: Fri, 24 Mar 2023 10:18:53 +0800 Subject: soc: qcom: smsm: Use dev_err_probe() Replace the open-code with dev_err_probe() to simplify the code. Signed-off-by: Ye Xingchen Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/202303241018532824420@zte.com.cn --- drivers/soc/qcom/smsm.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/smsm.c b/drivers/soc/qcom/smsm.c index 8c137dff7dac..c58cfff64856 100644 --- a/drivers/soc/qcom/smsm.c +++ b/drivers/soc/qcom/smsm.c @@ -452,11 +452,10 @@ static int smsm_get_size_info(struct qcom_smsm *smsm) } *info; info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_SMSM_SIZE_INFO, &size); - if (IS_ERR(info) && PTR_ERR(info) != -ENOENT) { - if (PTR_ERR(info) != -EPROBE_DEFER) - dev_err(smsm->dev, "unable to retrieve smsm size info\n"); - return PTR_ERR(info); - } else if (IS_ERR(info) || size != sizeof(*info)) { + if (IS_ERR(info) && PTR_ERR(info) != -ENOENT) + return dev_err_probe(smsm->dev, PTR_ERR(info), + "unable to retrieve smsm size info\n"); + else if (IS_ERR(info) || size != sizeof(*info)) { dev_warn(smsm->dev, "no smsm size info, using defaults\n"); smsm->num_entries = SMSM_DEFAULT_NUM_ENTRIES; smsm->num_hosts = SMSM_DEFAULT_NUM_HOSTS; -- cgit v1.2.3 From 816aec03a043af6d0234c3e770bead2c772ef4eb Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 13 Mar 2023 08:49:03 +0800 Subject: soc: imx: imx8m-blk-ctrl: reordering the fields The clang-analyzer reports: "Excessive padding in 'struct imx8m_blk_ctrl_domain_data' (12 padding bytes, where 4 is optimal). Optimal fields order: name, clk_names, path_names, gpc_name, num_clks, num_paths, rst_mask, clk_mask, mipi_phy_rst_mask, consider reordering the fields or adding explicit padding members [clang-analyzer-optin.performance.Padding] struct imx8m_blk_ctrl_domain_data {" So reordering the fields. Reported-by: kernel test robot Signed-off-by: Peng Fan Signed-off-by: Shawn Guo --- drivers/soc/imx/imx8m-blk-ctrl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx8m-blk-ctrl.c index 9129c97b7a01..afbca0d48c14 100644 --- a/drivers/soc/imx/imx8m-blk-ctrl.c +++ b/drivers/soc/imx/imx8m-blk-ctrl.c @@ -38,10 +38,10 @@ struct imx8m_blk_ctrl { struct imx8m_blk_ctrl_domain_data { const char *name; const char * const *clk_names; - int num_clks; const char * const *path_names; - int num_paths; const char *gpc_name; + int num_clks; + int num_paths; u32 rst_mask; u32 clk_mask; -- cgit v1.2.3 From 41e4f807f85d02a44426b87e01ed98b191dbbf9d Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 1 Feb 2023 16:00:02 -0600 Subject: bus: ti-sysc: Remove open coded "ranges" parsing "ranges" is a standard property and we have common helper functions for parsing it, so let's use them. Signed-off-by: Rob Herring Message-Id: <20230201220002.246907-1-robh@kernel.org> Signed-off-by: Tony Lindgren --- drivers/bus/ti-sysc.c | 41 +++++++++-------------------------------- 1 file changed, 9 insertions(+), 32 deletions(-) (limited to 'drivers') diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c index 6afae9897843..9c8985515376 100644 --- a/drivers/bus/ti-sysc.c +++ b/drivers/bus/ti-sysc.c @@ -648,43 +648,20 @@ static int sysc_init_resets(struct sysc *ddata) static int sysc_parse_and_check_child_range(struct sysc *ddata) { struct device_node *np = ddata->dev->of_node; - const __be32 *ranges; - u32 nr_addr, nr_size; - int len, error; - - ranges = of_get_property(np, "ranges", &len); - if (!ranges) { - dev_err(ddata->dev, "missing ranges for %pOF\n", np); - - return -ENOENT; - } - - len /= sizeof(*ranges); - - if (len < 3) { - dev_err(ddata->dev, "incomplete ranges for %pOF\n", np); - - return -EINVAL; - } - - error = of_property_read_u32(np, "#address-cells", &nr_addr); - if (error) - return -ENOENT; + struct of_range_parser parser; + struct of_range range; + int error; - error = of_property_read_u32(np, "#size-cells", &nr_size); + error = of_range_parser_init(&parser, np); if (error) - return -ENOENT; - - if (nr_addr != 1 || nr_size != 1) { - dev_err(ddata->dev, "invalid ranges for %pOF\n", np); + return error; - return -EINVAL; + for_each_of_range(&parser, &range) { + ddata->module_pa = range.cpu_addr; + ddata->module_size = range.size; + break; } - ranges++; - ddata->module_pa = of_translate_address(np, ranges++); - ddata->module_size = be32_to_cpup(ranges); - return 0; } -- cgit v1.2.3 From 2ee1bdd3114f62bb542ab51d2fececb20a4481da Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 10 Mar 2023 08:47:34 -0600 Subject: bus: ti-sysc: Use of_property_present() for testing DT property presence It is preferred to use typed property access functions (i.e. of_property_read_ functions) rather than low-level of_get_property/of_find_property functions for reading properties. As part of this, convert of_get_property/of_find_property calls to the recently added of_property_present() helper when we just want to test for presence of a property and nothing more. Signed-off-by: Rob Herring Message-Id: <20230310144734.1546656-1-robh@kernel.org> Signed-off-by: Tony Lindgren --- drivers/bus/ti-sysc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c index 9c8985515376..97e6421046ee 100644 --- a/drivers/bus/ti-sysc.c +++ b/drivers/bus/ti-sysc.c @@ -941,7 +941,7 @@ static int sysc_map_and_check_registers(struct sysc *ddata) sysc_check_children(ddata); - if (!of_get_property(np, "reg", NULL)) + if (!of_property_present(np, "reg")) return 0; error = sysc_parse_registers(ddata); -- cgit v1.2.3 From 78e812f0406c765fc5623b1d68e3c6e86cb32e5a Mon Sep 17 00:00:00 2001 From: Ye Xingchen Date: Fri, 24 Mar 2023 10:16:26 +0800 Subject: soc: amlogic: meson-pwrc: Use dev_err_probe() Replace the open-code with dev_err_probe() to simplify the code. Signed-off-by: Ye Xingchen Reviewed-by: Neil Armstrong Reviewed-by: Martin Blumenstingl Link: https://lore.kernel.org/r/202303241016261854322@zte.com.cn Signed-off-by: Neil Armstrong --- drivers/soc/amlogic/meson-gx-pwrc-vpu.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c index 312fd9afccb0..5d4f12800d93 100644 --- a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c +++ b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c @@ -308,11 +308,9 @@ static int meson_gx_pwrc_vpu_probe(struct platform_device *pdev) } rstc = devm_reset_control_array_get_exclusive(&pdev->dev); - if (IS_ERR(rstc)) { - if (PTR_ERR(rstc) != -EPROBE_DEFER) - dev_err(&pdev->dev, "failed to get reset lines\n"); - return PTR_ERR(rstc); - } + if (IS_ERR(rstc)) + return dev_err_probe(&pdev->dev, PTR_ERR(rstc), + "failed to get reset lines\n"); vpu_clk = devm_clk_get(&pdev->dev, "vpu"); if (IS_ERR(vpu_clk)) { -- cgit v1.2.3 From d4f1d01d3492e18b15df5c680fcaa4e14fc77481 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Sat, 27 Aug 2022 17:46:04 +0800 Subject: bus: ti-sysc: Use list_for_each_entry() helper Convert list_for_each() to list_for_each_entry() where applicable. Signed-off-by: Yang Yingliang Message-Id: <20220827094604.3325887-1-yangyingliang@huawei.com> Signed-off-by: Tony Lindgren --- drivers/bus/ti-sysc.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c index 97e6421046ee..524f4113043c 100644 --- a/drivers/bus/ti-sysc.c +++ b/drivers/bus/ti-sysc.c @@ -2507,11 +2507,9 @@ static struct dev_pm_domain sysc_child_pm_domain = { static void sysc_reinit_modules(struct sysc_soc_info *soc) { struct sysc_module *module; - struct list_head *pos; struct sysc *ddata; - list_for_each(pos, &sysc_soc->restored_modules) { - module = list_entry(pos, struct sysc_module, node); + list_for_each_entry(module, &sysc_soc->restored_modules, node) { ddata = module->ddata; sysc_reinit_module(ddata, ddata->enabled); } @@ -3191,12 +3189,10 @@ static void sysc_cleanup_static_data(void) static int sysc_check_disabled_devices(struct sysc *ddata) { struct sysc_address *disabled_module; - struct list_head *pos; int error = 0; mutex_lock(&sysc_soc->list_lock); - list_for_each(pos, &sysc_soc->disabled_modules) { - disabled_module = list_entry(pos, struct sysc_address, node); + list_for_each_entry(disabled_module, &sysc_soc->disabled_modules, node) { if (ddata->module_pa == disabled_module->base) { dev_dbg(ddata->dev, "module disabled for this SoC\n"); error = -ENODEV; -- cgit v1.2.3 From b79ad2307a1dfd9cba3cfce6445fa0be74a757a0 Mon Sep 17 00:00:00 2001 From: Jason Wang Date: Thu, 11 Aug 2022 20:11:19 +0800 Subject: bus: ti-sysc: Fix comment typo The double `the' is duplicated in the comment, remove one. Signed-off-by: Jason Wang Message-Id: <20220811121119.20288-1-wangborong@cdjrlc.com> Signed-off-by: Tony Lindgren --- drivers/bus/ti-sysc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c index 524f4113043c..6c49de37d5e9 100644 --- a/drivers/bus/ti-sysc.c +++ b/drivers/bus/ti-sysc.c @@ -890,7 +890,7 @@ static int sysc_check_registers(struct sysc *ddata) * within the interconnect target module range. For example, SGX has * them at offset 0x1fc00 in the 32MB module address space. And cpsw * has them at offset 0x1200 in the CPSW_WR child. Usually the - * the interconnect target module registers are at the beginning of + * interconnect target module registers are at the beginning of * the module range though. */ static int sysc_ioremap(struct sysc *ddata) -- cgit v1.2.3 From b2ccba9e8cdc6fb3985cc227844e7c6af309ffb1 Mon Sep 17 00:00:00 2001 From: Cristian Marussi Date: Sun, 26 Mar 2023 21:34:49 +0100 Subject: firmware: arm_scmi: Fix xfers allocation on Rx channel Two distinct pools of xfer descriptors are allocated at initialization time: one (Tx) used to provide xfers to track commands and their replies (or delayed replies) and another (Rx) to pick xfers from to be used for processing notifications. Such pools, though, are allocated globally to be used by the whole SCMI instance, they are not allocated per-channel and as such the allocation of notifications xfers cannot be simply skipped if no Rx channel was found for the base protocol common channel, because there could be defined more optional per-protocol dedicated channels that instead support Rx channels. Change the conditional check to skip allocation for the notification pool only if no Rx channel has been detected on any per-channel protocol at all. Fixes: 4ebd8f6dea81 ("firmware: arm_scmi: Add receive buffer support for notifications") Signed-off-by: Cristian Marussi Link: https://lore.kernel.org/r/20230326203449.3492948-1-cristian.marussi@arm.com Signed-off-by: Sudeep Holla --- drivers/firmware/arm_scmi/driver.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c index dbc474ff62b7..e7d97b59963b 100644 --- a/drivers/firmware/arm_scmi/driver.c +++ b/drivers/firmware/arm_scmi/driver.c @@ -2289,7 +2289,7 @@ static int scmi_xfer_info_init(struct scmi_info *sinfo) return ret; ret = __scmi_xfer_info_init(sinfo, &sinfo->tx_minfo); - if (!ret && idr_find(&sinfo->rx_idr, SCMI_PROTOCOL_BASE)) + if (!ret && !idr_is_empty(&sinfo->rx_idr)) ret = __scmi_xfer_info_init(sinfo, &sinfo->rx_minfo); return ret; -- cgit v1.2.3 From e45f243409db98d610248c843b25435e7fb0baf3 Mon Sep 17 00:00:00 2001 From: Dmitry Rokosov Date: Fri, 24 Mar 2023 17:55:57 +0300 Subject: firmware: meson_sm: populate platform devices from sm device tree data In some meson boards, secure monitor device has children, for example, power secure controller. By default, secure monitor isn't the bus in terms of device tree subsystem, so the of_platform initialization code doesn't populate its device tree data. As a result, secure monitor's children aren't probed at all. Run the 'of_platform_populate()' routine manually to resolve such issues. Signed-off-by: Dmitry Rokosov Acked-by: Martin Blumenstingl Link: https://lore.kernel.org/r/20230324145557.27797-1-ddrokosov@sberdevices.ru Signed-off-by: Neil Armstrong --- drivers/firmware/meson/meson_sm.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/firmware/meson/meson_sm.c b/drivers/firmware/meson/meson_sm.c index 3f5ff9ed668e..798bcdb05d84 100644 --- a/drivers/firmware/meson/meson_sm.c +++ b/drivers/firmware/meson/meson_sm.c @@ -311,11 +311,14 @@ static int __init meson_sm_probe(struct platform_device *pdev) platform_set_drvdata(pdev, fw); - pr_info("secure-monitor enabled\n"); + if (devm_of_platform_populate(dev)) + goto out_in_base; if (sysfs_create_group(&pdev->dev.kobj, &meson_sm_sysfs_attr_group)) goto out_in_base; + pr_info("secure-monitor enabled\n"); + return 0; out_in_base: -- cgit v1.2.3 From 20c082a2ba25374a13505b78cdad7f6a2cf8d763 Mon Sep 17 00:00:00 2001 From: Christophe Kerello Date: Fri, 24 Mar 2023 16:51:04 +0100 Subject: memory: stm32-fmc2-ebi: depends on ARCH_STM32 instead of MACH_STM32MP157 To be able to compile the driver on all STM32MP SOCs, we move the "depends on" on ARCH_STM32. Signed-off-by: Christophe Kerello Link: https://lore.kernel.org/r/20230324155105.826063-2-christophe.kerello@foss.st.com Signed-off-by: Krzysztof Kozlowski --- drivers/memory/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index fac290e48e0b..91774e6ee624 100644 --- a/drivers/memory/Kconfig +++ b/drivers/memory/Kconfig @@ -228,7 +228,7 @@ config RENESAS_RPCIF config STM32_FMC2_EBI tristate "Support for FMC2 External Bus Interface on STM32MP SoCs" - depends on MACH_STM32MP157 || COMPILE_TEST + depends on ARCH_STM32 || COMPILE_TEST select MFD_SYSCON help Select this option to enable the STM32 FMC2 External Bus Interface -- cgit v1.2.3 From 223444882d9bb30d2eaa9e221f2939f881dec4aa Mon Sep 17 00:00:00 2001 From: Asahi Lina Date: Fri, 24 Feb 2023 15:49:44 +0900 Subject: soc: apple: rtkit: Fix buffer address field width The buffer address field is missing two bits. This matters for the GPU, which uses upper-half 64-bit addresses on the ASC and those get sign extended from the mailbox message field, so the right number of high bits need to be set. Signed-off-by: Asahi Lina Reviewed-by: Sven Peter Signed-off-by: Hector Martin --- drivers/soc/apple/rtkit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/apple/rtkit.c b/drivers/soc/apple/rtkit.c index 35ec35aa500d..a02a44a745f6 100644 --- a/drivers/soc/apple/rtkit.c +++ b/drivers/soc/apple/rtkit.c @@ -55,7 +55,7 @@ enum { #define APPLE_RTKIT_BUFFER_REQUEST 1 #define APPLE_RTKIT_BUFFER_REQUEST_SIZE GENMASK_ULL(51, 44) -#define APPLE_RTKIT_BUFFER_REQUEST_IOVA GENMASK_ULL(41, 0) +#define APPLE_RTKIT_BUFFER_REQUEST_IOVA GENMASK_ULL(43, 0) #define APPLE_RTKIT_SYSLOG_TYPE GENMASK_ULL(59, 52) -- cgit v1.2.3 From bdfe6de2695c5bccc663a5a7d530f81925d8bc10 Mon Sep 17 00:00:00 2001 From: Martin Povišer Date: Fri, 24 Feb 2023 17:21:59 +0100 Subject: soc: apple: rtkit: Crop syslog messages MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Crop trailing whitespace, null, and newline characters in syslog messages received from coprocessors. Notably DCP sends its messages including a trailing newline, so prior to this change we would end up cluttering the kernel log by repeated newlines at the end of messages. Signed-off-by: Martin Povišer Reviewed-by: Hector Martin Signed-off-by: Hector Martin --- drivers/soc/apple/rtkit.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/apple/rtkit.c b/drivers/soc/apple/rtkit.c index a02a44a745f6..d9f19dc99da5 100644 --- a/drivers/soc/apple/rtkit.c +++ b/drivers/soc/apple/rtkit.c @@ -409,11 +409,17 @@ static void apple_rtkit_syslog_rx_init(struct apple_rtkit *rtk, u64 msg) rtk->syslog_n_entries, rtk->syslog_msg_size); } +static bool should_crop_syslog_char(char c) +{ + return c == '\n' || c == '\r' || c == ' ' || c == '\0'; +} + static void apple_rtkit_syslog_rx_log(struct apple_rtkit *rtk, u64 msg) { u8 idx = msg & 0xff; char log_context[24]; size_t entry_size = 0x20 + rtk->syslog_msg_size; + int msglen; if (!rtk->syslog_msg_buffer) { dev_warn( @@ -446,7 +452,13 @@ static void apple_rtkit_syslog_rx_log(struct apple_rtkit *rtk, u64 msg) rtk->syslog_msg_size); log_context[sizeof(log_context) - 1] = 0; - rtk->syslog_msg_buffer[rtk->syslog_msg_size - 1] = 0; + + msglen = rtk->syslog_msg_size - 1; + while (msglen > 0 && + should_crop_syslog_char(rtk->syslog_msg_buffer[msglen - 1])) + msglen--; + + rtk->syslog_msg_buffer[msglen] = 0; dev_info(rtk->dev, "RTKit: syslog message: %s: %s\n", log_context, rtk->syslog_msg_buffer); -- cgit v1.2.3 From a33bfafd99e0d1e33dfe910f751426f298a218b6 Mon Sep 17 00:00:00 2001 From: Yang Li Date: Thu, 23 Mar 2023 16:09:52 +0800 Subject: soc: ti: Use devm_platform_ioremap_resource() According to commit 7945f929f1a7 ("drivers: provide devm_platform_ioremap_resource()"), convert platform_get_resource(), devm_ioremap_resource() to a single call to use devm_platform_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li Link: https://lore.kernel.org/r/20230323080952.124410-1-yang.lee@linux.alibaba.com Signed-off-by: Nishanth Menon --- drivers/soc/ti/wkup_m3_ipc.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/ti/wkup_m3_ipc.c b/drivers/soc/ti/wkup_m3_ipc.c index 6970478b40f3..c9197912ec24 100644 --- a/drivers/soc/ti/wkup_m3_ipc.c +++ b/drivers/soc/ti/wkup_m3_ipc.c @@ -615,7 +615,6 @@ static int wkup_m3_ipc_probe(struct platform_device *pdev) int irq, ret, temp; phandle rproc_phandle; struct rproc *m3_rproc; - struct resource *res; struct task_struct *task; struct wkup_m3_ipc *m3_ipc; struct device_node *np = dev->of_node; @@ -624,8 +623,7 @@ static int wkup_m3_ipc_probe(struct platform_device *pdev) if (!m3_ipc) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - m3_ipc->ipc_mem_base = devm_ioremap_resource(dev, res); + m3_ipc->ipc_mem_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(m3_ipc->ipc_mem_base)) return PTR_ERR(m3_ipc->ipc_mem_base); -- cgit v1.2.3 From b3b4ced12c1bc829888803ce07fff317e590ec1c Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Wed, 22 Mar 2023 14:22:12 +0100 Subject: optee: add per cpu asynchronous notification Implements use of per-cpu irq for optee asynchronous notification. Existing optee async notif implementation allows OP-TEE world to raise an interrupt on which Linux optee driver will query some pending events. This change allows the signaling interrupt to be a per-cpu interrupt as with Arm GIC PPIs. Using a PPI instead of an SPI is useful when no GIC lines are provisioned in the chip design and there are spare PPI lines. Cc: Jens Wiklander Cc: Sumit Garg Cc: Marc Zyngier Co-developed-by: Alexandre Torgue Signed-off-by: Alexandre Torgue Signed-off-by: Etienne Carriere Reviewed-by: Sumit Garg [JW: fixing a spell error in @notif_pcpu_wq description] Signed-off-by: Jens Wiklander --- drivers/tee/optee/optee_private.h | 24 ++++++++ drivers/tee/optee/smc_abi.c | 122 ++++++++++++++++++++++++++++++++++++-- 2 files changed, 142 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/tee/optee/optee_private.h b/drivers/tee/optee/optee_private.h index 04ae58892608..72685ee0d53f 100644 --- a/drivers/tee/optee/optee_private.h +++ b/drivers/tee/optee/optee_private.h @@ -94,11 +94,35 @@ struct optee_supp { struct completion reqs_c; }; +/* + * struct optee_pcpu - per cpu notif private struct passed to work functions + * @optee optee device reference + */ +struct optee_pcpu { + struct optee *optee; +}; + +/* + * struct optee_smc - optee smc communication struct + * @invoke_fn handler function to invoke secure monitor + * @memremaped_shm virtual address of memory in shared memory pool + * @sec_caps: secure world capabilities defined by + * OPTEE_SMC_SEC_CAP_* in optee_smc.h + * @notif_irq interrupt used as async notification by OP-TEE or 0 + * @optee_pcpu per_cpu optee instance for per cpu work or NULL + * @notif_pcpu_wq workqueue for per cpu asynchronous notification or NULL + * @notif_pcpu_work work for per cpu asynchronous notification + * @notif_cpuhp_state CPU hotplug state assigned for pcpu interrupt management + */ struct optee_smc { optee_invoke_fn *invoke_fn; void *memremaped_shm; u32 sec_caps; unsigned int notif_irq; + struct optee_pcpu __percpu *optee_pcpu; + struct workqueue_struct *notif_pcpu_wq; + struct work_struct notif_pcpu_work; + unsigned int notif_cpuhp_state; }; /** diff --git a/drivers/tee/optee/smc_abi.c b/drivers/tee/optee/smc_abi.c index a1c1fa1a9c28..de7ac9a46354 100644 --- a/drivers/tee/optee/smc_abi.c +++ b/drivers/tee/optee/smc_abi.c @@ -52,6 +52,23 @@ */ #define OPTEE_MIN_STATIC_POOL_ALIGN 9 /* 512 bytes aligned */ +/* SMC ABI considers at most a single TEE firmware */ +static unsigned int pcpu_irq_num; + +static int optee_cpuhp_enable_pcpu_irq(unsigned int cpu) +{ + enable_percpu_irq(pcpu_irq_num, IRQ_TYPE_NONE); + + return 0; +} + +static int optee_cpuhp_disable_pcpu_irq(unsigned int cpu) +{ + disable_percpu_irq(pcpu_irq_num); + + return 0; +} + /* * 1. Convert between struct tee_param and struct optee_msg_param * @@ -991,9 +1008,8 @@ static u32 get_async_notif_value(optee_invoke_fn *invoke_fn, bool *value_valid, return res.a1; } -static irqreturn_t notif_irq_handler(int irq, void *dev_id) +static irqreturn_t irq_handler(struct optee *optee) { - struct optee *optee = dev_id; bool do_bottom_half = false; bool value_valid; bool value_pending; @@ -1016,6 +1032,13 @@ static irqreturn_t notif_irq_handler(int irq, void *dev_id) return IRQ_HANDLED; } +static irqreturn_t notif_irq_handler(int irq, void *dev_id) +{ + struct optee *optee = dev_id; + + return irq_handler(optee); +} + static irqreturn_t notif_irq_thread_fn(int irq, void *dev_id) { struct optee *optee = dev_id; @@ -1025,7 +1048,7 @@ static irqreturn_t notif_irq_thread_fn(int irq, void *dev_id) return IRQ_HANDLED; } -static int optee_smc_notif_init_irq(struct optee *optee, u_int irq) +static int init_irq(struct optee *optee, u_int irq) { int rc; @@ -1040,12 +1063,103 @@ static int optee_smc_notif_init_irq(struct optee *optee, u_int irq) return 0; } +static irqreturn_t notif_pcpu_irq_handler(int irq, void *dev_id) +{ + struct optee_pcpu *pcpu = dev_id; + struct optee *optee = pcpu->optee; + + if (irq_handler(optee) == IRQ_WAKE_THREAD) + queue_work(optee->smc.notif_pcpu_wq, + &optee->smc.notif_pcpu_work); + + return IRQ_HANDLED; +} + +static void notif_pcpu_irq_work_fn(struct work_struct *work) +{ + struct optee_smc *optee_smc = container_of(work, struct optee_smc, + notif_pcpu_work); + struct optee *optee = container_of(optee_smc, struct optee, smc); + + optee_smc_do_bottom_half(optee->ctx); +} + +static int init_pcpu_irq(struct optee *optee, u_int irq) +{ + struct optee_pcpu __percpu *optee_pcpu; + int cpu, rc; + + optee_pcpu = alloc_percpu(struct optee_pcpu); + if (!optee_pcpu) + return -ENOMEM; + + for_each_present_cpu(cpu) + per_cpu_ptr(optee_pcpu, cpu)->optee = optee; + + rc = request_percpu_irq(irq, notif_pcpu_irq_handler, + "optee_pcpu_notification", optee_pcpu); + if (rc) + goto err_free_pcpu; + + INIT_WORK(&optee->smc.notif_pcpu_work, notif_pcpu_irq_work_fn); + optee->smc.notif_pcpu_wq = create_workqueue("optee_pcpu_notification"); + if (!optee->smc.notif_pcpu_wq) { + rc = -EINVAL; + goto err_free_pcpu_irq; + } + + optee->smc.optee_pcpu = optee_pcpu; + optee->smc.notif_irq = irq; + + pcpu_irq_num = irq; + rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "optee/pcpu-notif:starting", + optee_cpuhp_enable_pcpu_irq, + optee_cpuhp_disable_pcpu_irq); + if (!rc) + rc = -EINVAL; + if (rc < 0) + goto err_free_pcpu_irq; + + optee->smc.notif_cpuhp_state = rc; + + return 0; + +err_free_pcpu_irq: + free_percpu_irq(irq, optee_pcpu); +err_free_pcpu: + free_percpu(optee_pcpu); + + return rc; +} + +static int optee_smc_notif_init_irq(struct optee *optee, u_int irq) +{ + if (irq_is_percpu_devid(irq)) + return init_pcpu_irq(optee, irq); + else + return init_irq(optee, irq); +} + +static void uninit_pcpu_irq(struct optee *optee) +{ + cpuhp_remove_state(optee->smc.notif_cpuhp_state); + + destroy_workqueue(optee->smc.notif_pcpu_wq); + + free_percpu_irq(optee->smc.notif_irq, optee->smc.optee_pcpu); + free_percpu(optee->smc.optee_pcpu); +} + static void optee_smc_notif_uninit_irq(struct optee *optee) { if (optee->smc.sec_caps & OPTEE_SMC_SEC_CAP_ASYNC_NOTIF) { optee_smc_stop_async_notif(optee->ctx); if (optee->smc.notif_irq) { - free_irq(optee->smc.notif_irq, optee); + if (irq_is_percpu_devid(optee->smc.notif_irq)) + uninit_pcpu_irq(optee); + else + free_irq(optee->smc.notif_irq, optee); + irq_dispose_mapping(optee->smc.notif_irq); } } -- cgit v1.2.3 From edecdcccc1e971b1f0c077ef1f1f714251864aa1 Mon Sep 17 00:00:00 2001 From: Roger Lu Date: Thu, 16 Feb 2023 21:25:43 +0800 Subject: soc: mediatek: mtk-svs: fix passing zero to 'PTR_ERR' nvmem_cell_get() cannot return NULL so checking for NULL is wrong here. Signed-off-by: Roger Lu Fixes: 6c7174fd90a4690 ("soc: mediatek: mtk-svs: use svs get efuse common function") Reported-by: kernel test robot Reported-by: Dan Carpenter Link: https://lore.kernel.org/r/202302160720.N64SWT4l-lkp@intel.com/ Link: https://lore.kernel.org/r/20230216132543.814-1-roger.lu@mediatek.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-svs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index a7eb019b5157..8127fb6d587b 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -1726,7 +1726,7 @@ static int svs_get_efuse_data(struct svs_platform *svsp, struct nvmem_cell *cell; cell = nvmem_cell_get(svsp->dev, nvmem_cell_name); - if (IS_ERR_OR_NULL(cell)) { + if (IS_ERR(cell)) { dev_err(svsp->dev, "no \"%s\"? %ld\n", nvmem_cell_name, PTR_ERR(cell)); return PTR_ERR(cell); -- cgit v1.2.3 From bd0a62a667c4a4ee790376641e06f7b17000496f Mon Sep 17 00:00:00 2001 From: Roger Lu Date: Thu, 2 Feb 2023 20:41:04 +0800 Subject: soc: mediatek: mtk-svs: add thermal voltage compensation if needed Some extreme test environment may keep IC temperature very low or very high during system boot stage. For stability concern, we add thermal voltage compenstation if needed no matter svs bank phase is in init02 or mon mode. Signed-off-by: Roger Lu Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230202124104.16504-4-roger.lu@mediatek.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-svs.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 8127fb6d587b..b9c96182a46a 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -558,7 +558,7 @@ static int svs_adjust_pm_opp_volts(struct svs_bank *svsb) } /* Get thermal effect */ - if (svsb->phase == SVSB_PHASE_MON) { + if (!IS_ERR_OR_NULL(svsb->tzd)) { ret = thermal_zone_get_temp(svsb->tzd, &tzone_temp); if (ret || (svsb->temp > SVSB_TEMP_UPPER_BOUND && svsb->temp < SVSB_TEMP_LOWER_BOUND)) { @@ -573,7 +573,8 @@ static int svs_adjust_pm_opp_volts(struct svs_bank *svsb) temp_voffset += svsb->tzone_ltemp_voffset; /* 2-line bank update all opp volts when running mon mode */ - if (svsb->type == SVSB_HIGH || svsb->type == SVSB_LOW) { + if (svsb->phase == SVSB_PHASE_MON && (svsb->type == SVSB_HIGH || + svsb->type == SVSB_LOW)) { opp_start = 0; opp_stop = svsb->opp_count; } @@ -589,11 +590,6 @@ static int svs_adjust_pm_opp_volts(struct svs_bank *svsb) /* do nothing */ goto unlock_mutex; case SVSB_PHASE_INIT02: - svsb_volt = max(svsb->volt[i], svsb->vmin); - opp_volt = svs_bank_volt_to_opp_volt(svsb_volt, - svsb->volt_step, - svsb->volt_base); - break; case SVSB_PHASE_MON: svsb_volt = max(svsb->volt[i] + temp_voffset, svsb->vmin); opp_volt = svs_bank_volt_to_opp_volt(svsb_volt, @@ -1683,7 +1679,7 @@ static int svs_bank_resource_setup(struct svs_platform *svsp) } } - if (svsb->mode_support & SVSB_MODE_MON) { + if (!IS_ERR_OR_NULL(svsb->tzone_name)) { svsb->tzd = thermal_zone_get_zone_by_name(svsb->tzone_name); if (IS_ERR(svsb->tzd)) { dev_err(svsb->dev, "cannot get \"%s\" thermal zone\n", @@ -2122,6 +2118,7 @@ static struct svs_bank svs_mt8192_banks[] = { .type = SVSB_LOW, .set_freq_pct = svs_set_bank_freq_pct_v3, .get_volts = svs_get_bank_volts_v3, + .tzone_name = "gpu1", .volt_flags = SVSB_REMOVE_DVTFIXED_VOLT, .mode_support = SVSB_MODE_INIT02, .opp_count = MAX_OPP_ENTRIES, @@ -2139,6 +2136,10 @@ static struct svs_bank svs_mt8192_banks[] = { .core_sel = 0x0fff0100, .int_st = BIT(0), .ctl0 = 0x00540003, + .tzone_htemp = 85000, + .tzone_htemp_voffset = 0, + .tzone_ltemp = 25000, + .tzone_ltemp_voffset = 7, }, { .sw_id = SVSB_GPU, -- cgit v1.2.3 From 1ef3e78ac207d5194c18d2b75cb2119273816cb5 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 22 Feb 2023 10:42:45 +0100 Subject: soc: mediatek: mtk-mmsys: Add .remove() callback Add a .remove() callback to correctly unregister the multimedia clocks and DRM drivers. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20230222094253.23678-2-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-mmsys.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index fd2b37d451c8..6edada278a15 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -121,6 +121,8 @@ static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = { struct mtk_mmsys { void __iomem *regs; const struct mtk_mmsys_driver_data *data; + struct platform_device *clks_pdev; + struct platform_device *drm_pdev; spinlock_t lock; /* protects mmsys_sw_rst_b reg */ struct reset_controller_dev rcdev; struct cmdq_client_reg cmdq_base; @@ -386,6 +388,7 @@ static int mtk_mmsys_probe(struct platform_device *pdev) PLATFORM_DEVID_AUTO, NULL, 0); if (IS_ERR(clks)) return PTR_ERR(clks); + mmsys->clks_pdev = clks; if (mmsys->data->is_vppsys) goto out_probe_done; @@ -396,11 +399,22 @@ static int mtk_mmsys_probe(struct platform_device *pdev) platform_device_unregister(clks); return PTR_ERR(drm); } + mmsys->drm_pdev = drm; out_probe_done: return 0; } +static int mtk_mmsys_remove(struct platform_device *pdev) +{ + struct mtk_mmsys *mmsys = platform_get_drvdata(pdev); + + platform_device_unregister(mmsys->drm_pdev); + platform_device_unregister(mmsys->clks_pdev); + + return 0; +} + static const struct of_device_id of_match_mtk_mmsys[] = { { .compatible = "mediatek,mt2701-mmsys", @@ -475,6 +489,7 @@ static struct platform_driver mtk_mmsys_drv = { .of_match_table = of_match_mtk_mmsys, }, .probe = mtk_mmsys_probe, + .remove = mtk_mmsys_remove, }; static int __init mtk_mmsys_init(void) -- cgit v1.2.3 From 683c7d383fbd413cabe1203eb7df1cc8f39c70d5 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 22 Feb 2023 10:42:46 +0100 Subject: soc: mediatek: mtk-mmsys: Use module_platform_driver() macro Instead of open-coding init/exit calls, switch to using the module_platform_driver() macro instead, doing the exact same. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20230222094253.23678-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-mmsys.c | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index 6edada278a15..d698d7a3b985 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -491,19 +491,7 @@ static struct platform_driver mtk_mmsys_drv = { .probe = mtk_mmsys_probe, .remove = mtk_mmsys_remove, }; - -static int __init mtk_mmsys_init(void) -{ - return platform_driver_register(&mtk_mmsys_drv); -} - -static void __exit mtk_mmsys_exit(void) -{ - platform_driver_unregister(&mtk_mmsys_drv); -} - -module_init(mtk_mmsys_init); -module_exit(mtk_mmsys_exit); +module_platform_driver(mtk_mmsys_drv); MODULE_AUTHOR("Yongqiang Niu "); MODULE_DESCRIPTION("MediaTek SoC MMSYS driver"); -- cgit v1.2.3 From 0fe09bf32a79933c741118a7346711c2a7d05d05 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 22 Feb 2023 10:42:47 +0100 Subject: soc: mediatek: mtk-mmsys: Compress of_device_id array entries Compress entries of the of_match_mtk_mmsys array to reduce the amount of lines and increase readability; this brings us to a maximum of 90 columns. While at it, also add a sentinel comment to the last entry for the sole purpose of consistency. This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20230222094253.23678-4-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-mmsys.c | 83 +++++++++------------------------------- 1 file changed, 18 insertions(+), 65 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index d698d7a3b985..a6bd934b6e5c 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -416,71 +416,24 @@ static int mtk_mmsys_remove(struct platform_device *pdev) } static const struct of_device_id of_match_mtk_mmsys[] = { - { - .compatible = "mediatek,mt2701-mmsys", - .data = &mt2701_mmsys_driver_data, - }, - { - .compatible = "mediatek,mt2712-mmsys", - .data = &mt2712_mmsys_driver_data, - }, - { - .compatible = "mediatek,mt6779-mmsys", - .data = &mt6779_mmsys_driver_data, - }, - { - .compatible = "mediatek,mt6797-mmsys", - .data = &mt6797_mmsys_driver_data, - }, - { - .compatible = "mediatek,mt8167-mmsys", - .data = &mt8167_mmsys_driver_data, - }, - { - .compatible = "mediatek,mt8173-mmsys", - .data = &mt8173_mmsys_driver_data, - }, - { - .compatible = "mediatek,mt8183-mmsys", - .data = &mt8183_mmsys_driver_data, - }, - { - .compatible = "mediatek,mt8186-mmsys", - .data = &mt8186_mmsys_driver_data, - }, - { - .compatible = "mediatek,mt8188-vdosys0", - .data = &mt8188_vdosys0_driver_data, - }, - { - .compatible = "mediatek,mt8192-mmsys", - .data = &mt8192_mmsys_driver_data, - }, - { /* deprecated compatible */ - .compatible = "mediatek,mt8195-mmsys", - .data = &mt8195_vdosys0_driver_data, - }, - { - .compatible = "mediatek,mt8195-vdosys0", - .data = &mt8195_vdosys0_driver_data, - }, - { - .compatible = "mediatek,mt8195-vdosys1", - .data = &mt8195_vdosys1_driver_data, - }, - { - .compatible = "mediatek,mt8195-vppsys0", - .data = &mt8195_vppsys0_driver_data, - }, - { - .compatible = "mediatek,mt8195-vppsys1", - .data = &mt8195_vppsys1_driver_data, - }, - { - .compatible = "mediatek,mt8365-mmsys", - .data = &mt8365_mmsys_driver_data, - }, - { } + { .compatible = "mediatek,mt2701-mmsys", .data = &mt2701_mmsys_driver_data }, + { .compatible = "mediatek,mt2712-mmsys", .data = &mt2712_mmsys_driver_data }, + { .compatible = "mediatek,mt6779-mmsys", .data = &mt6779_mmsys_driver_data }, + { .compatible = "mediatek,mt6797-mmsys", .data = &mt6797_mmsys_driver_data }, + { .compatible = "mediatek,mt8167-mmsys", .data = &mt8167_mmsys_driver_data }, + { .compatible = "mediatek,mt8173-mmsys", .data = &mt8173_mmsys_driver_data }, + { .compatible = "mediatek,mt8183-mmsys", .data = &mt8183_mmsys_driver_data }, + { .compatible = "mediatek,mt8186-mmsys", .data = &mt8186_mmsys_driver_data }, + { .compatible = "mediatek,mt8188-vdosys0", .data = &mt8188_vdosys0_driver_data }, + { .compatible = "mediatek,mt8192-mmsys", .data = &mt8192_mmsys_driver_data }, + /* "mediatek,mt8195-mmsys" compatible is deprecated */ + { .compatible = "mediatek,mt8195-mmsys", .data = &mt8195_vdosys0_driver_data }, + { .compatible = "mediatek,mt8195-vdosys0", .data = &mt8195_vdosys0_driver_data }, + { .compatible = "mediatek,mt8195-vdosys1", .data = &mt8195_vdosys1_driver_data }, + { .compatible = "mediatek,mt8195-vppsys0", .data = &mt8195_vppsys0_driver_data }, + { .compatible = "mediatek,mt8195-vppsys1", .data = &mt8195_vppsys1_driver_data }, + { .compatible = "mediatek,mt8365-mmsys", .data = &mt8365_mmsys_driver_data }, + { /* sentinel */ } }; static struct platform_driver mtk_mmsys_drv = { -- cgit v1.2.3 From 10687632307c08d9183b1859a01a5848e50e4334 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 22 Feb 2023 10:42:48 +0100 Subject: soc: mediatek: mtk-mmsys: Add MODULE_DEVICE_TABLE() to allow auto-load Allow module auto-loading by adding a MODULE_DEVICE_TABLE for of_match_mmsys. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20230222094253.23678-5-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-mmsys.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index a6bd934b6e5c..0fa6c31f774c 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -435,6 +435,7 @@ static const struct of_device_id of_match_mtk_mmsys[] = { { .compatible = "mediatek,mt8365-mmsys", .data = &mt8365_mmsys_driver_data }, { /* sentinel */ } }; +MODULE_DEVICE_TABLE(of, of_match_mtk_mmsys); static struct platform_driver mtk_mmsys_drv = { .driver = { -- cgit v1.2.3 From 00ee1db7016b73ecd3214d6dc2df4fa02beb694d Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 22 Feb 2023 10:42:49 +0100 Subject: soc: mediatek: mtk-mutex: Compress of_device_id array entries Compress entries of the of_match_mtk_mmsys array to reduce the amount of lines and increase readability; this brings us to a maximum of 95 columns. While at it, also add a sentinel comment to the last entry for the sole purpose of consistency. This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230222094253.23678-6-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-mutex.c | 41 ++++++++++++++-------------------------- 1 file changed, 14 insertions(+), 27 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index 7751527fc30d..a59fde2bdcba 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -1040,33 +1040,20 @@ static int mtk_mutex_probe(struct platform_device *pdev) } static const struct of_device_id mutex_driver_dt_match[] = { - { .compatible = "mediatek,mt2701-disp-mutex", - .data = &mt2701_mutex_driver_data}, - { .compatible = "mediatek,mt2712-disp-mutex", - .data = &mt2712_mutex_driver_data}, - { .compatible = "mediatek,mt6795-disp-mutex", - .data = &mt6795_mutex_driver_data}, - { .compatible = "mediatek,mt8167-disp-mutex", - .data = &mt8167_mutex_driver_data}, - { .compatible = "mediatek,mt8173-disp-mutex", - .data = &mt8173_mutex_driver_data}, - { .compatible = "mediatek,mt8183-disp-mutex", - .data = &mt8183_mutex_driver_data}, - { .compatible = "mediatek,mt8186-disp-mutex", - .data = &mt8186_mutex_driver_data}, - { .compatible = "mediatek,mt8186-mdp3-mutex", - .data = &mt8186_mdp_mutex_driver_data}, - { .compatible = "mediatek,mt8188-disp-mutex", - .data = &mt8188_mutex_driver_data}, - { .compatible = "mediatek,mt8192-disp-mutex", - .data = &mt8192_mutex_driver_data}, - { .compatible = "mediatek,mt8195-disp-mutex", - .data = &mt8195_mutex_driver_data}, - { .compatible = "mediatek,mt8195-vpp-mutex", - .data = &mt8195_vpp_mutex_driver_data}, - { .compatible = "mediatek,mt8365-disp-mutex", - .data = &mt8365_mutex_driver_data}, - {}, + { .compatible = "mediatek,mt2701-disp-mutex", .data = &mt2701_mutex_driver_data }, + { .compatible = "mediatek,mt2712-disp-mutex", .data = &mt2712_mutex_driver_data }, + { .compatible = "mediatek,mt6795-disp-mutex", .data = &mt6795_mutex_driver_data }, + { .compatible = "mediatek,mt8167-disp-mutex", .data = &mt8167_mutex_driver_data }, + { .compatible = "mediatek,mt8173-disp-mutex", .data = &mt8173_mutex_driver_data }, + { .compatible = "mediatek,mt8183-disp-mutex", .data = &mt8183_mutex_driver_data }, + { .compatible = "mediatek,mt8186-disp-mutex", .data = &mt8186_mutex_driver_data }, + { .compatible = "mediatek,mt8186-mdp3-mutex", .data = &mt8186_mdp_mutex_driver_data }, + { .compatible = "mediatek,mt8188-disp-mutex", .data = &mt8188_mutex_driver_data }, + { .compatible = "mediatek,mt8192-disp-mutex", .data = &mt8192_mutex_driver_data }, + { .compatible = "mediatek,mt8195-disp-mutex", .data = &mt8195_mutex_driver_data }, + { .compatible = "mediatek,mt8195-vpp-mutex", .data = &mt8195_vpp_mutex_driver_data }, + { .compatible = "mediatek,mt8365-disp-mutex", .data = &mt8365_mutex_driver_data }, + { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, mutex_driver_dt_match); -- cgit v1.2.3 From dc36768d05bc877b1227b09af1bb304a28284ce3 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 22 Feb 2023 10:42:50 +0100 Subject: soc: mediatek: mtk-mutex: Replace max handles number with definition Replace the magic number "10", defining the maximum number of supported handles with a MTK_MUTEX_MAX_HANDLES definition. While at it, also change the type for `id` from a signed integer to a unsigned 8 bits integer to save some (small) memory footprint, as this number is never higher than 10. This cleanup brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20230222094253.23678-7-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-mutex.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index a59fde2bdcba..b68bb87bc365 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -14,6 +14,8 @@ #include #include +#define MTK_MUTEX_MAX_HANDLES 10 + #define MT2701_MUTEX0_MOD0 0x2c #define MT2701_MUTEX0_SOF0 0x30 #define MT8183_MUTEX0_MOD0 0x30 @@ -282,7 +284,7 @@ #define MT8195_MUTEX_EOF_DPI1 (MT8195_MUTEX_SOF_DPI1 << 7) struct mtk_mutex { - int id; + u8 id; bool claimed; }; @@ -312,7 +314,7 @@ struct mtk_mutex_ctx { struct device *dev; struct clk *clk; void __iomem *regs; - struct mtk_mutex mutex[10]; + struct mtk_mutex mutex[MTK_MUTEX_MAX_HANDLES]; const struct mtk_mutex_data *data; phys_addr_t addr; struct cmdq_client_reg cmdq_reg; @@ -717,7 +719,7 @@ struct mtk_mutex *mtk_mutex_get(struct device *dev) struct mtk_mutex_ctx *mtx = dev_get_drvdata(dev); int i; - for (i = 0; i < 10; i++) + for (i = 0; i < MTK_MUTEX_MAX_HANDLES; i++) if (!mtx->mutex[i].claimed) { mtx->mutex[i].claimed = true; return &mtx->mutex[i]; @@ -1007,7 +1009,7 @@ static int mtk_mutex_probe(struct platform_device *pdev) if (!mtx) return -ENOMEM; - for (i = 0; i < 10; i++) + for (i = 0; i < MTK_MUTEX_MAX_HANDLES; i++) mtx->mutex[i].id = i; mtx->data = of_device_get_match_data(dev); -- cgit v1.2.3 From 1fccd1ef65b2b100b53b534894366f575b390e70 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 22 Feb 2023 10:42:51 +0100 Subject: soc: mediatek: mtk-mutex: Use module_platform_driver() macro Replace open-coded init/exit calls with the module_platform_driver() macro being equivalent. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20230222094253.23678-8-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-mutex.c | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index b68bb87bc365..b106f3d23e0d 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -1067,19 +1067,7 @@ static struct platform_driver mtk_mutex_driver = { .of_match_table = mutex_driver_dt_match, }, }; - -static int __init mtk_mutex_init(void) -{ - return platform_driver_register(&mtk_mutex_driver); -} - -static void __exit mtk_mutex_exit(void) -{ - platform_driver_unregister(&mtk_mutex_driver); -} - -module_init(mtk_mutex_init); -module_exit(mtk_mutex_exit); +module_platform_driver(mtk_mutex_driver); MODULE_AUTHOR("Yongqiang Niu "); MODULE_DESCRIPTION("MediaTek SoC MUTEX driver"); -- cgit v1.2.3 From b34884b4c878a6ad2a4f70d7c88ef60ac39ad408 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 22 Feb 2023 10:42:53 +0100 Subject: soc: mediatek: Cleanup ifdefs for IS_REACHABLE(CONFIG_MTK_CMDQ) Now that the mtk-cmdq.h header contains inline functions for cases in which the driver is not enabled (either module or built-in), we can safely go on with cleaning up ifdefs for CMDQ handling. This also shows in a clearer manner that writing through CMDQ HW is optional and used only for performance purposes when/where wanted, needed and/or required. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20230222094253.23678-10-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-mmsys.c | 22 +++++++++------------- drivers/soc/mediatek/mtk-mutex.c | 15 +++------------ 2 files changed, 12 insertions(+), 25 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index 0fa6c31f774c..b84485670f91 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -131,21 +131,18 @@ struct mtk_mmsys { static void mtk_mmsys_update_bits(struct mtk_mmsys *mmsys, u32 offset, u32 mask, u32 val, struct cmdq_pkt *cmdq_pkt) { + int ret; u32 tmp; -#if IS_REACHABLE(CONFIG_MTK_CMDQ) - if (cmdq_pkt) { - if (mmsys->cmdq_base.size == 0) { - pr_err("mmsys lose gce property, failed to update mmsys bits with cmdq"); + if (mmsys->cmdq_base.size && cmdq_pkt) { + ret = cmdq_pkt_write_mask(cmdq_pkt, mmsys->cmdq_base.subsys, + mmsys->cmdq_base.offset + offset, val, + mask); + if (ret) + pr_debug("CMDQ unavailable: using CPU write\n"); + else return; - } - cmdq_pkt_write_mask(cmdq_pkt, mmsys->cmdq_base.subsys, - mmsys->cmdq_base.offset + offset, val, - mask); - return; } -#endif - tmp = readl_relaxed(mmsys->regs + offset); tmp = (tmp & ~mask) | (val & mask); writel_relaxed(tmp, mmsys->regs + offset); @@ -376,11 +373,10 @@ static int mtk_mmsys_probe(struct platform_device *pdev) } } -#if IS_REACHABLE(CONFIG_MTK_CMDQ) + /* CMDQ is optional */ ret = cmdq_dev_get_client_reg(dev, &mmsys->cmdq_base, 0); if (ret) dev_dbg(dev, "No mediatek,gce-client-reg!\n"); -#endif platform_set_drvdata(pdev, mmsys); diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index b106f3d23e0d..b92cffec7be7 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -871,23 +871,18 @@ int mtk_mutex_enable_by_cmdq(struct mtk_mutex *mutex, void *pkt) { struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, mutex[mutex->id]); -#if IS_REACHABLE(CONFIG_MTK_CMDQ) struct cmdq_pkt *cmdq_pkt = (struct cmdq_pkt *)pkt; WARN_ON(&mtx->mutex[mutex->id] != mutex); if (!mtx->cmdq_reg.size) { dev_err(mtx->dev, "mediatek,gce-client-reg hasn't been set"); - return -EINVAL; + return -ENODEV; } cmdq_pkt_write(cmdq_pkt, mtx->cmdq_reg.subsys, mtx->addr + DISP_REG_MUTEX_EN(mutex->id), 1); return 0; -#else - dev_err(mtx->dev, "Not support for enable MUTEX by CMDQ"); - return -ENODEV; -#endif } EXPORT_SYMBOL_GPL(mtk_mutex_enable_by_cmdq); @@ -1000,10 +995,7 @@ static int mtk_mutex_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct mtk_mutex_ctx *mtx; struct resource *regs; - int i; -#if IS_REACHABLE(CONFIG_MTK_CMDQ) - int ret; -#endif + int i, ret; mtx = devm_kzalloc(dev, sizeof(*mtx), GFP_KERNEL); if (!mtx) @@ -1030,11 +1022,10 @@ static int mtk_mutex_probe(struct platform_device *pdev) } mtx->addr = regs->start; -#if IS_REACHABLE(CONFIG_MTK_CMDQ) + /* CMDQ is optional */ ret = cmdq_dev_get_client_reg(dev, &mtx->cmdq_reg, 0); if (ret) dev_dbg(dev, "No mediatek,gce-client-reg!\n"); -#endif platform_set_drvdata(pdev, mtx); -- cgit v1.2.3 From 2a0a8d8700ef4f75b1b3e87b3b314b07246b4c27 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 9 Mar 2023 11:26:16 +0100 Subject: soc: mediatek: mtk-mmsys: Split out MT8173 mmsys DDP routing table MT2701, MT2712 and MT8173 were relying on a "default" DDP I/O routing table, describing all of the possible connections between display block components: while this is definitely working it's suboptimal for the actual routing description, as we may be enabling outputs and inputs that are not needed, possibly impacting on actual DDP performance other than slightly prolonging boot times by having to parse a table that is bigger than needed. Seen that all of the other supported SoCs have got their own table and seen that a comment in mtk-mmsys.h explicitly mentions that the wanted way is to have one table per SoC, create a new routing table that is specifically tailored to MT8173 and, while at it, remove mentions to said SoC from the comment in mtk-mmsys.h. Signed-off-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230309102618.114157-2-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mt8173-mmsys.h | 95 +++++++++++++++++++++++++++++++++++++ drivers/soc/mediatek/mtk-mmsys.c | 5 +- drivers/soc/mediatek/mtk-mmsys.h | 2 +- 3 files changed, 99 insertions(+), 3 deletions(-) create mode 100644 drivers/soc/mediatek/mt8173-mmsys.h (limited to 'drivers') diff --git a/drivers/soc/mediatek/mt8173-mmsys.h b/drivers/soc/mediatek/mt8173-mmsys.h new file mode 100644 index 000000000000..9d24e381271e --- /dev/null +++ b/drivers/soc/mediatek/mt8173-mmsys.h @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __SOC_MEDIATEK_MT8173_MMSYS_H +#define __SOC_MEDIATEK_MT8173_MMSYS_H + +#define MT8173_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN 0x040 +#define MT8173_DISP_REG_CONFIG_DISP_OVL1_MOUT_EN 0x044 +#define MT8173_DISP_REG_CONFIG_DISP_OD_MOUT_EN 0x048 +#define MT8173_DISP_REG_CONFIG_DISP_GAMMA_MOUT_EN 0x04c +#define MT8173_DISP_REG_CONFIG_DISP_UFOE_MOUT_EN 0x050 +#define MT8173_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN 0x084 +#define MT8173_DISP_REG_CONFIG_DISP_COLOR1_SEL_IN 0x088 +#define MT8173_DISP_REG_CONFIG_DISP_AAL_SEL_IN 0x08c +#define MT8173_DISP_REG_CONFIG_DISP_UFOE_SEL_IN 0x0a0 +#define MT8173_DISP_REG_CONFIG_DSI0_SEL_IN 0x0a4 +#define MT8173_DISP_REG_CONFIG_DPI_SEL_IN 0x0ac +#define MT8173_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN 0x0b0 +#define MT8173_DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN 0x0c8 +#define MT8173_DISP_REG_CONFIG_DISP_COLOR0_SOUT_SEL_IN 0x0bc + +#define MT8173_AAL_SEL_IN_MERGE BIT(0) +#define MT8173_COLOR0_SEL_IN_OVL0 BIT(0) +#define MT8173_COLOR0_SOUT_MERGE BIT(0) +#define MT8173_DPI0_SEL_IN_MASK GENMASK(1, 0) +#define MT8173_DPI0_SEL_IN_RDMA1 BIT(0) +#define MT8173_DSI0_SEL_IN_UFOE BIT(0) +#define MT8173_GAMMA_MOUT_EN_RDMA1 BIT(0) +#define MT8173_OD0_MOUT_EN_RDMA0 BIT(0) +#define MT8173_OVL0_MOUT_EN_COLOR0 BIT(0) +#define MT8173_OVL1_MOUT_EN_COLOR1 BIT(0) +#define MT8173_UFOE_MOUT_EN_DSI0 BIT(0) +#define MT8173_UFOE_SEL_IN_RDMA0 BIT(0) +#define MT8173_RDMA0_SOUT_COLOR0 BIT(0) + +static const struct mtk_mmsys_routes mt8173_mmsys_routing_table[] = { + { + DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0, + MT8173_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN, + MT8173_OVL0_MOUT_EN_COLOR0, MT8173_OVL0_MOUT_EN_COLOR0 + }, { + DDP_COMPONENT_OD0, DDP_COMPONENT_RDMA0, + MT8173_DISP_REG_CONFIG_DISP_OD_MOUT_EN, + MT8173_OD0_MOUT_EN_RDMA0, MT8173_OD0_MOUT_EN_RDMA0 + }, { + DDP_COMPONENT_UFOE, DDP_COMPONENT_DSI0, + MT8173_DISP_REG_CONFIG_DISP_UFOE_MOUT_EN, + MT8173_UFOE_MOUT_EN_DSI0, MT8173_UFOE_MOUT_EN_DSI0 + }, { + DDP_COMPONENT_COLOR0, DDP_COMPONENT_AAL0, + MT8173_DISP_REG_CONFIG_DISP_COLOR0_SOUT_SEL_IN, + MT8173_COLOR0_SOUT_MERGE, 0 /* SOUT to AAL */ + }, { + DDP_COMPONENT_RDMA0, DDP_COMPONENT_UFOE, + MT8173_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN, + MT8173_RDMA0_SOUT_COLOR0, 0 /* SOUT to UFOE */ + }, { + DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0, + MT8173_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN, + MT8173_COLOR0_SEL_IN_OVL0, MT8173_COLOR0_SEL_IN_OVL0 + }, { + DDP_COMPONENT_AAL0, DDP_COMPONENT_COLOR0, + MT8173_DISP_REG_CONFIG_DISP_AAL_SEL_IN, + MT8173_AAL_SEL_IN_MERGE, 0 /* SEL_IN from COLOR0 */ + }, { + DDP_COMPONENT_RDMA0, DDP_COMPONENT_UFOE, + MT8173_DISP_REG_CONFIG_DISP_UFOE_SEL_IN, + MT8173_UFOE_SEL_IN_RDMA0, 0 /* SEL_IN from RDMA0 */ + }, { + DDP_COMPONENT_UFOE, DDP_COMPONENT_DSI0, + MT8173_DISP_REG_CONFIG_DSI0_SEL_IN, + MT8173_DSI0_SEL_IN_UFOE, 0, /* SEL_IN from UFOE */ + }, { + DDP_COMPONENT_OVL1, DDP_COMPONENT_COLOR1, + MT8173_DISP_REG_CONFIG_DISP_OVL1_MOUT_EN, + MT8173_OVL1_MOUT_EN_COLOR1, MT8173_OVL1_MOUT_EN_COLOR1 + }, { + DDP_COMPONENT_GAMMA, DDP_COMPONENT_RDMA1, + MT8173_DISP_REG_CONFIG_DISP_GAMMA_MOUT_EN, + MT8173_GAMMA_MOUT_EN_RDMA1, MT8173_GAMMA_MOUT_EN_RDMA1 + }, { + DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0, + MT8173_DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN, + RDMA1_SOUT_MASK, RDMA1_SOUT_DPI0 + }, { + DDP_COMPONENT_OVL1, DDP_COMPONENT_COLOR1, + MT8173_DISP_REG_CONFIG_DISP_COLOR1_SEL_IN, + COLOR1_SEL_IN_OVL1, COLOR1_SEL_IN_OVL1 + }, { + DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0, + MT8173_DISP_REG_CONFIG_DPI_SEL_IN, + MT8173_DPI0_SEL_IN_MASK, MT8173_DPI0_SEL_IN_RDMA1 + } +}; + +#endif /* __SOC_MEDIATEK_MT8173_MMSYS_H */ diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index b84485670f91..d5844aff0621 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -15,6 +15,7 @@ #include "mtk-mmsys.h" #include "mt8167-mmsys.h" +#include "mt8173-mmsys.h" #include "mt8183-mmsys.h" #include "mt8186-mmsys.h" #include "mt8188-mmsys.h" @@ -52,8 +53,8 @@ static const struct mtk_mmsys_driver_data mt8167_mmsys_driver_data = { static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { .clk_driver = "clk-mt8173-mm", - .routes = mmsys_default_routing_table, - .num_routes = ARRAY_SIZE(mmsys_default_routing_table), + .routes = mt8173_mmsys_routing_table, + .num_routes = ARRAY_SIZE(mt8173_mmsys_routing_table), .sw0_rst_offset = MT8183_MMSYS_SW0_RST_B, .num_resets = 32, }; diff --git a/drivers/soc/mediatek/mtk-mmsys.h b/drivers/soc/mediatek/mtk-mmsys.h index 56f8cc3a97b7..6725403d2e3a 100644 --- a/drivers/soc/mediatek/mtk-mmsys.h +++ b/drivers/soc/mediatek/mtk-mmsys.h @@ -96,7 +96,7 @@ struct mtk_mmsys_driver_data { }; /* - * Routes in mt8173, mt2701, mt2712 are different. That means + * Routes in mt2701 and mt2712 are different. That means * in the same register address, it controls different input/output * selection for each SoC. But, right now, they use the same table as * default routes meet their requirements. But we don't have the complete -- cgit v1.2.3 From b427d857a8eae5cd2d22469371c4625c59dfbb2f Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 9 Mar 2023 11:26:17 +0100 Subject: soc: mediatek: mtk-mmsys: Change MT8173 num_resets to 64 The MT8173 SoC has 64 MMSYS resets, split in two contiguous 32-bits registers, MMSYS_SW0_RST_B (0x140) and MMSYS_SW1_RST_B (0x144), as also stated in the downstream kernel for the Amazon Fire TV 2 (Sloane) in the ddp_reg.h header. Please note that managing more than 32 reset bits is supported since commit 2004f8be8483 ("soc: mediatek: mmsys: add mmsys for support 64 reset bits") This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230309102618.114157-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-mmsys.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index d5844aff0621..c4eeab99756b 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -56,7 +56,7 @@ static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { .routes = mt8173_mmsys_routing_table, .num_routes = ARRAY_SIZE(mt8173_mmsys_routing_table), .sw0_rst_offset = MT8183_MMSYS_SW0_RST_B, - .num_resets = 32, + .num_resets = 64, }; static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = { -- cgit v1.2.3 From e9a6f5bca5ea56f05d92a966034ed472408821b8 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 9 Mar 2023 11:26:18 +0100 Subject: soc: mediatek: mtk-mmsys: Add support for MT6795 Helio X10 Add MMSYS support for the MT6795 SoC using the same mmsys routing table as MT8173 as, for the currently supported usecases (DSI0, DPI0 with no WDMA), these are identical. Signed-off-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230309102618.114157-4-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-mmsys.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index c4eeab99756b..9619faa796e8 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -41,6 +41,14 @@ static const struct mtk_mmsys_driver_data mt6779_mmsys_driver_data = { .clk_driver = "clk-mt6779-mm", }; +static const struct mtk_mmsys_driver_data mt6795_mmsys_driver_data = { + .clk_driver = "clk-mt6795-mm", + .routes = mt8173_mmsys_routing_table, + .num_routes = ARRAY_SIZE(mt8173_mmsys_routing_table), + .sw0_rst_offset = MT8183_MMSYS_SW0_RST_B, + .num_resets = 64, +}; + static const struct mtk_mmsys_driver_data mt6797_mmsys_driver_data = { .clk_driver = "clk-mt6797-mm", }; @@ -416,6 +424,7 @@ static const struct of_device_id of_match_mtk_mmsys[] = { { .compatible = "mediatek,mt2701-mmsys", .data = &mt2701_mmsys_driver_data }, { .compatible = "mediatek,mt2712-mmsys", .data = &mt2712_mmsys_driver_data }, { .compatible = "mediatek,mt6779-mmsys", .data = &mt6779_mmsys_driver_data }, + { .compatible = "mediatek,mt6795-mmsys", .data = &mt6795_mmsys_driver_data }, { .compatible = "mediatek,mt6797-mmsys", .data = &mt6797_mmsys_driver_data }, { .compatible = "mediatek,mt8167-mmsys", .data = &mt8167_mmsys_driver_data }, { .compatible = "mediatek,mt8173-mmsys", .data = &mt8173_mmsys_driver_data }, -- cgit v1.2.3 From a73a7c41de593ea08f5a659b2b6ff4b5af493bbb Mon Sep 17 00:00:00 2001 From: Ye Xingchen Date: Fri, 24 Mar 2023 10:17:29 +0800 Subject: soc: mediatek: mutex: Use dev_err_probe() Replace the open-code with dev_err_probe() to simplify the code. Signed-off-by: Ye Xingchen Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/202303241017290414354@zte.com.cn Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/mtk-mutex.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index b92cffec7be7..26f3d9a41496 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -1008,11 +1008,8 @@ static int mtk_mutex_probe(struct platform_device *pdev) if (!mtx->data->no_clk) { mtx->clk = devm_clk_get(dev, NULL); - if (IS_ERR(mtx->clk)) { - if (PTR_ERR(mtx->clk) != -EPROBE_DEFER) - dev_err(dev, "Failed to get clock\n"); - return PTR_ERR(mtx->clk); - } + if (IS_ERR(mtx->clk)) + return dev_err_probe(dev, PTR_ERR(mtx->clk), "Failed to get clock\n"); } mtx->regs = devm_platform_get_and_ioremap_resource(pdev, 0, ®s); -- cgit v1.2.3 From f3040daab8104ac68e2b241bc93288f63b88a3c7 Mon Sep 17 00:00:00 2001 From: Jeffrey Kardatzke Date: Fri, 31 Mar 2023 11:35:47 -0700 Subject: tee: optee: Add SMC for loading OP-TEE image Adds an SMC call that will pass an OP-TEE binary image to EL3 and instruct it to load it as the BL32 payload. This works in conjunction with a feature added to Trusted Firmware for ARMv8 and above architectures that supports this. The main purpose of this change is to facilitate updating the OP-TEE component on devices via a rootfs change rather than having to do a firmware update. Further details are linked to in the Kconfig file. Signed-off-by: Jeffrey Kardatzke Reviewed-by: Sumit Garg Signed-off-by: Jeffrey Kardatzke Signed-off-by: Jens Wiklander --- Documentation/staging/tee.rst | 53 ++++++++++++++++ drivers/tee/optee/Kconfig | 17 ++++++ drivers/tee/optee/optee_msg.h | 12 ++++ drivers/tee/optee/optee_smc.h | 24 ++++++++ drivers/tee/optee/smc_abi.c | 137 ++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 243 insertions(+) (limited to 'drivers') diff --git a/Documentation/staging/tee.rst b/Documentation/staging/tee.rst index 498343c7ab08..22baa077a3b9 100644 --- a/Documentation/staging/tee.rst +++ b/Documentation/staging/tee.rst @@ -214,6 +214,57 @@ call is done from the thread assisting the interrupt handler. This is a building block for OP-TEE OS in secure world to implement the top half and bottom half style of device drivers. +OPTEE_INSECURE_LOAD_IMAGE Kconfig option +---------------------------------------- + +The OPTEE_INSECURE_LOAD_IMAGE Kconfig option enables the ability to load the +BL32 OP-TEE image from the kernel after the kernel boots, rather than loading +it from the firmware before the kernel boots. This also requires enabling the +corresponding option in Trusted Firmware for Arm. The Trusted Firmware for Arm +documentation [8] explains the security threat associated with enabling this as +well as mitigations at the firmware and platform level. + +There are additional attack vectors/mitigations for the kernel that should be +addressed when using this option. + +1. Boot chain security. + + * Attack vector: Replace the OP-TEE OS image in the rootfs to gain control of + the system. + + * Mitigation: There must be boot chain security that verifies the kernel and + rootfs, otherwise an attacker can modify the loaded OP-TEE binary by + modifying it in the rootfs. + +2. Alternate boot modes. + + * Attack vector: Using an alternate boot mode (i.e. recovery mode), the + OP-TEE driver isn't loaded, leaving the SMC hole open. + + * Mitigation: If there are alternate methods of booting the device, such as a + recovery mode, it should be ensured that the same mitigations are applied + in that mode. + +3. Attacks prior to SMC invocation. + + * Attack vector: Code that is executed prior to issuing the SMC call to load + OP-TEE can be exploited to then load an alternate OS image. + + * Mitigation: The OP-TEE driver must be loaded before any potential attack + vectors are opened up. This should include mounting of any modifiable + filesystems, opening of network ports or communicating with external + devices (e.g. USB). + +4. Blocking SMC call to load OP-TEE. + + * Attack vector: Prevent the driver from being probed, so the SMC call to + load OP-TEE isn't executed when desired, leaving it open to being executed + later and loading a modified OS. + + * Mitigation: It is recommended to build the OP-TEE driver as builtin driver + rather than as a module to prevent exploits that may cause the module to + not be loaded. + AMD-TEE driver ============== @@ -309,3 +360,5 @@ References [6] include/linux/psp-tee.h [7] drivers/tee/amdtee/amdtee_if.h + +[8] https://trustedfirmware-a.readthedocs.io/en/latest/threat_model/threat_model.html diff --git a/drivers/tee/optee/Kconfig b/drivers/tee/optee/Kconfig index f121c224e682..70898bbd5809 100644 --- a/drivers/tee/optee/Kconfig +++ b/drivers/tee/optee/Kconfig @@ -7,3 +7,20 @@ config OPTEE help This implements the OP-TEE Trusted Execution Environment (TEE) driver. + +config OPTEE_INSECURE_LOAD_IMAGE + bool "Load OP-TEE image as firmware" + default n + depends on OPTEE && ARM64 + help + This loads the BL32 image for OP-TEE as firmware when the driver is + probed. This returns -EPROBE_DEFER until the firmware is loadable from + the filesystem which is determined by checking the system_state until + it is in SYSTEM_RUNNING. This also requires enabling the corresponding + option in Trusted Firmware for Arm. The documentation there explains + the security threat associated with enabling this as well as + mitigations at the firmware and platform level. + https://trustedfirmware-a.readthedocs.io/en/latest/threat_model/threat_model.html + + Additional documentation on kernel security risks are at + Documentation/staging/tee.rst. diff --git a/drivers/tee/optee/optee_msg.h b/drivers/tee/optee/optee_msg.h index 70e9cc2ee96b..e8840a82b983 100644 --- a/drivers/tee/optee/optee_msg.h +++ b/drivers/tee/optee/optee_msg.h @@ -241,11 +241,23 @@ struct optee_msg_arg { * 384fb3e0-e7f8-11e3-af63-0002a5d5c51b. * Represented in 4 32-bit words in OPTEE_MSG_UID_0, OPTEE_MSG_UID_1, * OPTEE_MSG_UID_2, OPTEE_MSG_UID_3. + * + * In the case where the OP-TEE image is loaded by the kernel, this will + * initially return an alternate UID to reflect that we are communicating with + * the TF-A image loading service at that time instead of OP-TEE. That UID is: + * a3fbeab1-1246-315d-c7c4-06b9c03cbea4. + * Represented in 4 32-bit words in OPTEE_MSG_IMAGE_LOAD_UID_0, + * OPTEE_MSG_IMAGE_LOAD_UID_1, OPTEE_MSG_IMAGE_LOAD_UID_2, + * OPTEE_MSG_IMAGE_LOAD_UID_3. */ #define OPTEE_MSG_UID_0 0x384fb3e0 #define OPTEE_MSG_UID_1 0xe7f811e3 #define OPTEE_MSG_UID_2 0xaf630002 #define OPTEE_MSG_UID_3 0xa5d5c51b +#define OPTEE_MSG_IMAGE_LOAD_UID_0 0xa3fbeab1 +#define OPTEE_MSG_IMAGE_LOAD_UID_1 0x1246315d +#define OPTEE_MSG_IMAGE_LOAD_UID_2 0xc7c406b9 +#define OPTEE_MSG_IMAGE_LOAD_UID_3 0xc03cbea4 #define OPTEE_MSG_FUNCID_CALLS_UID 0xFF01 /* diff --git a/drivers/tee/optee/optee_smc.h b/drivers/tee/optee/optee_smc.h index 73b5e7760d10..7d9fa426505b 100644 --- a/drivers/tee/optee/optee_smc.h +++ b/drivers/tee/optee/optee_smc.h @@ -104,6 +104,30 @@ struct optee_smc_call_get_os_revision_result { unsigned long reserved1; }; +/* + * Load Trusted OS from optee/tee.bin in the Linux firmware. + * + * WARNING: Use this cautiously as it could lead to insecure loading of the + * Trusted OS. + * This SMC instructs EL3 to load a binary and execute it as the Trusted OS. + * + * Call register usage: + * a0 SMC Function ID, OPTEE_SMC_CALL_LOAD_IMAGE + * a1 Upper 32bit of a 64bit size for the payload + * a2 Lower 32bit of a 64bit size for the payload + * a3 Upper 32bit of the physical address for the payload + * a4 Lower 32bit of the physical address for the payload + * + * The payload is in the OP-TEE image format. + * + * Returns result in a0, 0 on success and an error code otherwise. + */ +#define OPTEE_SMC_FUNCID_LOAD_IMAGE 2 +#define OPTEE_SMC_CALL_LOAD_IMAGE \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_TRUSTED_OS_END, \ + OPTEE_SMC_FUNCID_LOAD_IMAGE) + /* * Call with struct optee_msg_arg as argument * diff --git a/drivers/tee/optee/smc_abi.c b/drivers/tee/optee/smc_abi.c index a1c1fa1a9c28..6e1f023d50c6 100644 --- a/drivers/tee/optee/smc_abi.c +++ b/drivers/tee/optee/smc_abi.c @@ -7,10 +7,13 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include +#include #include +#include #include #include #include +#include #include #include #include @@ -1149,6 +1152,22 @@ static bool optee_msg_api_uid_is_optee_api(optee_invoke_fn *invoke_fn) return false; } +#ifdef CONFIG_OPTEE_INSECURE_LOAD_IMAGE +static bool optee_msg_api_uid_is_optee_image_load(optee_invoke_fn *invoke_fn) +{ + struct arm_smccc_res res; + + invoke_fn(OPTEE_SMC_CALLS_UID, 0, 0, 0, 0, 0, 0, 0, &res); + + if (res.a0 == OPTEE_MSG_IMAGE_LOAD_UID_0 && + res.a1 == OPTEE_MSG_IMAGE_LOAD_UID_1 && + res.a2 == OPTEE_MSG_IMAGE_LOAD_UID_2 && + res.a3 == OPTEE_MSG_IMAGE_LOAD_UID_3) + return true; + return false; +} +#endif + static void optee_msg_get_os_revision(optee_invoke_fn *invoke_fn) { union { @@ -1354,6 +1373,120 @@ static void optee_shutdown(struct platform_device *pdev) optee_disable_shm_cache(optee); } +#ifdef CONFIG_OPTEE_INSECURE_LOAD_IMAGE + +#define OPTEE_FW_IMAGE "optee/tee.bin" + +static optee_invoke_fn *cpuhp_invoke_fn; + +static int optee_cpuhp_probe(unsigned int cpu) +{ + /* + * Invoking a call on a CPU will cause OP-TEE to perform the required + * setup for that CPU. Just invoke the call to get the UID since that + * has no side effects. + */ + if (optee_msg_api_uid_is_optee_api(cpuhp_invoke_fn)) + return 0; + else + return -EINVAL; +} + +static int optee_load_fw(struct platform_device *pdev, + optee_invoke_fn *invoke_fn) +{ + const struct firmware *fw = NULL; + struct arm_smccc_res res; + phys_addr_t data_pa; + u8 *data_buf = NULL; + u64 data_size; + u32 data_pa_high, data_pa_low; + u32 data_size_high, data_size_low; + int rc; + int hp_state; + + if (!optee_msg_api_uid_is_optee_image_load(invoke_fn)) + return 0; + + rc = request_firmware(&fw, OPTEE_FW_IMAGE, &pdev->dev); + if (rc) { + /* + * The firmware in the rootfs will not be accessible until we + * are in the SYSTEM_RUNNING state, so return EPROBE_DEFER until + * that point. + */ + if (system_state < SYSTEM_RUNNING) + return -EPROBE_DEFER; + goto fw_err; + } + + data_size = fw->size; + /* + * This uses the GFP_DMA flag to ensure we are allocated memory in the + * 32-bit space since TF-A cannot map memory beyond the 32-bit boundary. + */ + data_buf = kmalloc(fw->size, GFP_KERNEL | GFP_DMA); + if (!data_buf) { + rc = -ENOMEM; + goto fw_err; + } + memcpy(data_buf, fw->data, fw->size); + data_pa = virt_to_phys(data_buf); + reg_pair_from_64(&data_pa_high, &data_pa_low, data_pa); + reg_pair_from_64(&data_size_high, &data_size_low, data_size); + goto fw_load; + +fw_err: + pr_warn("image loading failed\n"); + data_pa_high = 0; + data_pa_low = 0; + data_size_high = 0; + data_size_low = 0; + +fw_load: + /* + * Always invoke the SMC, even if loading the image fails, to indicate + * to EL3 that we have passed the point where it should allow invoking + * this SMC. + */ + pr_warn("OP-TEE image loaded from kernel, this can be insecure"); + invoke_fn(OPTEE_SMC_CALL_LOAD_IMAGE, data_size_high, data_size_low, + data_pa_high, data_pa_low, 0, 0, 0, &res); + if (!rc) + rc = res.a0; + if (fw) + release_firmware(fw); + kfree(data_buf); + + if (!rc) { + /* + * We need to initialize OP-TEE on all other running cores as + * well. Any cores that aren't running yet will get initialized + * when they are brought up by the power management functions in + * TF-A which are registered by the OP-TEE SPD. Due to that we + * can un-register the callback right after registering it. + */ + cpuhp_invoke_fn = invoke_fn; + hp_state = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "optee:probe", + optee_cpuhp_probe, NULL); + if (hp_state < 0) { + pr_warn("Failed with CPU hotplug setup for OP-TEE"); + return -EINVAL; + } + cpuhp_remove_state(hp_state); + cpuhp_invoke_fn = NULL; + } + + return rc; +} +#else +static inline int optee_load_fw(struct platform_device *pdev, + optee_invoke_fn *invoke_fn) +{ + return 0; +} +#endif + static int optee_probe(struct platform_device *pdev) { optee_invoke_fn *invoke_fn; @@ -1372,6 +1505,10 @@ static int optee_probe(struct platform_device *pdev) if (IS_ERR(invoke_fn)) return PTR_ERR(invoke_fn); + rc = optee_load_fw(pdev, invoke_fn); + if (rc) + return rc; + if (!optee_msg_api_uid_is_optee_api(invoke_fn)) { pr_warn("api uid mismatch\n"); return -EINVAL; -- cgit v1.2.3 From 60b3a99a3b50c94814b84795e38e2161767ea277 Mon Sep 17 00:00:00 2001 From: Mikko Perttunen Date: Wed, 1 Mar 2023 15:47:55 +0200 Subject: firmware: tegra: bpmp: Fix error paths in debugfs Some error paths in mrq_debug_read and bpmp_debug_show would overwrite the return error code with a subsequent call to mrq_debug_close. Change the code to only change the error code if there was no prior error. Signed-off-by: Mikko Perttunen Signed-off-by: Thierry Reding --- drivers/firmware/tegra/bpmp-debugfs.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/firmware/tegra/bpmp-debugfs.c b/drivers/firmware/tegra/bpmp-debugfs.c index 3ca2b5d9e66f..6dfe3d34109e 100644 --- a/drivers/firmware/tegra/bpmp-debugfs.c +++ b/drivers/firmware/tegra/bpmp-debugfs.c @@ -193,7 +193,7 @@ static int mrq_debug_read(struct tegra_bpmp *bpmp, const char *name, }, }; u32 fd = 0, len = 0; - int remaining, err; + int remaining, err, close_err; mutex_lock(&bpmp_debug_lock); err = mrq_debug_open(bpmp, name, &fd, &len, 0); @@ -231,7 +231,9 @@ static int mrq_debug_read(struct tegra_bpmp *bpmp, const char *name, *nbytes = len; close: - err = mrq_debug_close(bpmp, fd); + close_err = mrq_debug_close(bpmp, fd); + if (!err) + err = close_err; out: mutex_unlock(&bpmp_debug_lock); return err; @@ -319,7 +321,7 @@ static int bpmp_debug_show(struct seq_file *m, void *p) }, }; u32 fd = 0, len = 0; - int remaining, err; + int remaining, err, close_err; filename = get_filename(bpmp, file, fnamebuf, sizeof(fnamebuf)); if (!filename) @@ -353,7 +355,9 @@ static int bpmp_debug_show(struct seq_file *m, void *p) } close: - err = mrq_debug_close(bpmp, fd); + close_err = mrq_debug_close(bpmp, fd); + if (!err) + err = close_err; out: mutex_unlock(&bpmp_debug_lock); return err; -- cgit v1.2.3 From 61228c9b240468dba55ef8a4ac93e777c810c68b Mon Sep 17 00:00:00 2001 From: Mikko Perttunen Date: Wed, 1 Mar 2023 15:47:56 +0200 Subject: soc/tegra: bpmp: Actually free memory on error path Within the error path, genpd->domains has not been set, so we need to pass the domains variable to kfree instead. Signed-off-by: Mikko Perttunen Signed-off-by: Thierry Reding --- drivers/soc/tegra/powergate-bpmp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/tegra/powergate-bpmp.c b/drivers/soc/tegra/powergate-bpmp.c index 8eaf50d0b6af..179ed895c279 100644 --- a/drivers/soc/tegra/powergate-bpmp.c +++ b/drivers/soc/tegra/powergate-bpmp.c @@ -286,7 +286,7 @@ remove: tegra_powergate_remove(powergate); } - kfree(genpd->domains); + kfree(domains); return err; } -- cgit v1.2.3 From 161e0f78b396823e8596ae5e709d93acd914dad3 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Mon, 6 Mar 2023 15:09:00 +0000 Subject: soc/tegra: pmc: Add the PMIC wake event for Tegra234 Add the PMIC wake event for Tegra234 that is used to bring the device out of system suspend for events such as an RTC alarm. Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding --- drivers/soc/tegra/pmc.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index cf4cfbf9f7c5..e3e87d5da9f5 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -4225,6 +4225,7 @@ static const char * const tegra234_reset_sources[] = { }; static const struct tegra_wake_event tegra234_wake_events[] = { + TEGRA_WAKE_IRQ("pmu", 24, 209), TEGRA_WAKE_GPIO("power", 29, 1, TEGRA234_AON_GPIO(EE, 4)), TEGRA_WAKE_IRQ("rtc", 73, 10), }; -- cgit v1.2.3 From cc026ccdd502c3709f06aadfde14d1eac6cc3763 Mon Sep 17 00:00:00 2001 From: Sushil Singh Date: Thu, 23 Mar 2023 18:43:24 +0530 Subject: soc/tegra: pmc: Add wake source interrupt for MGBE Add the GPIO wake interrupt for MGBE ethernet controller on Tegra234 SoC. Signed-off-by: Sushil Singh Signed-off-by: Thierry Reding --- drivers/soc/tegra/pmc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index e3e87d5da9f5..d478be88d580 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -3,7 +3,7 @@ * drivers/soc/tegra/pmc.c * * Copyright (c) 2010 Google, Inc - * Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2018-2023, NVIDIA CORPORATION. All rights reserved. * * Author: * Colin Cross @@ -4227,6 +4227,7 @@ static const char * const tegra234_reset_sources[] = { static const struct tegra_wake_event tegra234_wake_events[] = { TEGRA_WAKE_IRQ("pmu", 24, 209), TEGRA_WAKE_GPIO("power", 29, 1, TEGRA234_AON_GPIO(EE, 4)), + TEGRA_WAKE_GPIO("mgbe", 56, 0, TEGRA234_MAIN_GPIO(Y, 3)), TEGRA_WAKE_IRQ("rtc", 73, 10), }; -- cgit v1.2.3 From a0941221c5c6d4574af69b40ac026c22c24965fc Mon Sep 17 00:00:00 2001 From: Petlozu Pravareshwar Date: Thu, 30 Mar 2023 17:06:21 +0000 Subject: soc/tegra: pmc: Support software wake-up for SPE The Sensor Processing Engine(SPE) can trigger a software wake-up of the device. To support this wake-up for the SPE, set SR_CAPTURE_EN bit in WAKE_AOWAKE_CNTRL register associated with the wake-up for the SPE. This SR capturing logic is expected to be enabled for wakes with short pulse signalling requirements. Signed-off-by: Viswanath L Signed-off-by: Petlozu Pravareshwar Signed-off-by: Thierry Reding --- drivers/soc/tegra/pmc.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'drivers') diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index d478be88d580..5d17799524c9 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -177,6 +177,7 @@ /* Tegra186 and later */ #define WAKE_AOWAKE_CNTRL(x) (0x000 + ((x) << 2)) #define WAKE_AOWAKE_CNTRL_LEVEL (1 << 3) +#define WAKE_AOWAKE_CNTRL_SR_CAPTURE_EN (1 << 1) #define WAKE_AOWAKE_MASK_W(x) (0x180 + ((x) << 2)) #define WAKE_AOWAKE_MASK_R(x) (0x300 + ((x) << 2)) #define WAKE_AOWAKE_STATUS_W(x) (0x30c + ((x) << 2)) @@ -191,6 +192,8 @@ #define WAKE_AOWAKE_CTRL 0x4f4 #define WAKE_AOWAKE_CTRL_INTR_POLARITY BIT(0) +#define SW_WAKE_ID 83 /* wake83 */ + /* for secure PMC */ #define TEGRA_SMC_PMC 0xc2fffe00 #define TEGRA_SMC_PMC_READ 0xaa @@ -355,6 +358,7 @@ struct tegra_pmc_soc { void (*setup_irq_polarity)(struct tegra_pmc *pmc, struct device_node *np, bool invert); + void (*set_wake_filters)(struct tegra_pmc *pmc); int (*irq_set_wake)(struct irq_data *data, unsigned int on); int (*irq_set_type)(struct irq_data *data, unsigned int type); int (*powergate_set)(struct tegra_pmc *pmc, unsigned int id, @@ -2416,6 +2420,17 @@ static int tegra210_pmc_irq_set_type(struct irq_data *data, unsigned int type) return 0; } +static void tegra186_pmc_set_wake_filters(struct tegra_pmc *pmc) +{ + u32 value; + + /* SW Wake (wake83) needs SR_CAPTURE filter to be enabled */ + value = readl(pmc->wake + WAKE_AOWAKE_CNTRL(SW_WAKE_ID)); + value |= WAKE_AOWAKE_CNTRL_SR_CAPTURE_EN; + writel(value, pmc->wake + WAKE_AOWAKE_CNTRL(SW_WAKE_ID)); + dev_dbg(pmc->dev, "WAKE_AOWAKE_CNTRL_83 = 0x%x\n", value); +} + static int tegra186_pmc_irq_set_wake(struct irq_data *data, unsigned int on) { struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); @@ -3042,6 +3057,10 @@ static int tegra_pmc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, pmc); tegra_pm_init_suspend(); + /* Some wakes require specific filter configuration */ + if (pmc->soc->set_wake_filters) + pmc->soc->set_wake_filters(pmc); + return 0; cleanup_powergates: @@ -3938,6 +3957,7 @@ static const struct tegra_pmc_soc tegra186_pmc_soc = { .regs = &tegra186_pmc_regs, .init = tegra186_pmc_init, .setup_irq_polarity = tegra186_pmc_setup_irq_polarity, + .set_wake_filters = tegra186_pmc_set_wake_filters, .irq_set_wake = tegra186_pmc_irq_set_wake, .irq_set_type = tegra186_pmc_irq_set_type, .reset_sources = tegra186_reset_sources, @@ -4122,6 +4142,7 @@ static const struct tegra_pmc_soc tegra194_pmc_soc = { .regs = &tegra194_pmc_regs, .init = tegra186_pmc_init, .setup_irq_polarity = tegra186_pmc_setup_irq_polarity, + .set_wake_filters = tegra186_pmc_set_wake_filters, .irq_set_wake = tegra186_pmc_irq_set_wake, .irq_set_type = tegra186_pmc_irq_set_type, .reset_sources = tegra194_reset_sources, @@ -4249,6 +4270,7 @@ static const struct tegra_pmc_soc tegra234_pmc_soc = { .regs = &tegra234_pmc_regs, .init = tegra186_pmc_init, .setup_irq_polarity = tegra186_pmc_setup_irq_polarity, + .set_wake_filters = tegra186_pmc_set_wake_filters, .irq_set_wake = tegra186_pmc_irq_set_wake, .irq_set_type = tegra186_pmc_irq_set_type, .reset_sources = tegra234_reset_sources, -- cgit v1.2.3 From 75dfbcbfd781f826c73ebe42b78d49c23179d082 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Tue, 7 Mar 2023 20:22:51 +0000 Subject: mailbox: mpfs: fix an incorrect mask width The system controller registers on PolarFire SoC are 32 bits wide, so 16 + 16 as the first input to GENMASK_ULL() gives a 33 bit wide mask. It probably should have been immediately obvious when it was pointed out during review that the width required using GENMASK_ULL() - but I scarcely knew what I was doing at the time and missed it. The mistake ends up being moot as it is a mask after all, but it is incorrect and should be fixed. No functional change intended. Acked-by: Jassi Brar Tested-by: Valentina Fernandez Signed-off-by: Conor Dooley --- drivers/mailbox/mailbox-mpfs.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mailbox/mailbox-mpfs.c b/drivers/mailbox/mailbox-mpfs.c index 853901acaeec..d37560e91116 100644 --- a/drivers/mailbox/mailbox-mpfs.c +++ b/drivers/mailbox/mailbox-mpfs.c @@ -39,7 +39,7 @@ #define SCB_CTRL_NOTIFY_MASK BIT(SCB_CTRL_NOTIFY) #define SCB_CTRL_POS (16) -#define SCB_CTRL_MASK GENMASK_ULL(SCB_CTRL_POS + SCB_MASK_WIDTH, SCB_CTRL_POS) +#define SCB_CTRL_MASK GENMASK(SCB_CTRL_POS + SCB_MASK_WIDTH - 1, SCB_CTRL_POS) /* SCBCTRL service status register */ @@ -118,6 +118,7 @@ static int mpfs_mbox_send_data(struct mbox_chan *chan, void *data) } opt_sel = ((msg->mbox_offset << 7u) | (msg->cmd_opcode & 0x7fu)); + tx_trigger = (opt_sel << SCB_CTRL_POS) & SCB_CTRL_MASK; tx_trigger |= SCB_CTRL_REQ_MASK | SCB_STATUS_NOTIFY_MASK; writel_relaxed(tx_trigger, mbox->ctrl_base + SERVICES_CR_OFFSET); -- cgit v1.2.3 From b5984a9844fc45cd301a28fb56f3de95f7e20f3c Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Tue, 7 Mar 2023 20:22:52 +0000 Subject: mailbox: mpfs: switch to txdone_poll The system controller on PolarFire SoC has no interrupt to signify that the TX has been completed. The interrupt instead signals that a service requested by the mailbox client has succeeded. If a service fails, there will be no interrupt delivered. Switch to polling the busy register to determine whether transmission has completed. Fixes: 83d7b1560810 ("mbox: add polarfire soc system controller mailbox") Acked-by: Jassi Brar Tested-by: Valentina Fernandez Signed-off-by: Conor Dooley --- drivers/mailbox/mailbox-mpfs.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mailbox/mailbox-mpfs.c b/drivers/mailbox/mailbox-mpfs.c index d37560e91116..e0e825bdbad9 100644 --- a/drivers/mailbox/mailbox-mpfs.c +++ b/drivers/mailbox/mailbox-mpfs.c @@ -79,6 +79,13 @@ static bool mpfs_mbox_busy(struct mpfs_mbox *mbox) return status & SCB_STATUS_BUSY_MASK; } +static bool mpfs_mbox_last_tx_done(struct mbox_chan *chan) +{ + struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv; + + return !mpfs_mbox_busy(mbox); +} + static int mpfs_mbox_send_data(struct mbox_chan *chan, void *data) { struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv; @@ -183,7 +190,6 @@ static irqreturn_t mpfs_mbox_inbox_isr(int irq, void *data) mpfs_mbox_rx_data(chan); - mbox_chan_txdone(chan, 0); return IRQ_HANDLED; } @@ -213,6 +219,7 @@ static const struct mbox_chan_ops mpfs_mbox_ops = { .send_data = mpfs_mbox_send_data, .startup = mpfs_mbox_startup, .shutdown = mpfs_mbox_shutdown, + .last_tx_done = mpfs_mbox_last_tx_done, }; static int mpfs_mbox_probe(struct platform_device *pdev) @@ -248,7 +255,8 @@ static int mpfs_mbox_probe(struct platform_device *pdev) mbox->controller.num_chans = 1; mbox->controller.chans = mbox->chans; mbox->controller.ops = &mpfs_mbox_ops; - mbox->controller.txdone_irq = true; + mbox->controller.txdone_poll = true; + mbox->controller.txpoll_period = 10u; ret = devm_mbox_controller_register(&pdev->dev, &mbox->controller); if (ret) { -- cgit v1.2.3 From da82f95f7c0752f36cdb8ff99d543004e4e3acdf Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Tue, 7 Mar 2023 20:22:53 +0000 Subject: mailbox: mpfs: ditch a useless busy check mpfs_mbox_rx_data() already checks if the system controller is busy before attempting to do anything, so drop the second check before reading any data. No functional change intended. Acked-by: Jassi Brar Tested-by: Valentina Fernandez Signed-off-by: Conor Dooley --- drivers/mailbox/mailbox-mpfs.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/mailbox/mailbox-mpfs.c b/drivers/mailbox/mailbox-mpfs.c index e0e825bdbad9..0d176aba3462 100644 --- a/drivers/mailbox/mailbox-mpfs.c +++ b/drivers/mailbox/mailbox-mpfs.c @@ -170,12 +170,10 @@ static void mpfs_mbox_rx_data(struct mbox_chan *chan) if (response->resp_status) return; - if (!mpfs_mbox_busy(mbox)) { - for (i = 0; i < num_words; i++) { - response->resp_msg[i] = - readl_relaxed(mbox->mbox_base - + mbox->resp_offset + i * 0x4); - } + for (i = 0; i < num_words; i++) { + response->resp_msg[i] = + readl_relaxed(mbox->mbox_base + + mbox->resp_offset + i * 0x4); } mbox_chan_received_data(chan, response); -- cgit v1.2.3 From 37e3430176ff333afb013314a6c949660d75cc92 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Tue, 7 Mar 2023 20:22:54 +0000 Subject: mailbox: mpfs: check the service status in .tx_done() Services are supposed to generate an interrupt once completed, whether or not they have do so successfully. What appears to be a bug in the system controller means that interrupts are only generated for *successful* services. Currently, the status of a service is only checked in the mpfs_mbox_rx_data() once an interrupt is received. As it turns out, this is not really helpful where the potentially buggy behaviour is present, as we'll only see the status for successes where it is moot anyway. Jassi suggested moving the check to the .tx_done() callback instead. This makes sense, as the busy bit that tx_done() is polling will be lowered on completion, regardless of whether the service passed or failed. That allows us to check the status bits for all services, whether they generate an interrupt or not & pass something more informative than -EBADMSG back to the drivers implementing individual services. Suggested-by: Jassi Brar Acked-by: Jassi Brar Tested-by: Valentina Fernandez Signed-off-by: Conor Dooley --- drivers/mailbox/mailbox-mpfs.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) (limited to 'drivers') diff --git a/drivers/mailbox/mailbox-mpfs.c b/drivers/mailbox/mailbox-mpfs.c index 0d176aba3462..162df49654fb 100644 --- a/drivers/mailbox/mailbox-mpfs.c +++ b/drivers/mailbox/mailbox-mpfs.c @@ -82,8 +82,22 @@ static bool mpfs_mbox_busy(struct mpfs_mbox *mbox) static bool mpfs_mbox_last_tx_done(struct mbox_chan *chan) { struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv; + struct mpfs_mss_response *response = mbox->response; + u32 val; + + if (mpfs_mbox_busy(mbox)) + return false; + + /* + * The service status is stored in bits 31:16 of the SERVICES_SR + * register & is only valid when the system controller is not busy. + * Failed services are intended to generated interrupts, but in reality + * this does not happen, so the status must be checked here. + */ + val = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET); + response->resp_status = (val & SCB_STATUS_MASK) >> SCB_STATUS_POS; - return !mpfs_mbox_busy(mbox); + return true; } static int mpfs_mbox_send_data(struct mbox_chan *chan, void *data) @@ -138,7 +152,7 @@ static void mpfs_mbox_rx_data(struct mbox_chan *chan) struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv; struct mpfs_mss_response *response = mbox->response; u16 num_words = ALIGN((response->resp_size), (4)) / 4U; - u32 i, status; + u32 i; if (!response->resp_msg) { dev_err(mbox->dev, "failed to assign memory for response %d\n", -ENOMEM); @@ -146,8 +160,6 @@ static void mpfs_mbox_rx_data(struct mbox_chan *chan) } /* - * The status is stored in bits 31:16 of the SERVICES_SR register. - * It is only valid when BUSY == 0. * We should *never* get an interrupt while the controller is * still in the busy state. If we do, something has gone badly * wrong & the content of the mailbox would not be valid. @@ -158,18 +170,6 @@ static void mpfs_mbox_rx_data(struct mbox_chan *chan) return; } - status = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET); - - /* - * If the status of the individual servers is non-zero, the service has - * failed. The contents of the mailbox at this point are not be valid, - * so don't bother reading them. Set the status so that the driver - * implementing the service can handle the result. - */ - response->resp_status = (status & SCB_STATUS_MASK) >> SCB_STATUS_POS; - if (response->resp_status) - return; - for (i = 0; i < num_words; i++) { response->resp_msg[i] = readl_relaxed(mbox->mbox_base -- cgit v1.2.3 From 5ca631ec757bed5843e39c91c8f52d1789991756 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Tue, 7 Mar 2023 20:22:55 +0000 Subject: soc: microchip: mpfs: fix some horrible alignment mpfs_sys_controller_delete() has some horrible alignment that upsets my OCD... Move the RHS of the assignment to a new line for greater satifaction. Tested-by: Valentina Fernandez Signed-off-by: Conor Dooley --- drivers/soc/microchip/mpfs-sys-controller.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/microchip/mpfs-sys-controller.c b/drivers/soc/microchip/mpfs-sys-controller.c index 6e20207b5756..12039cb38b33 100644 --- a/drivers/soc/microchip/mpfs-sys-controller.c +++ b/drivers/soc/microchip/mpfs-sys-controller.c @@ -66,8 +66,8 @@ static void rx_callback(struct mbox_client *client, void *msg) static void mpfs_sys_controller_delete(struct kref *kref) { - struct mpfs_sys_controller *sys_controller = container_of(kref, struct mpfs_sys_controller, - consumers); + struct mpfs_sys_controller *sys_controller = + container_of(kref, struct mpfs_sys_controller, consumers); mbox_free_channel(sys_controller->chan); kfree(sys_controller); -- cgit v1.2.3 From 4f739af1934ad7195db35f74cfbdca264668d8fc Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Tue, 7 Mar 2023 20:22:56 +0000 Subject: soc: microchip: mpfs: use a consistent completion timeout Completion timeouts use jiffies, so passing a number directly will produce inconsistent timeouts depending on config. Define the timeout in ms and convert it to jiffies instead. Tested-by: Valentina Fernandez Signed-off-by: Conor Dooley --- drivers/soc/microchip/mpfs-sys-controller.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/microchip/mpfs-sys-controller.c b/drivers/soc/microchip/mpfs-sys-controller.c index 12039cb38b33..738ecd624d64 100644 --- a/drivers/soc/microchip/mpfs-sys-controller.c +++ b/drivers/soc/microchip/mpfs-sys-controller.c @@ -11,12 +11,15 @@ #include #include #include +#include #include #include #include #include #include +#define MPFS_SYS_CTRL_TIMEOUT_MS 100 + static DEFINE_MUTEX(transaction_lock); struct mpfs_sys_controller { @@ -28,6 +31,7 @@ struct mpfs_sys_controller { int mpfs_blocking_transaction(struct mpfs_sys_controller *sys_controller, struct mpfs_mss_msg *msg) { + unsigned long timeout = msecs_to_jiffies(MPFS_SYS_CTRL_TIMEOUT_MS); int ret, err; err = mutex_lock_interruptible(&transaction_lock); @@ -38,7 +42,7 @@ int mpfs_blocking_transaction(struct mpfs_sys_controller *sys_controller, struct ret = mbox_send_message(sys_controller->chan, msg); if (ret >= 0) { - if (wait_for_completion_timeout(&sys_controller->c, HZ)) { + if (wait_for_completion_timeout(&sys_controller->c, timeout)) { ret = 0; } else { ret = -ETIMEDOUT; -- cgit v1.2.3 From 7606f4dfffa7a4e4aadd8aef918cc8ac1f1e2196 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Tue, 7 Mar 2023 20:22:57 +0000 Subject: soc: microchip: mpfs: simplify error handling in mpfs_blocking_transaction() The error handling has a kinda weird nested-if setup that is not really adding anything. Switch it to more of an early return arrangement as a predatory step for adding different handing for timeouts and failed services. Tested-by: Valentina Fernandez Signed-off-by: Conor Dooley --- drivers/soc/microchip/mpfs-sys-controller.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/microchip/mpfs-sys-controller.c b/drivers/soc/microchip/mpfs-sys-controller.c index 738ecd624d64..e61ba9b7aae3 100644 --- a/drivers/soc/microchip/mpfs-sys-controller.c +++ b/drivers/soc/microchip/mpfs-sys-controller.c @@ -32,28 +32,27 @@ struct mpfs_sys_controller { int mpfs_blocking_transaction(struct mpfs_sys_controller *sys_controller, struct mpfs_mss_msg *msg) { unsigned long timeout = msecs_to_jiffies(MPFS_SYS_CTRL_TIMEOUT_MS); - int ret, err; + int ret; - err = mutex_lock_interruptible(&transaction_lock); - if (err) - return err; + ret = mutex_lock_interruptible(&transaction_lock); + if (ret) + return ret; reinit_completion(&sys_controller->c); ret = mbox_send_message(sys_controller->chan, msg); - if (ret >= 0) { - if (wait_for_completion_timeout(&sys_controller->c, timeout)) { - ret = 0; - } else { - ret = -ETIMEDOUT; - dev_warn(sys_controller->client.dev, - "MPFS sys controller transaction timeout\n"); - } + if (ret < 0) + goto out; + + if (!wait_for_completion_timeout(&sys_controller->c, timeout)) { + ret = -ETIMEDOUT; + dev_warn(sys_controller->client.dev, "MPFS sys controller transaction timeout\n"); } else { - dev_err(sys_controller->client.dev, - "mpfs sys controller transaction returned %d\n", ret); + /* mbox_send_message() returns positive integers on success */ + ret = 0; } +out: mutex_unlock(&transaction_lock); return ret; -- cgit v1.2.3 From 8f943dd12eeff71857b9a1ca45adbaaba379bf30 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Tue, 7 Mar 2023 20:22:58 +0000 Subject: soc: microchip: mpfs: handle timeouts and failed services differently The system controller will only deliver an interrupt if a service succeeds. This leaves us in the unfortunate position with current code where there is no way to differentiate between a legitimate timeout where the service has not completed & where it has completed, but failed. mbox_send_message() has its own completion, and it will time out of the system controller does not lower the busy flag. In this case, a timeout has occurred and the error can be propagated back to the caller. If the busy flag is lowered, but no interrupt has arrived to trigger the rx callback, the service can be deemed to have failed. Report -EBADMSG in this case so that callers can differentiate. Tested-by: Valentina Fernandez Signed-off-by: Conor Dooley --- drivers/soc/microchip/mpfs-sys-controller.c | 27 ++++++++++++++++++++++----- 1 file changed, 22 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/microchip/mpfs-sys-controller.c b/drivers/soc/microchip/mpfs-sys-controller.c index e61ba9b7aae3..ceaeebc1fc6b 100644 --- a/drivers/soc/microchip/mpfs-sys-controller.c +++ b/drivers/soc/microchip/mpfs-sys-controller.c @@ -18,7 +18,11 @@ #include #include -#define MPFS_SYS_CTRL_TIMEOUT_MS 100 +/* + * This timeout must be long, as some services (example: image authentication) + * take significant time to complete + */ +#define MPFS_SYS_CTRL_TIMEOUT_MS 30000 static DEFINE_MUTEX(transaction_lock); @@ -41,14 +45,26 @@ int mpfs_blocking_transaction(struct mpfs_sys_controller *sys_controller, struct reinit_completion(&sys_controller->c); ret = mbox_send_message(sys_controller->chan, msg); - if (ret < 0) + if (ret < 0) { + dev_warn(sys_controller->client.dev, "MPFS sys controller service timeout\n"); goto out; + } + /* + * Unfortunately, the system controller will only deliver an interrupt + * if a service succeeds. mbox_send_message() will block until the busy + * flag is gone. If the busy flag is gone but no interrupt has arrived + * to trigger the rx callback then the service can be deemed to have + * failed. + * The caller can then interrogate msg::response::resp_status to + * determine the cause of the failure. + * mbox_send_message() returns positive integers in the success path, so + * ret needs to be cleared if we do get an interrupt. + */ if (!wait_for_completion_timeout(&sys_controller->c, timeout)) { - ret = -ETIMEDOUT; - dev_warn(sys_controller->client.dev, "MPFS sys controller transaction timeout\n"); + ret = -EBADMSG; + dev_warn(sys_controller->client.dev, "MPFS sys controller service failed\n"); } else { - /* mbox_send_message() returns positive integers on success */ ret = 0; } @@ -107,6 +123,7 @@ static int mpfs_sys_controller_probe(struct platform_device *pdev) sys_controller->client.dev = dev; sys_controller->client.rx_callback = rx_callback; sys_controller->client.tx_block = 1U; + sys_controller->client.tx_tout = msecs_to_jiffies(MPFS_SYS_CTRL_TIMEOUT_MS); sys_controller->chan = mbox_request_channel(&sys_controller->client, 0); if (IS_ERR(sys_controller->chan)) { -- cgit v1.2.3 From 4dd472bdafcb660bea17bc63a97d06e24fcb36ed Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Fri, 31 Mar 2023 08:18:17 +0100 Subject: soc: microchip: mpfs: add a prefix to rx_callback() Add a prefix to the function name to match the rest of the file. Signed-off-by: Conor Dooley --- drivers/soc/microchip/mpfs-sys-controller.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/microchip/mpfs-sys-controller.c b/drivers/soc/microchip/mpfs-sys-controller.c index ceaeebc1fc6b..216d9f4ea0ce 100644 --- a/drivers/soc/microchip/mpfs-sys-controller.c +++ b/drivers/soc/microchip/mpfs-sys-controller.c @@ -75,7 +75,7 @@ out: } EXPORT_SYMBOL(mpfs_blocking_transaction); -static void rx_callback(struct mbox_client *client, void *msg) +static void mpfs_sys_controller_rx_callback(struct mbox_client *client, void *msg) { struct mpfs_sys_controller *sys_controller = container_of(client, struct mpfs_sys_controller, client); @@ -121,7 +121,7 @@ static int mpfs_sys_controller_probe(struct platform_device *pdev) return -ENOMEM; sys_controller->client.dev = dev; - sys_controller->client.rx_callback = rx_callback; + sys_controller->client.rx_callback = mpfs_sys_controller_rx_callback; sys_controller->client.tx_block = 1U; sys_controller->client.tx_tout = msecs_to_jiffies(MPFS_SYS_CTRL_TIMEOUT_MS); -- cgit v1.2.3 From c3fbced9af885a6f217fd95509a613d6590916ce Mon Sep 17 00:00:00 2001 From: Zhaoyang Li Date: Mon, 27 Mar 2023 19:54:22 +0800 Subject: soc: bcm: brcmstb: biuctrl: fix of_iomap leak Smatch reports: drivers/soc/bcm/brcmstb/biuctrl.c:291 setup_hifcpubiuctrl_regs() warn: 'cpubiuctrl_base' from of_iomap() not released on lines: 291. This is because in setup_hifcpubiuctrl_regs(), cpubiuctrl_base is not released when handle error, which may cause a leak. To fix this, iounmap is added when handle error. Fixes: 22f7a9116eba ("soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUs") Signed-off-by: Zhaoyang Li Reviewed-by: Dan Carpenter Reviewed-by: Dongliang Mu Link: https://lore.kernel.org/r/20230327115422.1536615-1-lizhaoyang04@hust.edu.cn Signed-off-by: Florian Fainelli --- drivers/soc/bcm/brcmstb/biuctrl.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers') diff --git a/drivers/soc/bcm/brcmstb/biuctrl.c b/drivers/soc/bcm/brcmstb/biuctrl.c index e1d7b4543248..364ddbe365c2 100644 --- a/drivers/soc/bcm/brcmstb/biuctrl.c +++ b/drivers/soc/bcm/brcmstb/biuctrl.c @@ -288,6 +288,10 @@ static int __init setup_hifcpubiuctrl_regs(struct device_node *np) if (BRCM_ID(family_id) == 0x7260 && BRCM_REV(family_id) == 0) cpubiuctrl_regs = b53_cpubiuctrl_no_wb_regs; out: + if (ret && cpubiuctrl_base) { + iounmap(cpubiuctrl_base); + cpubiuctrl_base = NULL; + } return ret; } -- cgit v1.2.3 From fc187a46a8e682f0f1167b230792b88de01ceaa0 Mon Sep 17 00:00:00 2001 From: Li Yang Date: Fri, 31 Mar 2023 17:55:44 +0800 Subject: soc: renesas: renesas-soc: Release 'chipid' from ioremap() Smatch reports: drivers/soc/renesas/renesas-soc.c:536 renesas_soc_init() warn: 'chipid' from ioremap() not released on lines: 475. If soc_dev_atrr allocation is failed, function renesas_soc_init() will return without releasing 'chipid' from ioremap(). Fix this by adding function iounmap(). Fixes: cb5508e47e60 ("soc: renesas: Add support for reading product revision for RZ/G2L family") Signed-off-by: Li Yang Reviewed-by: Dan Carpenter Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230331095545.31823-1-lidaxian@hust.edu.cn Signed-off-by: Geert Uytterhoeven --- drivers/soc/renesas/renesas-soc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c index 4ba893e45427..42af7c09f743 100644 --- a/drivers/soc/renesas/renesas-soc.c +++ b/drivers/soc/renesas/renesas-soc.c @@ -469,8 +469,11 @@ static int __init renesas_soc_init(void) } soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); - if (!soc_dev_attr) + if (!soc_dev_attr) { + if (chipid) + iounmap(chipid); return -ENOMEM; + } np = of_find_node_by_path("/"); of_property_read_string(np, "model", &soc_dev_attr->machine); -- cgit v1.2.3 From 452c165e3597691a953e3f4c4c0442c41c8e02f4 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Wed, 15 Mar 2023 15:11:20 +0100 Subject: soc: qcom: icc-bwmon: Remove unused struct member bwmon->regmap was never used, as the regmap for bwmon is registered through devres and accessed through bwmon's regmap_field members. Remove it Fixes: ec63dcd3c863 ("soc: qcom: icc-bwmon: use regmap and prepare for BWMON v5") Reviewed-by: Krzysztof Kozlowski Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230304-topic-ddr_bwmon-v3-2-77a050c2fbda@linaro.org --- drivers/soc/qcom/icc-bwmon.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/icc-bwmon.c b/drivers/soc/qcom/icc-bwmon.c index d07be3700db6..d45caf512e2d 100644 --- a/drivers/soc/qcom/icc-bwmon.c +++ b/drivers/soc/qcom/icc-bwmon.c @@ -164,7 +164,6 @@ struct icc_bwmon { const struct icc_bwmon_data *data; int irq; - struct regmap *regmap; struct regmap_field *regs[F_NUM_FIELDS]; unsigned int max_bw_kbps; -- cgit v1.2.3 From b6e9fb7ac236bc48cc2c667e0b51153d2daa5268 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Wed, 15 Mar 2023 15:11:21 +0100 Subject: soc: qcom: icc-bwmon: Handle global registers correctly The BWMON hardware has two sets of registers: one for the monitor itself and one called "global". It has what seems to be some kind of a head switch and an interrupt control register. It's usually 0x200 in size. On fairly recent SoCs (with the starting point seemingly being moving the OSM programming to the firmware) these two register sets are contiguous and overlapping, like this (on sm8450): /* notice how base.start == global_base.start+0x100 */ reg = <0x90b6400 0x300>, <0x90b6300 0x200>; reg-names = "base", "global_base"; Which led to some confusion and the assumption that since the "interesting" global registers begin right after global_base+0x100, there's no need to map two separate regions and one can simply subtract 0x100 from the offsets. This is however not the case for anything older than SDM845, as the global region can appear in seemingly random spots on the register map. Handle the case where the global registers are mapped separately to allow proper functioning of BWMONv4 on MSM8998 and older. Add specific compatibles for 845, 8280xp, 7280 and 8550 (all of which use the single reg space scheme) to keep backwards compatibility with old DTs. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230304-topic-ddr_bwmon-v3-3-77a050c2fbda@linaro.org --- drivers/soc/qcom/icc-bwmon.c | 230 +++++++++++++++++++++++++++++++++++++++---- 1 file changed, 209 insertions(+), 21 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/icc-bwmon.c b/drivers/soc/qcom/icc-bwmon.c index d45caf512e2d..fd58c5b69897 100644 --- a/drivers/soc/qcom/icc-bwmon.c +++ b/drivers/soc/qcom/icc-bwmon.c @@ -34,14 +34,27 @@ /* Internal sampling clock frequency */ #define HW_TIMER_HZ 19200000 -#define BWMON_V4_GLOBAL_IRQ_CLEAR 0x008 -#define BWMON_V4_GLOBAL_IRQ_ENABLE 0x00c +#define BWMON_V4_GLOBAL_IRQ_CLEAR 0x108 +#define BWMON_V4_GLOBAL_IRQ_ENABLE 0x10c /* * All values here and further are matching regmap fields, so without absolute * register offsets. */ #define BWMON_V4_GLOBAL_IRQ_ENABLE_ENABLE BIT(0) +/* + * Starting with SDM845, the BWMON4 register space has changed a bit: + * the global registers were jammed into the beginning of the monitor region. + * To keep the proper offsets, one would have to map and + * , which is straight up wrong. + * To facilitate for that, while allowing the older, arguably more proper + * implementations to work, offset the global registers by -0x100 to avoid + * having to map half of the global registers twice. + */ +#define BWMON_V4_845_OFFSET 0x100 +#define BWMON_V4_GLOBAL_IRQ_CLEAR_845 (BWMON_V4_GLOBAL_IRQ_CLEAR - BWMON_V4_845_OFFSET) +#define BWMON_V4_GLOBAL_IRQ_ENABLE_845 (BWMON_V4_GLOBAL_IRQ_ENABLE - BWMON_V4_845_OFFSET) + #define BWMON_V4_IRQ_STATUS 0x100 #define BWMON_V4_IRQ_CLEAR 0x108 @@ -118,9 +131,13 @@ #define BWMON_NEEDS_FORCE_CLEAR BIT(1) enum bwmon_fields { + /* Global region fields, keep them at the top */ F_GLOBAL_IRQ_CLEAR, F_GLOBAL_IRQ_ENABLE, - F_IRQ_STATUS, + F_NUM_GLOBAL_FIELDS, + + /* Monitor region fields */ + F_IRQ_STATUS = F_NUM_GLOBAL_FIELDS, F_IRQ_CLEAR, F_IRQ_ENABLE, F_ENABLE, @@ -157,6 +174,9 @@ struct icc_bwmon_data { const struct regmap_config *regmap_cfg; const struct reg_field *regmap_fields; + + const struct regmap_config *global_regmap_cfg; + const struct reg_field *global_regmap_fields; }; struct icc_bwmon { @@ -165,6 +185,7 @@ struct icc_bwmon { int irq; struct regmap_field *regs[F_NUM_FIELDS]; + struct regmap_field *global_regs[F_NUM_GLOBAL_FIELDS]; unsigned int max_bw_kbps; unsigned int min_bw_kbps; @@ -174,8 +195,8 @@ struct icc_bwmon { /* BWMON v4 */ static const struct reg_field msm8998_bwmon_reg_fields[] = { - [F_GLOBAL_IRQ_CLEAR] = REG_FIELD(BWMON_V4_GLOBAL_IRQ_CLEAR, 0, 0), - [F_GLOBAL_IRQ_ENABLE] = REG_FIELD(BWMON_V4_GLOBAL_IRQ_ENABLE, 0, 0), + [F_GLOBAL_IRQ_CLEAR] = {}, + [F_GLOBAL_IRQ_ENABLE] = {}, [F_IRQ_STATUS] = REG_FIELD(BWMON_V4_IRQ_STATUS, 4, 7), [F_IRQ_CLEAR] = REG_FIELD(BWMON_V4_IRQ_CLEAR, 4, 7), [F_IRQ_ENABLE] = REG_FIELD(BWMON_V4_IRQ_ENABLE, 4, 7), @@ -201,7 +222,6 @@ static const struct reg_field msm8998_bwmon_reg_fields[] = { }; static const struct regmap_range msm8998_bwmon_reg_noread_ranges[] = { - regmap_reg_range(BWMON_V4_GLOBAL_IRQ_CLEAR, BWMON_V4_GLOBAL_IRQ_CLEAR), regmap_reg_range(BWMON_V4_IRQ_CLEAR, BWMON_V4_IRQ_CLEAR), regmap_reg_range(BWMON_V4_CLEAR, BWMON_V4_CLEAR), }; @@ -221,16 +241,33 @@ static const struct regmap_access_table msm8998_bwmon_reg_volatile_table = { .n_yes_ranges = ARRAY_SIZE(msm8998_bwmon_reg_volatile_ranges), }; +static const struct reg_field msm8998_bwmon_global_reg_fields[] = { + [F_GLOBAL_IRQ_CLEAR] = REG_FIELD(BWMON_V4_GLOBAL_IRQ_CLEAR, 0, 0), + [F_GLOBAL_IRQ_ENABLE] = REG_FIELD(BWMON_V4_GLOBAL_IRQ_ENABLE, 0, 0), +}; + +static const struct regmap_range msm8998_bwmon_global_reg_noread_ranges[] = { + regmap_reg_range(BWMON_V4_GLOBAL_IRQ_CLEAR, BWMON_V4_GLOBAL_IRQ_CLEAR), +}; + +static const struct regmap_access_table msm8998_bwmon_global_reg_read_table = { + .no_ranges = msm8998_bwmon_global_reg_noread_ranges, + .n_no_ranges = ARRAY_SIZE(msm8998_bwmon_global_reg_noread_ranges), +}; + /* * Fill the cache for non-readable registers only as rest does not really * matter and can be read from the device. */ static const struct reg_default msm8998_bwmon_reg_defaults[] = { - { BWMON_V4_GLOBAL_IRQ_CLEAR, 0x0 }, { BWMON_V4_IRQ_CLEAR, 0x0 }, { BWMON_V4_CLEAR, 0x0 }, }; +static const struct reg_default msm8998_bwmon_global_reg_defaults[] = { + { BWMON_V4_GLOBAL_IRQ_CLEAR, 0x0 }, +}; + static const struct regmap_config msm8998_bwmon_regmap_cfg = { .reg_bits = 32, .reg_stride = 4, @@ -251,6 +288,93 @@ static const struct regmap_config msm8998_bwmon_regmap_cfg = { .cache_type = REGCACHE_RBTREE, }; +static const struct regmap_config msm8998_bwmon_global_regmap_cfg = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + /* + * No concurrent access expected - driver has one interrupt handler, + * regmap is not shared, no driver or user-space API. + */ + .disable_locking = true, + .rd_table = &msm8998_bwmon_global_reg_read_table, + .reg_defaults = msm8998_bwmon_global_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(msm8998_bwmon_global_reg_defaults), + /* + * Cache is necessary for using regmap fields with non-readable + * registers. + */ + .cache_type = REGCACHE_RBTREE, +}; + +static const struct reg_field sdm845_cpu_bwmon_reg_fields[] = { + [F_GLOBAL_IRQ_CLEAR] = REG_FIELD(BWMON_V4_GLOBAL_IRQ_CLEAR_845, 0, 0), + [F_GLOBAL_IRQ_ENABLE] = REG_FIELD(BWMON_V4_GLOBAL_IRQ_ENABLE_845, 0, 0), + [F_IRQ_STATUS] = REG_FIELD(BWMON_V4_IRQ_STATUS, 4, 7), + [F_IRQ_CLEAR] = REG_FIELD(BWMON_V4_IRQ_CLEAR, 4, 7), + [F_IRQ_ENABLE] = REG_FIELD(BWMON_V4_IRQ_ENABLE, 4, 7), + /* F_ENABLE covers entire register to disable other features */ + [F_ENABLE] = REG_FIELD(BWMON_V4_ENABLE, 0, 31), + [F_CLEAR] = REG_FIELD(BWMON_V4_CLEAR, 0, 1), + [F_SAMPLE_WINDOW] = REG_FIELD(BWMON_V4_SAMPLE_WINDOW, 0, 23), + [F_THRESHOLD_HIGH] = REG_FIELD(BWMON_V4_THRESHOLD_HIGH, 0, 11), + [F_THRESHOLD_MED] = REG_FIELD(BWMON_V4_THRESHOLD_MED, 0, 11), + [F_THRESHOLD_LOW] = REG_FIELD(BWMON_V4_THRESHOLD_LOW, 0, 11), + [F_ZONE_ACTIONS_ZONE0] = REG_FIELD(BWMON_V4_ZONE_ACTIONS, 0, 7), + [F_ZONE_ACTIONS_ZONE1] = REG_FIELD(BWMON_V4_ZONE_ACTIONS, 8, 15), + [F_ZONE_ACTIONS_ZONE2] = REG_FIELD(BWMON_V4_ZONE_ACTIONS, 16, 23), + [F_ZONE_ACTIONS_ZONE3] = REG_FIELD(BWMON_V4_ZONE_ACTIONS, 24, 31), + [F_THRESHOLD_COUNT_ZONE0] = REG_FIELD(BWMON_V4_THRESHOLD_COUNT, 0, 7), + [F_THRESHOLD_COUNT_ZONE1] = REG_FIELD(BWMON_V4_THRESHOLD_COUNT, 8, 15), + [F_THRESHOLD_COUNT_ZONE2] = REG_FIELD(BWMON_V4_THRESHOLD_COUNT, 16, 23), + [F_THRESHOLD_COUNT_ZONE3] = REG_FIELD(BWMON_V4_THRESHOLD_COUNT, 24, 31), + [F_ZONE0_MAX] = REG_FIELD(BWMON_V4_ZONE_MAX(0), 0, 11), + [F_ZONE1_MAX] = REG_FIELD(BWMON_V4_ZONE_MAX(1), 0, 11), + [F_ZONE2_MAX] = REG_FIELD(BWMON_V4_ZONE_MAX(2), 0, 11), + [F_ZONE3_MAX] = REG_FIELD(BWMON_V4_ZONE_MAX(3), 0, 11), +}; + +static const struct regmap_range sdm845_cpu_bwmon_reg_noread_ranges[] = { + regmap_reg_range(BWMON_V4_GLOBAL_IRQ_CLEAR_845, BWMON_V4_GLOBAL_IRQ_CLEAR_845), + regmap_reg_range(BWMON_V4_IRQ_CLEAR, BWMON_V4_IRQ_CLEAR), + regmap_reg_range(BWMON_V4_CLEAR, BWMON_V4_CLEAR), +}; + +static const struct regmap_access_table sdm845_cpu_bwmon_reg_read_table = { + .no_ranges = sdm845_cpu_bwmon_reg_noread_ranges, + .n_no_ranges = ARRAY_SIZE(sdm845_cpu_bwmon_reg_noread_ranges), +}; + +/* + * Fill the cache for non-readable registers only as rest does not really + * matter and can be read from the device. + */ +static const struct reg_default sdm845_cpu_bwmon_reg_defaults[] = { + { BWMON_V4_GLOBAL_IRQ_CLEAR_845, 0x0 }, + { BWMON_V4_IRQ_CLEAR, 0x0 }, + { BWMON_V4_CLEAR, 0x0 }, +}; + +static const struct regmap_config sdm845_cpu_bwmon_regmap_cfg = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + /* + * No concurrent access expected - driver has one interrupt handler, + * regmap is not shared, no driver or user-space API. + */ + .disable_locking = true, + .rd_table = &sdm845_cpu_bwmon_reg_read_table, + .volatile_table = &msm8998_bwmon_reg_volatile_table, + .reg_defaults = sdm845_cpu_bwmon_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(sdm845_cpu_bwmon_reg_defaults), + /* + * Cache is necessary for using regmap fields with non-readable + * registers. + */ + .cache_type = REGCACHE_RBTREE, +}; + /* BWMON v5 */ static const struct reg_field sdm845_llcc_bwmon_reg_fields[] = { [F_GLOBAL_IRQ_CLEAR] = {}, @@ -349,6 +473,13 @@ static void bwmon_clear_counters(struct icc_bwmon *bwmon, bool clear_all) static void bwmon_clear_irq(struct icc_bwmon *bwmon) { + struct regmap_field *global_irq_clr; + + if (bwmon->data->global_regmap_fields) + global_irq_clr = bwmon->global_regs[F_GLOBAL_IRQ_CLEAR]; + else + global_irq_clr = bwmon->regs[F_GLOBAL_IRQ_CLEAR]; + /* * Clear zone and global interrupts. The order and barriers are * important. Quoting downstream Qualcomm msm-4.9 tree: @@ -369,15 +500,22 @@ static void bwmon_clear_irq(struct icc_bwmon *bwmon) if (bwmon->data->quirks & BWMON_NEEDS_FORCE_CLEAR) regmap_field_force_write(bwmon->regs[F_IRQ_CLEAR], 0); if (bwmon->data->quirks & BWMON_HAS_GLOBAL_IRQ) - regmap_field_force_write(bwmon->regs[F_GLOBAL_IRQ_CLEAR], + regmap_field_force_write(global_irq_clr, BWMON_V4_GLOBAL_IRQ_ENABLE_ENABLE); } static void bwmon_disable(struct icc_bwmon *bwmon) { + struct regmap_field *global_irq_en; + + if (bwmon->data->global_regmap_fields) + global_irq_en = bwmon->global_regs[F_GLOBAL_IRQ_ENABLE]; + else + global_irq_en = bwmon->regs[F_GLOBAL_IRQ_ENABLE]; + /* Disable interrupts. Strict ordering, see bwmon_clear_irq(). */ if (bwmon->data->quirks & BWMON_HAS_GLOBAL_IRQ) - regmap_field_write(bwmon->regs[F_GLOBAL_IRQ_ENABLE], 0x0); + regmap_field_write(global_irq_en, 0x0); regmap_field_write(bwmon->regs[F_IRQ_ENABLE], 0x0); /* @@ -389,10 +527,18 @@ static void bwmon_disable(struct icc_bwmon *bwmon) static void bwmon_enable(struct icc_bwmon *bwmon, unsigned int irq_enable) { + struct regmap_field *global_irq_en; + + if (bwmon->data->global_regmap_fields) + global_irq_en = bwmon->global_regs[F_GLOBAL_IRQ_ENABLE]; + else + global_irq_en = bwmon->regs[F_GLOBAL_IRQ_ENABLE]; + /* Enable interrupts */ if (bwmon->data->quirks & BWMON_HAS_GLOBAL_IRQ) - regmap_field_write(bwmon->regs[F_GLOBAL_IRQ_ENABLE], + regmap_field_write(global_irq_en, BWMON_V4_GLOBAL_IRQ_ENABLE_ENABLE); + regmap_field_write(bwmon->regs[F_IRQ_ENABLE], irq_enable); /* Enable bwmon */ @@ -555,7 +701,9 @@ static int bwmon_init_regmap(struct platform_device *pdev, struct device *dev = &pdev->dev; void __iomem *base; struct regmap *map; + int ret; + /* Map the monitor base */ base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) return dev_err_probe(dev, PTR_ERR(base), @@ -566,12 +714,35 @@ static int bwmon_init_regmap(struct platform_device *pdev, return dev_err_probe(dev, PTR_ERR(map), "failed to initialize regmap\n"); + BUILD_BUG_ON(ARRAY_SIZE(msm8998_bwmon_global_reg_fields) != F_NUM_GLOBAL_FIELDS); BUILD_BUG_ON(ARRAY_SIZE(msm8998_bwmon_reg_fields) != F_NUM_FIELDS); + BUILD_BUG_ON(ARRAY_SIZE(sdm845_cpu_bwmon_reg_fields) != F_NUM_FIELDS); BUILD_BUG_ON(ARRAY_SIZE(sdm845_llcc_bwmon_reg_fields) != F_NUM_FIELDS); - return devm_regmap_field_bulk_alloc(dev, map, bwmon->regs, + ret = devm_regmap_field_bulk_alloc(dev, map, bwmon->regs, bwmon->data->regmap_fields, F_NUM_FIELDS); + if (ret) + return ret; + + if (bwmon->data->global_regmap_cfg) { + /* Map the global base, if separate */ + base = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(base)) + return dev_err_probe(dev, PTR_ERR(base), + "failed to map bwmon global registers\n"); + + map = devm_regmap_init_mmio(dev, base, bwmon->data->global_regmap_cfg); + if (IS_ERR(map)) + return dev_err_probe(dev, PTR_ERR(map), + "failed to initialize global regmap\n"); + + ret = devm_regmap_field_bulk_alloc(dev, map, bwmon->global_regs, + bwmon->data->global_regmap_fields, + F_NUM_GLOBAL_FIELDS); + } + + return ret; } static int bwmon_probe(struct platform_device *pdev) @@ -644,6 +815,21 @@ static const struct icc_bwmon_data msm8998_bwmon_data = { .quirks = BWMON_HAS_GLOBAL_IRQ, .regmap_fields = msm8998_bwmon_reg_fields, .regmap_cfg = &msm8998_bwmon_regmap_cfg, + .global_regmap_fields = msm8998_bwmon_global_reg_fields, + .global_regmap_cfg = &msm8998_bwmon_global_regmap_cfg, +}; + +static const struct icc_bwmon_data sdm845_cpu_bwmon_data = { + .sample_ms = 4, + .count_unit_kb = 64, + .default_highbw_kbps = 4800 * 1024, /* 4.8 GBps */ + .default_medbw_kbps = 512 * 1024, /* 512 MBps */ + .default_lowbw_kbps = 0, + .zone1_thres_count = 16, + .zone3_thres_count = 1, + .quirks = BWMON_HAS_GLOBAL_IRQ, + .regmap_fields = sdm845_cpu_bwmon_reg_fields, + .regmap_cfg = &sdm845_cpu_bwmon_regmap_cfg, }; static const struct icc_bwmon_data sdm845_llcc_bwmon_data = { @@ -672,16 +858,18 @@ static const struct icc_bwmon_data sc7280_llcc_bwmon_data = { }; static const struct of_device_id bwmon_of_match[] = { - { - .compatible = "qcom,msm8998-bwmon", - .data = &msm8998_bwmon_data - }, { - .compatible = "qcom,sdm845-llcc-bwmon", - .data = &sdm845_llcc_bwmon_data - }, { - .compatible = "qcom,sc7280-llcc-bwmon", - .data = &sc7280_llcc_bwmon_data - }, + /* BWMONv4, separate monitor and global register spaces */ + { .compatible = "qcom,msm8998-bwmon", .data = &msm8998_bwmon_data }, + /* BWMONv4, unified register space */ + { .compatible = "qcom,sdm845-bwmon", .data = &sdm845_cpu_bwmon_data }, + /* BWMONv5 */ + { .compatible = "qcom,sdm845-llcc-bwmon", .data = &sdm845_llcc_bwmon_data }, + { .compatible = "qcom,sc7280-llcc-bwmon", .data = &sc7280_llcc_bwmon_data }, + + /* Compatibles kept for legacy reasons */ + { .compatible = "qcom,sc7280-cpu-bwmon", .data = &sdm845_cpu_bwmon_data }, + { .compatible = "qcom,sc8280xp-cpu-bwmon", .data = &sdm845_cpu_bwmon_data }, + { .compatible = "qcom,sm8550-cpu-bwmon", .data = &sdm845_cpu_bwmon_data }, {} }; MODULE_DEVICE_TABLE(of, bwmon_of_match); -- cgit v1.2.3 From 8c47b8253f4cfd8b4dbda8c9adc1d0b1d7f3009d Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 10 Mar 2023 08:47:04 -0600 Subject: firmware: Use of_property_present() for testing DT property presence It is preferred to use typed property access functions (i.e. of_property_read_ functions) rather than low-level of_get_property/of_find_property functions for reading properties. As part of this, convert of_get_property/of_find_property calls to the recently added of_property_present() helper when we just want to test for presence of a property and nothing more. Signed-off-by: Rob Herring Acked-by: Sudeep Holla Signed-off-by: Thierry Reding --- drivers/firmware/arm_scmi/optee.c | 2 +- drivers/firmware/tegra/bpmp.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/firmware/arm_scmi/optee.c b/drivers/firmware/arm_scmi/optee.c index 929720387102..e123de6e8c67 100644 --- a/drivers/firmware/arm_scmi/optee.c +++ b/drivers/firmware/arm_scmi/optee.c @@ -403,7 +403,7 @@ out: static int setup_shmem(struct device *dev, struct scmi_chan_info *cinfo, struct scmi_optee_channel *channel) { - if (of_find_property(cinfo->dev->of_node, "shmem", NULL)) + if (of_property_present(cinfo->dev->of_node, "shmem")) return setup_static_shmem(dev, cinfo, channel); else return setup_dynamic_shmem(dev, channel); diff --git a/drivers/firmware/tegra/bpmp.c b/drivers/firmware/tegra/bpmp.c index 042c2043929d..8b5e5daa9fae 100644 --- a/drivers/firmware/tegra/bpmp.c +++ b/drivers/firmware/tegra/bpmp.c @@ -764,19 +764,19 @@ static int tegra_bpmp_probe(struct platform_device *pdev) if (err < 0) goto free_mrq; - if (of_find_property(pdev->dev.of_node, "#clock-cells", NULL)) { + if (of_property_present(pdev->dev.of_node, "#clock-cells")) { err = tegra_bpmp_init_clocks(bpmp); if (err < 0) goto free_mrq; } - if (of_find_property(pdev->dev.of_node, "#reset-cells", NULL)) { + if (of_property_present(pdev->dev.of_node, "#reset-cells")) { err = tegra_bpmp_init_resets(bpmp); if (err < 0) goto free_mrq; } - if (of_find_property(pdev->dev.of_node, "#power-domain-cells", NULL)) { + if (of_property_present(pdev->dev.of_node, "#power-domain-cells")) { err = tegra_bpmp_init_powergates(bpmp); if (err < 0) goto free_mrq; -- cgit v1.2.3 From 9f68ff79ec2cb303f360a35eef5dd8f1f0f817e1 Mon Sep 17 00:00:00 2001 From: Cristian Marussi Date: Tue, 4 Apr 2023 12:50:26 +0100 Subject: firmware: arm_scmi: Add support for unidirectional mailbox channels Extend the SCMI transport layer to support mailbox controllers that expose communication channels that are unidirectional by nature. Signed-off-by: Cristian Marussi Link: https://lore.kernel.org/r/20230404115026.2828149-3-cristian.marussi@arm.com Signed-off-by: Sudeep Holla --- drivers/firmware/arm_scmi/mailbox.c | 95 ++++++++++++++++++++++++++++++++----- 1 file changed, 84 insertions(+), 11 deletions(-) (limited to 'drivers') diff --git a/drivers/firmware/arm_scmi/mailbox.c b/drivers/firmware/arm_scmi/mailbox.c index 112c285deb97..1efa5e9392c4 100644 --- a/drivers/firmware/arm_scmi/mailbox.c +++ b/drivers/firmware/arm_scmi/mailbox.c @@ -19,13 +19,15 @@ * struct scmi_mailbox - Structure representing a SCMI mailbox transport * * @cl: Mailbox Client - * @chan: Transmit/Receive mailbox channel + * @chan: Transmit/Receive mailbox uni/bi-directional channel + * @chan_receiver: Optional Receiver mailbox unidirectional channel * @cinfo: SCMI channel info * @shmem: Transmit/Receive shared memory area */ struct scmi_mailbox { struct mbox_client cl; struct mbox_chan *chan; + struct mbox_chan *chan_receiver; struct scmi_chan_info *cinfo; struct scmi_shared_mem __iomem *shmem; }; @@ -48,30 +50,62 @@ static void rx_callback(struct mbox_client *cl, void *m) static bool mailbox_chan_available(struct device_node *of_node, int idx) { + int num_mb; + + /* + * Just check if bidirrectional channels are involved, and check the + * index accordingly; proper full validation will be made later + * in mailbox_chan_setup(). + */ + num_mb = of_count_phandle_with_args(of_node, "mboxes", "#mbox-cells"); + if (num_mb == 3 && idx == 1) + idx = 2; + return !of_parse_phandle_with_args(of_node, "mboxes", "#mbox-cells", idx, NULL); } -static int mailbox_chan_validate(struct device *cdev) +/** + * mailbox_chan_validate - Validate transport configuration and map channels + * + * @cdev: Reference to the underlying transport device carrying the + * of_node descriptor to analyze. + * @a2p_rx_chan: A reference to an optional unidirectional channel to use + * for replies on the a2p channel. Set as zero if not present. + * @p2a_chan: A reference to the optional p2a channel. + * Set as zero if not present. + * + * At first, validate the transport configuration as described in terms of + * 'mboxes' and 'shmem', then determin which mailbox channel indexes are + * appropriate to be use in the current configuration. + * + * Return: 0 on Success or error + */ +static int mailbox_chan_validate(struct device *cdev, + int *a2p_rx_chan, int *p2a_chan) { int num_mb, num_sh, ret = 0; struct device_node *np = cdev->of_node; num_mb = of_count_phandle_with_args(np, "mboxes", "#mbox-cells"); num_sh = of_count_phandle_with_args(np, "shmem", NULL); + dev_dbg(cdev, "Found %d mboxes and %d shmems !\n", num_mb, num_sh); + /* Bail out if mboxes and shmem descriptors are inconsistent */ - if (num_mb <= 0 || num_sh > 2 || num_mb != num_sh) { - dev_warn(cdev, "Invalid channel descriptor for '%s'\n", - of_node_full_name(np)); + if (num_mb <= 0 || num_sh <= 0 || num_sh > 2 || num_mb > 3 || + (num_mb == 1 && num_sh != 1) || (num_mb == 3 && num_sh != 2)) { + dev_warn(cdev, + "Invalid channel descriptor for '%s' - mbs:%d shm:%d\n", + of_node_full_name(np), num_mb, num_sh); return -EINVAL; } + /* Bail out if provided shmem descriptors do not refer distinct areas */ if (num_sh > 1) { struct device_node *np_tx, *np_rx; np_tx = of_parse_phandle(np, "shmem", 0); np_rx = of_parse_phandle(np, "shmem", 1); - /* SCMI Tx and Rx shared mem areas have to be distinct */ if (!np_tx || !np_rx || np_tx == np_rx) { dev_warn(cdev, "Invalid shmem descriptor for '%s'\n", of_node_full_name(np)); @@ -82,6 +116,29 @@ static int mailbox_chan_validate(struct device *cdev) of_node_put(np_rx); } + /* Calculate channels IDs to use depending on mboxes/shmem layout */ + if (!ret) { + switch (num_mb) { + case 1: + *a2p_rx_chan = 0; + *p2a_chan = 0; + break; + case 2: + if (num_sh == 2) { + *a2p_rx_chan = 0; + *p2a_chan = 1; + } else { + *a2p_rx_chan = 1; + *p2a_chan = 0; + } + break; + case 3: + *a2p_rx_chan = 1; + *p2a_chan = 2; + break; + } + } + return ret; } @@ -92,15 +149,18 @@ static int mailbox_chan_setup(struct scmi_chan_info *cinfo, struct device *dev, struct device *cdev = cinfo->dev; struct scmi_mailbox *smbox; struct device_node *shmem; - int ret, idx = tx ? 0 : 1; + int ret, a2p_rx_chan, p2a_chan, idx = tx ? 0 : 1; struct mbox_client *cl; resource_size_t size; struct resource res; - ret = mailbox_chan_validate(cdev); + ret = mailbox_chan_validate(cdev, &a2p_rx_chan, &p2a_chan); if (ret) return ret; + if (!tx && !p2a_chan) + return -ENODEV; + smbox = devm_kzalloc(dev, sizeof(*smbox), GFP_KERNEL); if (!smbox) return -ENOMEM; @@ -130,15 +190,26 @@ static int mailbox_chan_setup(struct scmi_chan_info *cinfo, struct device *dev, cl->tx_block = false; cl->knows_txdone = tx; - smbox->chan = mbox_request_channel(cl, tx ? 0 : 1); + smbox->chan = mbox_request_channel(cl, tx ? 0 : p2a_chan); if (IS_ERR(smbox->chan)) { ret = PTR_ERR(smbox->chan); if (ret != -EPROBE_DEFER) - dev_err(cdev, "failed to request SCMI %s mailbox\n", - tx ? "Tx" : "Rx"); + dev_err(cdev, + "failed to request SCMI %s mailbox\n", desc); return ret; } + /* Additional unidirectional channel for TX if needed */ + if (tx && a2p_rx_chan) { + smbox->chan_receiver = mbox_request_channel(cl, a2p_rx_chan); + if (IS_ERR(smbox->chan_receiver)) { + ret = PTR_ERR(smbox->chan_receiver); + if (ret != -EPROBE_DEFER) + dev_err(cdev, "failed to request SCMI Tx Receiver mailbox\n"); + return ret; + } + } + cinfo->transport_info = smbox; smbox->cinfo = cinfo; @@ -152,8 +223,10 @@ static int mailbox_chan_free(int id, void *p, void *data) if (smbox && !IS_ERR(smbox->chan)) { mbox_free_channel(smbox->chan); + mbox_free_channel(smbox->chan_receiver); cinfo->transport_info = NULL; smbox->chan = NULL; + smbox->chan_receiver = NULL; smbox->cinfo = NULL; } -- cgit v1.2.3 From c299a2e6bf944b4218acc194a1cdf500b34e80aa Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Mon, 12 Dec 2022 23:25:49 +0100 Subject: soc: tegra: cbb: Drop empty platform remove function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit A remove callback just returning 0 is equivalent to no remove callback at all. So drop the useless function. Signed-off-by: Uwe Kleine-König Reviewed-by: Sumit Gupta Signed-off-by: Thierry Reding --- drivers/soc/tegra/cbb/tegra234-cbb.c | 6 ------ 1 file changed, 6 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/tegra/cbb/tegra234-cbb.c b/drivers/soc/tegra/cbb/tegra234-cbb.c index e23e8acfd7c7..cee87c92e53c 100644 --- a/drivers/soc/tegra/cbb/tegra234-cbb.c +++ b/drivers/soc/tegra/cbb/tegra234-cbb.c @@ -1173,11 +1173,6 @@ static int tegra234_cbb_probe(struct platform_device *pdev) return tegra_cbb_register(&cbb->base); } -static int tegra234_cbb_remove(struct platform_device *pdev) -{ - return 0; -} - static int __maybe_unused tegra234_cbb_resume_noirq(struct device *dev) { struct tegra234_cbb *cbb = dev_get_drvdata(dev); @@ -1195,7 +1190,6 @@ static const struct dev_pm_ops tegra234_cbb_pm = { static struct platform_driver tegra234_cbb_driver = { .probe = tegra234_cbb_probe, - .remove = tegra234_cbb_remove, .driver = { .name = "tegra234-cbb", .of_match_table = tegra234_cbb_dt_ids, -- cgit v1.2.3 From 42c67aa26271fd3c12947dc3983051ff5c0d3a73 Mon Sep 17 00:00:00 2001 From: Ye Xingchen Date: Wed, 15 Feb 2023 17:18:03 +0800 Subject: soc/tegra: flowctrl: Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Ye Xingchen Signed-off-by: Thierry Reding --- drivers/soc/tegra/flowctrl.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/tegra/flowctrl.c b/drivers/soc/tegra/flowctrl.c index 5db919d96aba..221202db3313 100644 --- a/drivers/soc/tegra/flowctrl.c +++ b/drivers/soc/tegra/flowctrl.c @@ -156,10 +156,8 @@ void flowctrl_cpu_suspend_exit(unsigned int cpuid) static int tegra_flowctrl_probe(struct platform_device *pdev) { void __iomem *base = tegra_flowctrl_base; - struct resource *res; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - tegra_flowctrl_base = devm_ioremap_resource(&pdev->dev, res); + tegra_flowctrl_base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); if (IS_ERR(tegra_flowctrl_base)) return PTR_ERR(tegra_flowctrl_base); -- cgit v1.2.3 From e8476011f04b1ee4360f755ed19cbbddf12dc83e Mon Sep 17 00:00:00 2001 From: Nick Alcock Date: Fri, 17 Feb 2023 14:10:44 +0000 Subject: ARM: tegra: Remove MODULE_LICENSE in non-modules Since commit 8b41fc4454e ("kbuild: create modules.builtin without Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations are used to identify modules. As a consequence, uses of the macro in non-modules will cause modprobe to misidentify their containing object file as a module when it is not (false positives), and modprobe might succeed rather than failing with a suitable error message. So remove it in the files in this commit, none of which can be built as modules. Signed-off-by: Nick Alcock Suggested-by: Luis Chamberlain Cc: Luis Chamberlain Cc: linux-modules@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Hitomi Hasegawa Cc: Thierry Reding Cc: Jonathan Hunter Cc: linux-tegra@vger.kernel.org Signed-off-by: Thierry Reding --- drivers/amba/tegra-ahb.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/amba/tegra-ahb.c b/drivers/amba/tegra-ahb.c index 0b2c20fddb7c..c0e8b765522d 100644 --- a/drivers/amba/tegra-ahb.c +++ b/drivers/amba/tegra-ahb.c @@ -285,5 +285,4 @@ module_platform_driver(tegra_ahb_driver); MODULE_AUTHOR("Hiroshi DOYU "); MODULE_DESCRIPTION("Tegra AHB driver"); -MODULE_LICENSE("GPL v2"); MODULE_ALIAS("platform:" DRV_NAME); -- cgit v1.2.3 From 6854f2759842baf94c8970b52f443aaee18af1bf Mon Sep 17 00:00:00 2001 From: Nick Alcock Date: Tue, 28 Feb 2023 13:02:15 +0000 Subject: soc/tegra: cbb: Remove MODULE_LICENSE in non-modules Since commit 8b41fc4454e ("kbuild: create modules.builtin without Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations are used to identify modules. As a consequence, uses of the macro in non-modules will cause modprobe to misidentify their containing object file as a module when it is not (false positives), and modprobe might succeed rather than failing with a suitable error message. So remove it in the files in this commit, none of which can be built as modules. Signed-off-by: Nick Alcock Suggested-by: Luis Chamberlain Cc: Luis Chamberlain Cc: linux-modules@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Hitomi Hasegawa Cc: Thierry Reding Cc: Jonathan Hunter Cc: linux-tegra@vger.kernel.org Signed-off-by: Thierry Reding --- drivers/soc/tegra/cbb/tegra194-cbb.c | 1 - drivers/soc/tegra/cbb/tegra234-cbb.c | 1 - 2 files changed, 2 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/tegra/cbb/tegra194-cbb.c b/drivers/soc/tegra/cbb/tegra194-cbb.c index a05fc2caff3b..64574da3ced0 100644 --- a/drivers/soc/tegra/cbb/tegra194-cbb.c +++ b/drivers/soc/tegra/cbb/tegra194-cbb.c @@ -2358,4 +2358,3 @@ module_exit(tegra194_cbb_exit); MODULE_AUTHOR("Sumit Gupta "); MODULE_DESCRIPTION("Control Backbone error handling driver for Tegra194"); -MODULE_LICENSE("GPL"); diff --git a/drivers/soc/tegra/cbb/tegra234-cbb.c b/drivers/soc/tegra/cbb/tegra234-cbb.c index cee87c92e53c..5d16161b2566 100644 --- a/drivers/soc/tegra/cbb/tegra234-cbb.c +++ b/drivers/soc/tegra/cbb/tegra234-cbb.c @@ -1211,4 +1211,3 @@ static void __exit tegra234_cbb_exit(void) module_exit(tegra234_cbb_exit); MODULE_DESCRIPTION("Control Backbone 2.0 error handling driver for Tegra234"); -MODULE_LICENSE("GPL"); -- cgit v1.2.3 From 056a6e1db2f1cd6faa8c62c508c84850fe300f05 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Thu, 27 Oct 2022 14:56:25 +0800 Subject: soc/tegra: cbb: tegra194: Use of_address_count() helper After commit 16988c742968 ("of/address: introduce of_address_count() helper"), We can use of_address_count() to instead of open-coding it. Signed-off-by: Yang Yingliang Signed-off-by: Thierry Reding --- drivers/soc/tegra/cbb/tegra194-cbb.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/tegra/cbb/tegra194-cbb.c b/drivers/soc/tegra/cbb/tegra194-cbb.c index 64574da3ced0..54d7ce05c636 100644 --- a/drivers/soc/tegra/cbb/tegra194-cbb.c +++ b/drivers/soc/tegra/cbb/tegra194-cbb.c @@ -2190,7 +2190,6 @@ MODULE_DEVICE_TABLE(of, tegra194_cbb_match); static int tegra194_cbb_get_bridges(struct tegra194_cbb *cbb, struct device_node *np) { struct tegra_cbb *entry; - struct resource res; unsigned long flags; unsigned int i; int err; @@ -2210,8 +2209,7 @@ static int tegra194_cbb_get_bridges(struct tegra194_cbb *cbb, struct device_node spin_unlock_irqrestore(&cbb_lock, flags); if (!cbb->bridges) { - while (of_address_to_resource(np, cbb->num_bridges, &res) == 0) - cbb->num_bridges++; + cbb->num_bridges = of_address_count(np); cbb->bridges = devm_kcalloc(cbb->base.dev, cbb->num_bridges, sizeof(*cbb->bridges), GFP_KERNEL); -- cgit v1.2.3 From 821d96e3a006d09ca9aa3d982c50f3d86fa55500 Mon Sep 17 00:00:00 2001 From: Kartik Date: Tue, 17 Jan 2023 14:00:55 +0530 Subject: soc/tegra: fuse: Remove nvmem root only access To read fuse values, various "non-root" userspace applications require access to nvmem binary interface. Remove root only access for nvmem userspace binary interface. Signed-off-by: Kartik Signed-off-by: Thierry Reding --- drivers/soc/tegra/fuse/fuse-tegra.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c index f02953f793e9..d7a37f5d4527 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra.c +++ b/drivers/soc/tegra/fuse/fuse-tegra.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2013-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2013-2023, NVIDIA CORPORATION. All rights reserved. */ #include @@ -166,7 +166,7 @@ static int tegra_fuse_probe(struct platform_device *pdev) nvmem.nkeepout = fuse->soc->num_keepouts; nvmem.type = NVMEM_TYPE_OTP; nvmem.read_only = true; - nvmem.root_only = true; + nvmem.root_only = false; nvmem.reg_read = tegra_fuse_read; nvmem.size = fuse->soc->info->size; nvmem.word_size = 4; -- cgit v1.2.3 From 5808c532ca0a983d643319caca44f2bcb148298f Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Mon, 20 Mar 2023 07:43:42 -0700 Subject: soc: qcom: smd-rpm: Use GFP_ATOMIC in write path Preparing for better lockdep annotations for things that happen in runpm suspend/resume path vs shrinker/reclaim in the following patches, we need to avoid allocations that can trigger reclaim in the icc_set_bw() path. In the RPMh case, rpmh_write_batch() already uses GFP_ATOMIC, so it should be reasonable to use in the smd-rpm case as well. Alternatively, 256bytes is small enough for a function that isn't called recursively to allocate on-stack. Signed-off-by: Rob Clark Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230320144356.803762-21-robdclark@gmail.com --- drivers/soc/qcom/smd-rpm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c index 523627d5d398..0c1aa809cc4e 100644 --- a/drivers/soc/qcom/smd-rpm.c +++ b/drivers/soc/qcom/smd-rpm.c @@ -113,7 +113,7 @@ int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm, if (WARN_ON(size >= 256)) return -EINVAL; - pkt = kmalloc(size, GFP_KERNEL); + pkt = kmalloc(size, GFP_ATOMIC); if (!pkt) return -ENOMEM; -- cgit v1.2.3 From 88704a0cd71909c3107561261412a5d5beb23358 Mon Sep 17 00:00:00 2001 From: Tushar Nimkar Date: Thu, 6 Apr 2023 17:27:32 +0530 Subject: soc: qcom: rpmh-rsc: Support RSC v3 minor versions RSC v3 register offsets are same for all minor versions of v3. Fix a minor version check to pick correct offsets for all v3 minor versions. Fixes: 40482e4f7364 ("soc: qcom: rpmh-rsc: Add support for RSC v3 register offsets") Signed-off-by: Tushar Nimkar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230406115732.9293-1-quic_tnimkar@quicinc.com --- drivers/soc/qcom/rpmh-rsc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c index 0f8b2249f889..f93544f6d796 100644 --- a/drivers/soc/qcom/rpmh-rsc.c +++ b/drivers/soc/qcom/rpmh-rsc.c @@ -1073,7 +1073,7 @@ static int rpmh_rsc_probe(struct platform_device *pdev) drv->ver.minor = rsc_id & (MINOR_VER_MASK << MINOR_VER_SHIFT); drv->ver.minor >>= MINOR_VER_SHIFT; - if (drv->ver.major == 3 && drv->ver.minor == 0) + if (drv->ver.major == 3 && drv->ver.minor >= 0) drv->regs = rpmh_rsc_reg_offset_ver_3_0; else drv->regs = rpmh_rsc_reg_offset_ver_2_7; -- cgit v1.2.3 From 2afbf43a4aec6e31dac7835e65d52c867f2be400 Mon Sep 17 00:00:00 2001 From: Abel Vesa Date: Fri, 7 Apr 2023 13:50:26 +0300 Subject: soc: qcom: Make the Qualcomm UFS/SDCC ICE a dedicated driver This takes the already existing duplicated support in both ufs-qcom and sdhci-msm drivers and makes it a dedicated driver that can be used by both mentioned drivers. The reason for this is because, staring with SM8550, the ICE IP block is shared between UFS and SDCC, which means we need to probe a dedicated device and share it between those two consumers. So let's add the ICE dedicated driver as a soc driver. Platforms that already have ICE supported, will use it as a library as the of_qcom_ice_get will return an ICE instance created for the consumer device. This allows the backwards compatibility with old-style devicetree approach. Also, add support to HW version 4.x since it works out-of-the-box with the current driver. The 4.x HW version is found on SM8550 platform. Signed-off-by: Abel Vesa Reviewed-by: Bjorn Andersson Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230407105029.2274111-4-abel.vesa@linaro.org --- drivers/soc/qcom/Kconfig | 4 + drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/ice.c | 366 ++++++++++++++++++++++++++++++++++++++++++++++ include/soc/qcom/ice.h | 37 +++++ 4 files changed, 408 insertions(+) create mode 100644 drivers/soc/qcom/ice.c create mode 100644 include/soc/qcom/ice.h (limited to 'drivers') diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index a8f283086a21..64a977e75ec4 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -275,4 +275,8 @@ config QCOM_ICC_BWMON the fixed bandwidth votes from cpufreq (CPU nodes) thus achieve high memory throughput even with lower CPU frequencies. +config QCOM_INLINE_CRYPTO_ENGINE + tristate + select QCOM_SCM + endmenu diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index 6e88da899f60..0f43a88b4894 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -32,3 +32,4 @@ obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o obj-$(CONFIG_QCOM_ICC_BWMON) += icc-bwmon.o +obj-$(CONFIG_QCOM_INLINE_CRYPTO_ENGINE) += ice.o diff --git a/drivers/soc/qcom/ice.c b/drivers/soc/qcom/ice.c new file mode 100644 index 000000000000..a6123ea96272 --- /dev/null +++ b/drivers/soc/qcom/ice.c @@ -0,0 +1,366 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Qualcomm ICE (Inline Crypto Engine) support. + * + * Copyright (c) 2013-2019, The Linux Foundation. All rights reserved. + * Copyright (c) 2019, Google LLC + * Copyright (c) 2023, Linaro Limited + */ + +#include +#include +#include +#include +#include + +#include + +#include + +#define AES_256_XTS_KEY_SIZE 64 + +/* QCOM ICE registers */ +#define QCOM_ICE_REG_VERSION 0x0008 +#define QCOM_ICE_REG_FUSE_SETTING 0x0010 +#define QCOM_ICE_REG_BIST_STATUS 0x0070 +#define QCOM_ICE_REG_ADVANCED_CONTROL 0x1000 + +/* BIST ("built-in self-test") status flags */ +#define QCOM_ICE_BIST_STATUS_MASK GENMASK(31, 28) + +#define QCOM_ICE_FUSE_SETTING_MASK 0x1 +#define QCOM_ICE_FORCE_HW_KEY0_SETTING_MASK 0x2 +#define QCOM_ICE_FORCE_HW_KEY1_SETTING_MASK 0x4 + +#define qcom_ice_writel(engine, val, reg) \ + writel((val), (engine)->base + (reg)) + +#define qcom_ice_readl(engine, reg) \ + readl((engine)->base + (reg)) + +struct qcom_ice { + struct device *dev; + void __iomem *base; + struct device_link *link; + + struct clk *core_clk; +}; + +static bool qcom_ice_check_supported(struct qcom_ice *ice) +{ + u32 regval = qcom_ice_readl(ice, QCOM_ICE_REG_VERSION); + struct device *dev = ice->dev; + int major = FIELD_GET(GENMASK(31, 24), regval); + int minor = FIELD_GET(GENMASK(23, 16), regval); + int step = FIELD_GET(GENMASK(15, 0), regval); + + /* For now this driver only supports ICE version 3 and 4. */ + if (major != 3 && major != 4) { + dev_warn(dev, "Unsupported ICE version: v%d.%d.%d\n", + major, minor, step); + return false; + } + + dev_info(dev, "Found QC Inline Crypto Engine (ICE) v%d.%d.%d\n", + major, minor, step); + + /* If fuses are blown, ICE might not work in the standard way. */ + regval = qcom_ice_readl(ice, QCOM_ICE_REG_FUSE_SETTING); + if (regval & (QCOM_ICE_FUSE_SETTING_MASK | + QCOM_ICE_FORCE_HW_KEY0_SETTING_MASK | + QCOM_ICE_FORCE_HW_KEY1_SETTING_MASK)) { + dev_warn(dev, "Fuses are blown; ICE is unusable!\n"); + return false; + } + + return true; +} + +static void qcom_ice_low_power_mode_enable(struct qcom_ice *ice) +{ + u32 regval; + + regval = qcom_ice_readl(ice, QCOM_ICE_REG_ADVANCED_CONTROL); + + /* Enable low power mode sequence */ + regval |= 0x7000; + qcom_ice_writel(ice, regval, QCOM_ICE_REG_ADVANCED_CONTROL); +} + +static void qcom_ice_optimization_enable(struct qcom_ice *ice) +{ + u32 regval; + + /* ICE Optimizations Enable Sequence */ + regval = qcom_ice_readl(ice, QCOM_ICE_REG_ADVANCED_CONTROL); + regval |= 0xd807100; + /* ICE HPG requires delay before writing */ + udelay(5); + qcom_ice_writel(ice, regval, QCOM_ICE_REG_ADVANCED_CONTROL); + udelay(5); +} + +/* + * Wait until the ICE BIST (built-in self-test) has completed. + * + * This may be necessary before ICE can be used. + * Note that we don't really care whether the BIST passed or failed; + * we really just want to make sure that it isn't still running. This is + * because (a) the BIST is a FIPS compliance thing that never fails in + * practice, (b) ICE is documented to reject crypto requests if the BIST + * fails, so we needn't do it in software too, and (c) properly testing + * storage encryption requires testing the full storage stack anyway, + * and not relying on hardware-level self-tests. + */ +static int qcom_ice_wait_bist_status(struct qcom_ice *ice) +{ + u32 regval; + int err; + + err = readl_poll_timeout(ice->base + QCOM_ICE_REG_BIST_STATUS, + regval, !(regval & QCOM_ICE_BIST_STATUS_MASK), + 50, 5000); + if (err) + dev_err(ice->dev, "Timed out waiting for ICE self-test to complete\n"); + + return err; +} + +int qcom_ice_enable(struct qcom_ice *ice) +{ + qcom_ice_low_power_mode_enable(ice); + qcom_ice_optimization_enable(ice); + + return qcom_ice_wait_bist_status(ice); +} +EXPORT_SYMBOL_GPL(qcom_ice_enable); + +int qcom_ice_resume(struct qcom_ice *ice) +{ + struct device *dev = ice->dev; + int err; + + err = clk_prepare_enable(ice->core_clk); + if (err) { + dev_err(dev, "failed to enable core clock (%d)\n", + err); + return err; + } + + return qcom_ice_wait_bist_status(ice); +} +EXPORT_SYMBOL_GPL(qcom_ice_resume); + +int qcom_ice_suspend(struct qcom_ice *ice) +{ + clk_disable_unprepare(ice->core_clk); + + return 0; +} +EXPORT_SYMBOL_GPL(qcom_ice_suspend); + +int qcom_ice_program_key(struct qcom_ice *ice, + u8 algorithm_id, u8 key_size, + const u8 crypto_key[], u8 data_unit_size, + int slot) +{ + struct device *dev = ice->dev; + union { + u8 bytes[AES_256_XTS_KEY_SIZE]; + u32 words[AES_256_XTS_KEY_SIZE / sizeof(u32)]; + } key; + int i; + int err; + + /* Only AES-256-XTS has been tested so far. */ + if (algorithm_id != QCOM_ICE_CRYPTO_ALG_AES_XTS || + key_size != QCOM_ICE_CRYPTO_KEY_SIZE_256) { + dev_err_ratelimited(dev, + "Unhandled crypto capability; algorithm_id=%d, key_size=%d\n", + algorithm_id, key_size); + return -EINVAL; + } + + memcpy(key.bytes, crypto_key, AES_256_XTS_KEY_SIZE); + + /* The SCM call requires that the key words are encoded in big endian */ + for (i = 0; i < ARRAY_SIZE(key.words); i++) + __cpu_to_be32s(&key.words[i]); + + err = qcom_scm_ice_set_key(slot, key.bytes, AES_256_XTS_KEY_SIZE, + QCOM_SCM_ICE_CIPHER_AES_256_XTS, + data_unit_size); + + memzero_explicit(&key, sizeof(key)); + + return err; +} +EXPORT_SYMBOL_GPL(qcom_ice_program_key); + +int qcom_ice_evict_key(struct qcom_ice *ice, int slot) +{ + return qcom_scm_ice_invalidate_key(slot); +} +EXPORT_SYMBOL_GPL(qcom_ice_evict_key); + +static struct qcom_ice *qcom_ice_create(struct device *dev, + void __iomem *base) +{ + struct qcom_ice *engine; + + if (!qcom_scm_is_available()) + return ERR_PTR(-EPROBE_DEFER); + + if (!qcom_scm_ice_available()) { + dev_warn(dev, "ICE SCM interface not found\n"); + return NULL; + } + + engine = devm_kzalloc(dev, sizeof(*engine), GFP_KERNEL); + if (!engine) + return ERR_PTR(-ENOMEM); + + engine->dev = dev; + engine->base = base; + + /* + * Legacy DT binding uses different clk names for each consumer, + * so lets try those first. If none of those are a match, it means + * the we only have one clock and it is part of the dedicated DT node. + * Also, enable the clock before we check what HW version the driver + * supports. + */ + engine->core_clk = devm_clk_get_optional_enabled(dev, "ice_core_clk"); + if (!engine->core_clk) + engine->core_clk = devm_clk_get_optional_enabled(dev, "ice"); + if (!engine->core_clk) + engine->core_clk = devm_clk_get_enabled(dev, NULL); + if (IS_ERR(engine->core_clk)) + return ERR_CAST(engine->core_clk); + + if (!qcom_ice_check_supported(engine)) + return ERR_PTR(-EOPNOTSUPP); + + dev_dbg(dev, "Registered Qualcomm Inline Crypto Engine\n"); + + return engine; +} + +/** + * of_qcom_ice_get() - get an ICE instance from a DT node + * @dev: device pointer for the consumer device + * + * This function will provide an ICE instance either by creating one for the + * consumer device if its DT node provides the 'ice' reg range and the 'ice' + * clock (for legacy DT style). On the other hand, if consumer provides a + * phandle via 'qcom,ice' property to an ICE DT, the ICE instance will already + * be created and so this function will return that instead. + * + * Return: ICE pointer on success, NULL if there is no ICE data provided by the + * consumer or ERR_PTR() on error. + */ +struct qcom_ice *of_qcom_ice_get(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct qcom_ice *ice; + struct device_node *node; + struct resource *res; + void __iomem *base; + + if (!dev || !dev->of_node) + return ERR_PTR(-ENODEV); + + /* + * In order to support legacy style devicetree bindings, we need + * to create the ICE instance using the consumer device and the reg + * range called 'ice' it provides. + */ + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ice"); + if (res) { + base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(base)) + return ERR_CAST(base); + + /* create ICE instance using consumer dev */ + return qcom_ice_create(&pdev->dev, base); + } + + /* + * If the consumer node does not provider an 'ice' reg range + * (legacy DT binding), then it must at least provide a phandle + * to the ICE devicetree node, otherwise ICE is not supported. + */ + node = of_parse_phandle(dev->of_node, "qcom,ice", 0); + if (!node) + return NULL; + + pdev = of_find_device_by_node(node); + if (!pdev) { + dev_err(dev, "Cannot find device node %s\n", node->name); + ice = ERR_PTR(-EPROBE_DEFER); + goto out; + } + + ice = platform_get_drvdata(pdev); + if (!ice) { + dev_err(dev, "Cannot get ice instance from %s\n", + dev_name(&pdev->dev)); + platform_device_put(pdev); + ice = ERR_PTR(-EPROBE_DEFER); + goto out; + } + + ice->link = device_link_add(dev, &pdev->dev, DL_FLAG_AUTOREMOVE_SUPPLIER); + if (!ice->link) { + dev_err(&pdev->dev, + "Failed to create device link to consumer %s\n", + dev_name(dev)); + platform_device_put(pdev); + ice = ERR_PTR(-EINVAL); + } + +out: + of_node_put(node); + + return ice; +} +EXPORT_SYMBOL_GPL(of_qcom_ice_get); + +static int qcom_ice_probe(struct platform_device *pdev) +{ + struct qcom_ice *engine; + void __iomem *base; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) { + dev_warn(&pdev->dev, "ICE registers not found\n"); + return PTR_ERR(base); + } + + engine = qcom_ice_create(&pdev->dev, base); + if (IS_ERR(engine)) + return PTR_ERR(engine); + + platform_set_drvdata(pdev, engine); + + return 0; +} + +static const struct of_device_id qcom_ice_of_match_table[] = { + { .compatible = "qcom,inline-crypto-engine" }, + { }, +}; +MODULE_DEVICE_TABLE(of, qcom_ice_of_match_table); + +static struct platform_driver qcom_ice_driver = { + .probe = qcom_ice_probe, + .driver = { + .name = "qcom-ice", + .of_match_table = qcom_ice_of_match_table, + }, +}; + +module_platform_driver(qcom_ice_driver); + +MODULE_DESCRIPTION("Qualcomm Inline Crypto Engine driver"); +MODULE_LICENSE("GPL"); diff --git a/include/soc/qcom/ice.h b/include/soc/qcom/ice.h new file mode 100644 index 000000000000..5870a94599a2 --- /dev/null +++ b/include/soc/qcom/ice.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef __QCOM_ICE_H__ +#define __QCOM_ICE_H__ + +#include + +struct qcom_ice; + +enum qcom_ice_crypto_key_size { + QCOM_ICE_CRYPTO_KEY_SIZE_INVALID = 0x0, + QCOM_ICE_CRYPTO_KEY_SIZE_128 = 0x1, + QCOM_ICE_CRYPTO_KEY_SIZE_192 = 0x2, + QCOM_ICE_CRYPTO_KEY_SIZE_256 = 0x3, + QCOM_ICE_CRYPTO_KEY_SIZE_512 = 0x4, +}; + +enum qcom_ice_crypto_alg { + QCOM_ICE_CRYPTO_ALG_AES_XTS = 0x0, + QCOM_ICE_CRYPTO_ALG_BITLOCKER_AES_CBC = 0x1, + QCOM_ICE_CRYPTO_ALG_AES_ECB = 0x2, + QCOM_ICE_CRYPTO_ALG_ESSIV_AES_CBC = 0x3, +}; + +int qcom_ice_enable(struct qcom_ice *ice); +int qcom_ice_resume(struct qcom_ice *ice); +int qcom_ice_suspend(struct qcom_ice *ice); +int qcom_ice_program_key(struct qcom_ice *ice, + u8 algorithm_id, u8 key_size, + const u8 crypto_key[], u8 data_unit_size, + int slot); +int qcom_ice_evict_key(struct qcom_ice *ice, int slot); +struct qcom_ice *of_qcom_ice_get(struct device *dev); +#endif /* __QCOM_ICE_H__ */ -- cgit v1.2.3 From be4c5c6e84429e87cfdf1c8be350a49a714a93e2 Mon Sep 17 00:00:00 2001 From: Diogo Ivo Date: Wed, 22 Mar 2023 23:40:50 +0000 Subject: memory: tegra: read values from correct device When reading MR18 for Dev1 the code was incorrectly reading the value corresponding to Dev0, so fix this by adjusting the index according to the Tegra X1 TRM. Signed-off-by: Diogo Ivo Acked-by: Thierry Reding Link: https://lore.kernel.org/r/20230322234050.47332-1-diogo.ivo@tecnico.ulisboa.pt Signed-off-by: Krzysztof Kozlowski --- drivers/memory/tegra/tegra210-emc-cc-r21021.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/memory/tegra/tegra210-emc-cc-r21021.c b/drivers/memory/tegra/tegra210-emc-cc-r21021.c index cc76adb8d7e8..4cb608c71ead 100644 --- a/drivers/memory/tegra/tegra210-emc-cc-r21021.c +++ b/drivers/memory/tegra/tegra210-emc-cc-r21021.c @@ -277,7 +277,7 @@ static u32 update_clock_tree_delay(struct tegra210_emc *emc, int type) /* * Dev1 LSB. */ - value = tegra210_emc_mrr_read(emc, 2, 18); + value = tegra210_emc_mrr_read(emc, 1, 18); for (i = 0; i < emc->num_channels; i++) { temp[i][0] |= (value & 0x00ff) >> 0; -- cgit v1.2.3 From 3ec0e1ea4770e40575bfb2bb4e9ebbbaa3c80d3f Mon Sep 17 00:00:00 2001 From: Alexandre Mergnat Date: Fri, 7 Apr 2023 11:13:51 +0200 Subject: memory: mtk-smi: mt8365: Add SMI Support Add MT8365 SMI common support. Reviewed-by: Yong Wu Signed-off-by: Alexandre Mergnat Link: https://lore.kernel.org/r/20230407-smi-driver-v2-1-8da6683cdb5c@baylibre.com Signed-off-by: Krzysztof Kozlowski --- drivers/memory/mtk-smi.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers') diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index 5a9754442bc7..6523cb510518 100644 --- a/drivers/memory/mtk-smi.c +++ b/drivers/memory/mtk-smi.c @@ -713,6 +713,11 @@ static const struct mtk_smi_common_plat mtk_smi_sub_common_mt8195 = { .has_gals = true, }; +static const struct mtk_smi_common_plat mtk_smi_common_mt8365 = { + .type = MTK_SMI_GEN2, + .bus_sel = F_MMU1_LARB(2) | F_MMU1_LARB(4), +}; + static const struct of_device_id mtk_smi_common_of_ids[] = { {.compatible = "mediatek,mt2701-smi-common", .data = &mtk_smi_common_gen1}, {.compatible = "mediatek,mt2712-smi-common", .data = &mtk_smi_common_gen2}, @@ -728,6 +733,7 @@ static const struct of_device_id mtk_smi_common_of_ids[] = { {.compatible = "mediatek,mt8195-smi-common-vdo", .data = &mtk_smi_common_mt8195_vdo}, {.compatible = "mediatek,mt8195-smi-common-vpp", .data = &mtk_smi_common_mt8195_vpp}, {.compatible = "mediatek,mt8195-smi-sub-common", .data = &mtk_smi_sub_common_mt8195}, + {.compatible = "mediatek,mt8365-smi-common", .data = &mtk_smi_common_mt8365}, {} }; -- cgit v1.2.3 From 5ce5e0d08e340ab13169a5f33ed5f98000891a61 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Mon, 3 Apr 2023 11:33:04 +0200 Subject: soc: mediatek: Kconfig: Add MTK_CMDQ dependency to MTK_MMSYS The mtk-mmsys and mutex drivers do have a dependency on MTK_CMDQ, even though both can work with *or* without it: since CMDQ support can be enabled either as module or as built-in, it is necessary to add a depends rule in Kconfig, so that we disallow building both mtk-mmsys and mtk-mutex as built-in if mtk-cmdq-helper is built as a module, otherwise obvious linker issues appear. Signed-off-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230403093304.276418-1-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger --- drivers/soc/mediatek/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig index d6b83a5508ca..a88cf04fc803 100644 --- a/drivers/soc/mediatek/Kconfig +++ b/drivers/soc/mediatek/Kconfig @@ -76,6 +76,7 @@ config MTK_MMSYS tristate "MediaTek MMSYS Support" default ARCH_MEDIATEK depends on HAS_IOMEM + depends on MTK_CMDQ || MTK_CMDQ=n help Say yes here to add support for the MediaTek Multimedia Subsystem (MMSYS). -- cgit v1.2.3 From 04ebdc354895e1609ac133b40f8e8d2e0f16e450 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 10 Apr 2023 18:27:26 -0500 Subject: bus: vexpress-config: Add explicit of_platform.h include vexpress-config uses of_platform_* functions which are declared in of_platform.h. of_platform.h gets implicitly included by of_device.h, but that is going to be removed soon. Nothing else depends on of_device.h so it can be dropped. Signed-off-by: Rob Herring Acked-by: Liviu Dudau Link: https://lore.kernel.org/r/20230410232727.1562115-1-robh@kernel.org Signed-off-by: Sudeep Holla --- drivers/bus/vexpress-config.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/bus/vexpress-config.c b/drivers/bus/vexpress-config.c index a58ac0c8e282..472a570bd53a 100644 --- a/drivers/bus/vexpress-config.c +++ b/drivers/bus/vexpress-config.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include -- cgit v1.2.3 From 04523aceae8c89d3c91ff33bdde6892f63a60f35 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Wed, 12 Oct 2022 16:00:32 +0200 Subject: soc: ti: smartreflex: Simplify getting the opam_sr pointer MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The probe function stores the sr_info pointer using platform_set_drvdata(). Use the corresponding platform_get_drvdata() to retrieve that pointer in the remove and shutdown functions. This simplifies these functions and makes error handling unnecessary. This is a good thing as at least for .remove() returning an error code doesn't have the desired effect. This is a preparation for making platform remove callbacks return void. Signed-off-by: Uwe Kleine-König Reviewed-by: Tony Lindgren Signed-off-by: Arnd Bergmann --- drivers/soc/ti/smartreflex.c | 30 ++---------------------------- 1 file changed, 2 insertions(+), 28 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/ti/smartreflex.c b/drivers/soc/ti/smartreflex.c index 9d9496e0a94c..da7898239a46 100644 --- a/drivers/soc/ti/smartreflex.c +++ b/drivers/soc/ti/smartreflex.c @@ -937,21 +937,8 @@ err_list_del: static int omap_sr_remove(struct platform_device *pdev) { - struct omap_sr_data *pdata = pdev->dev.platform_data; struct device *dev = &pdev->dev; - struct omap_sr *sr_info; - - if (!pdata) { - dev_err(&pdev->dev, "%s: platform data missing\n", __func__); - return -EINVAL; - } - - sr_info = _sr_lookup(pdata->voltdm); - if (IS_ERR(sr_info)) { - dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", - __func__); - return PTR_ERR(sr_info); - } + struct omap_sr *sr_info = platform_get_drvdata(pdev); if (sr_info->autocomp_active) sr_stop_vddautocomp(sr_info); @@ -965,20 +952,7 @@ static int omap_sr_remove(struct platform_device *pdev) static void omap_sr_shutdown(struct platform_device *pdev) { - struct omap_sr_data *pdata = pdev->dev.platform_data; - struct omap_sr *sr_info; - - if (!pdata) { - dev_err(&pdev->dev, "%s: platform data missing\n", __func__); - return; - } - - sr_info = _sr_lookup(pdata->voltdm); - if (IS_ERR(sr_info)) { - dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", - __func__); - return; - } + struct omap_sr *sr_info = platform_get_drvdata(pdev); if (sr_info->autocomp_active) sr_stop_vddautocomp(sr_info); -- cgit v1.2.3