From f78a26f55b2438c439609fc90b473f7f08f5b697 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 14 Dec 2011 01:01:05 +0900 Subject: sh: pfc: Variable bitfield width config register support Add support for variable config reg hardware by adding the macro PINMUX_CFG_REG_VAR(). The width of each bitfield needs to be passed to the macro, and the correct space must be consumed by each bitfield in the enum table following the macro. Data registers still need to have fixed bitfields. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/linux/sh_pfc.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'include/linux/sh_pfc.h') diff --git a/include/linux/sh_pfc.h b/include/linux/sh_pfc.h index 91666a58529d..84538c42d64a 100644 --- a/include/linux/sh_pfc.h +++ b/include/linux/sh_pfc.h @@ -45,12 +45,19 @@ struct pinmux_cfg_reg { unsigned long reg, reg_width, field_width; unsigned long *cnt; pinmux_enum_t *enum_ids; + unsigned long *var_field_width; }; #define PINMUX_CFG_REG(name, r, r_width, f_width) \ .reg = r, .reg_width = r_width, .field_width = f_width, \ .cnt = (unsigned long [r_width / f_width]) {}, \ - .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \ + .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) + +#define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \ + .reg = r, .reg_width = r_width, \ + .cnt = (unsigned long [r_width]) {}, \ + .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \ + .enum_ids = (pinmux_enum_t []) struct pinmux_data_reg { unsigned long reg, reg_width, reg_shadow; -- cgit v1.2.3