From 71778f7940f0b496aa1ca1134f3b70b425a59bab Mon Sep 17 00:00:00 2001 From: Ranjani Sridharan Date: Thu, 14 Apr 2022 13:48:15 -0500 Subject: ASoC: SOF: Intel: hda: Define rom_status_reg in sof_intel_dsp_desc MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add the rom_status_reg field to struct sof_intel_dsp_desc and define it for HDA platforms. This will be used to check the ROM status during FW boot. Signed-off-by: Ranjani Sridharan Signed-off-by: Pierre-Louis Bossart Reviewed-by: Péter Ujfalusi Link: https://lore.kernel.org/r/20220414184817.362215-14-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown --- sound/soc/sof/intel/icl.c | 1 + 1 file changed, 1 insertion(+) (limited to 'sound/soc/sof/intel/icl.c') diff --git a/sound/soc/sof/intel/icl.c b/sound/soc/sof/intel/icl.c index 964014239afd..2e4d371f7860 100644 --- a/sound/soc/sof/intel/icl.c +++ b/sound/soc/sof/intel/icl.c @@ -134,6 +134,7 @@ const struct sof_intel_dsp_desc icl_chip_info = { .ipc_ack = CNL_DSP_REG_HIPCIDA, .ipc_ack_mask = CNL_DSP_REG_HIPCIDA_DONE, .ipc_ctl = CNL_DSP_REG_HIPCCTL, + .rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS, .rom_init_timeout = 300, .ssp_count = ICL_SSP_COUNT, .ssp_base_offset = CNL_SSP_BASE_OFFSET, -- cgit v1.2.3