From 4dbee5104b7858e39d94b2512ab99b82b8feb894 Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Fri, 20 Oct 2023 11:58:13 +0530 Subject: ASoC: SOF: amd: increase DSP cache window range Increase DSP cache window range to 2.5MB to align with ACP memory. Signed-off-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20231020062822.3913760-3-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- sound/soc/sof/amd/acp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'sound/soc/sof') diff --git a/sound/soc/sof/amd/acp.h b/sound/soc/sof/amd/acp.h index 3d2c5f07ed44..205b434f0872 100644 --- a/sound/soc/sof/amd/acp.h +++ b/sound/soc/sof/amd/acp.h @@ -84,7 +84,7 @@ #define EXCEPT_MAX_HDR_SIZE 0x400 #define AMD_STACK_DUMP_SIZE 32 -#define SRAM1_SIZE 0x13A000 +#define SRAM1_SIZE 0x280000 #define PROBE_STATUS_BIT BIT(31) #define ACP_FIRMWARE_SIGNATURE 0x100 -- cgit v1.2.3