1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
|
[
{
"EventName": "ex_ret_instr",
"EventCode": "0xc0",
"BriefDescription": "Retired instructions."
},
{
"EventName": "ex_ret_ops",
"EventCode": "0xc1",
"BriefDescription": "Retired macro-ops."
},
{
"EventName": "ex_ret_brn",
"EventCode": "0xc2",
"BriefDescription": "Retired branch instructions (all types of architectural control flow changes, including exceptions and interrupts)."
},
{
"EventName": "ex_ret_brn_misp",
"EventCode": "0xc3",
"BriefDescription": "Retired branch instructions mispredicted."
},
{
"EventName": "ex_ret_brn_tkn",
"EventCode": "0xc4",
"BriefDescription": "Retired taken branch instructions (all types of architectural control flow changes, including exceptions and interrupts)."
},
{
"EventName": "ex_ret_brn_tkn_misp",
"EventCode": "0xc5",
"BriefDescription": "Retired taken branch instructions mispredicted."
},
{
"EventName": "ex_ret_brn_far",
"EventCode": "0xc6",
"BriefDescription": "Retired far control transfers (far call/jump/return, IRET, SYSCALL and SYSRET, plus exceptions and interrupts). Far control transfers are not subject to branch prediction."
},
{
"EventName": "ex_ret_near_ret",
"EventCode": "0xc8",
"BriefDescription": "Retired near returns (RET or RET Iw)."
},
{
"EventName": "ex_ret_near_ret_mispred",
"EventCode": "0xc9",
"BriefDescription": "Retired near returns mispredicted. Each misprediction incurs the same penalty as a mispredicted conditional branch instruction."
},
{
"EventName": "ex_ret_brn_ind_misp",
"EventCode": "0xca",
"BriefDescription": "Retired indirect branch instructions mispredicted (only EX mispredicts). Each misprediction incurs the same penalty as a mispredicted conditional branch instruction."
},
{
"EventName": "ex_ret_mmx_fp_instr.x87",
"EventCode": "0xcb",
"BriefDescription": "Retired x87 instructions.",
"UMask": "0x01"
},
{
"EventName": "ex_ret_mmx_fp_instr.mmx",
"EventCode": "0xcb",
"BriefDescription": "Retired MMX instructions.",
"UMask": "0x02"
},
{
"EventName": "ex_ret_mmx_fp_instr.sse",
"EventCode": "0xcb",
"BriefDescription": "Retired SSE instructions (includes SSE, SSE2, SSE3, SSSE3, SSE4A, SSE41, SSE42 and AVX).",
"UMask": "0x04"
},
{
"EventName": "ex_ret_ind_brch_instr",
"EventCode": "0xcc",
"BriefDescription": "Retired indirect branch instructions."
},
{
"EventName": "ex_ret_cond",
"EventCode": "0xd1",
"BriefDescription": "Retired conditional branch instructions."
},
{
"EventName": "ex_div_busy",
"EventCode": "0xd3",
"BriefDescription": "Number of cycles the divider is busy."
},
{
"EventName": "ex_div_count",
"EventCode": "0xd4",
"BriefDescription": "Divide ops executed."
},
{
"EventName": "ex_no_retire.empty",
"EventCode": "0xd6",
"BriefDescription": "Cycles with no retire due to the lack of valid ops in the retire queue (may be caused by front-end bottlenecks or pipeline redirects).",
"UMask": "0x01"
},
{
"EventName": "ex_no_retire.not_complete",
"EventCode": "0xd6",
"BriefDescription": "Cycles with no retire while the oldest op is waiting to be executed.",
"UMask": "0x02"
},
{
"EventName": "ex_no_retire.other",
"EventCode": "0xd6",
"BriefDescription": "Cycles with no retire caused by other reasons (retire breaks, traps, faults, etc.).",
"UMask": "0x08"
},
{
"EventName": "ex_no_retire.thread_not_selected",
"EventCode": "0xd6",
"BriefDescription": "Cycles with no retire because thread arbitration did not select the thread.",
"UMask": "0x10"
},
{
"EventName": "ex_no_retire.load_not_complete",
"EventCode": "0xd6",
"BriefDescription": "Cycles with no retire while the oldest op is waiting for load data.",
"UMask": "0xa2"
},
{
"EventName": "ex_no_retire.all",
"EventCode": "0xd6",
"BriefDescription": "Cycles with no retire for any reason.",
"UMask": "0x1b"
},
{
"EventName": "ex_ret_ucode_instr",
"EventCode": "0x1c1",
"BriefDescription": "Retired microcoded instructions."
},
{
"EventName": "ex_ret_ucode_ops",
"EventCode": "0x1c2",
"BriefDescription": "Retired microcode ops."
},
{
"EventName": "ex_ret_msprd_brnch_instr_dir_msmtch",
"EventCode": "0x1c7",
"BriefDescription": "Retired branch instructions mispredicted due to direction mismatch."
},
{
"EventName": "ex_ret_uncond_brnch_instr_mispred",
"EventCode": "0x1c8",
"BriefDescription": "Retired unconditional indirect branch instructions mispredicted."
},
{
"EventName": "ex_ret_uncond_brnch_instr",
"EventCode": "0x1c9",
"BriefDescription": "Retired unconditional branch instructions."
},
{
"EventName": "ex_tagged_ibs_ops.ibs_tagged_ops",
"EventCode": "0x1cf",
"BriefDescription": "Ops tagged by IBS.",
"UMask": "0x01"
},
{
"EventName": "ex_tagged_ibs_ops.ibs_tagged_ops_ret",
"EventCode": "0x1cf",
"BriefDescription": "Ops tagged by IBS that retired.",
"UMask": "0x02"
},
{
"EventName": "ex_tagged_ibs_ops.ibs_count_rollover",
"EventCode": "0x1cf",
"BriefDescription": "Ops not tagged by IBS due to a previous tagged op that has not yet signaled interrupt.",
"UMask": "0x04"
},
{
"EventName": "ex_ret_fused_instr",
"EventCode": "0x1d0",
"BriefDescription": "Retired fused instructions."
}
]
|
