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author | Heiko Stuebner <heiko@sntech.de> | 2022-10-04 19:42:27 +0300 |
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committer | Anup Patel <anup@brainfault.org> | 2022-10-13 07:22:09 +0300 |
commit | b6e520b2a836cd7cc8dc99c25a21a470e8589888 (patch) | |
tree | 09b83b41b3485501129a15b487ea676cc6b6873f /.clang-format | |
parent | 2f63f2465c42c64559e4f7b9d0183c2b47472019 (diff) | |
download | opensbi-b6e520b2a836cd7cc8dc99c25a21a470e8589888.tar.xz |
platform: generic: allwinner: add support for c9xx pmu
With the T-HEAD C9XX cores being designed before or during ratification
of the SSCOFPMF extension, they implement a PMU extension that behaves
very similar but not equal to it by providing overflow interrupts though
in a slightly different registers format.
The sun20i-d1 is using this core. So implement the necessary overrides
to allow its pmu to be used via the standard sbi-pmu extension.
For now it's also the only soc using this core, so keep the additional
code in the d1-space for now.
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to '.clang-format')
0 files changed, 0 insertions, 0 deletions