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author | Icenowy Zheng <uwu@icenowy.me> | 2022-12-12 11:22:38 +0300 |
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committer | Anup Patel <anup@brainfault.org> | 2022-12-17 08:31:06 +0300 |
commit | b848d8763a737de44b64bfc036c8f51200226440 (patch) | |
tree | 2effe5e3b55d9f37d8d94c0feee1c5da01f8d270 | |
parent | ca7810aecdbae0630c506f05dbed641f3875ec5b (diff) | |
download | opensbi-b848d8763a737de44b64bfc036c8f51200226440.tar.xz |
lib: utils/timer: mtimer: add T-Head C9xx CLINT compatible
As we already added the quirk for lacking mtime register to MTIMER
driver, add T-Head C9xx CLINT compatible to it and wire the quirk.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Anup Patel <anup@brainfault.org>
-rw-r--r-- | lib/utils/timer/fdt_timer_mtimer.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c index a0adc70..5244f98 100644 --- a/lib/utils/timer/fdt_timer_mtimer.c +++ b/lib/utils/timer/fdt_timer_mtimer.c @@ -124,9 +124,15 @@ static const struct timer_mtimer_quirks sifive_clint_quirks = { .has_64bit_mmio = true, }; +static const struct timer_mtimer_quirks thead_clint_quirks = { + .mtime_offset = CLINT_MTIMER_OFFSET, + .without_mtime = true, +}; + static const struct fdt_match timer_mtimer_match[] = { { .compatible = "riscv,clint0", .data = &sifive_clint_quirks }, { .compatible = "sifive,clint0", .data = &sifive_clint_quirks }, + { .compatible = "thead,c900-clint", .data = &thead_clint_quirks }, { .compatible = "riscv,aclint-mtimer" }, { }, }; |