diff options
| author | Mayuresh Chitale <mchitale@ventanamicro.com> | 2023-03-09 16:13:52 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2023-03-10 11:30:07 +0300 |
| commit | 51951d9e9af86c885cf5564bba7dd83a9a59a3b3 (patch) | |
| tree | b30dce6f3b0760a42a9fd44457d5c96fcd6b4505 | |
| parent | 1fe8dc995566d869836d3caf37e427c28536f453 (diff) | |
| download | opensbi-51951d9e9af86c885cf5564bba7dd83a9a59a3b3.tar.xz | |
lib: sbi_pmu: Implement sbi_pmu_counter_fw_read_hi
To support 64 bit firmware counters on RV32 systems, we implement
sbi_pmu_counter_fw_read_hi() which returns the upper 32 bits of
the firmware counter value. On RV64 (or higher) systems, this
function will always return zero.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
| -rw-r--r-- | include/sbi/sbi_ecall_interface.h | 1 | ||||
| -rw-r--r-- | lib/sbi/sbi_ecall_pmu.c | 8 |
2 files changed, 9 insertions, 0 deletions
diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h index 4c378c3..d448212 100644 --- a/include/sbi/sbi_ecall_interface.h +++ b/include/sbi/sbi_ecall_interface.h @@ -101,6 +101,7 @@ #define SBI_EXT_PMU_COUNTER_START 0x3 #define SBI_EXT_PMU_COUNTER_STOP 0x4 #define SBI_EXT_PMU_COUNTER_FW_READ 0x5 +#define SBI_EXT_PMU_COUNTER_FW_READ_HI 0x6 /** General pmu event codes specified in SBI PMU extension */ enum sbi_pmu_hw_generic_events_t { diff --git a/lib/sbi/sbi_ecall_pmu.c b/lib/sbi/sbi_ecall_pmu.c index 826c8a8..8f91f9c 100644 --- a/lib/sbi/sbi_ecall_pmu.c +++ b/lib/sbi/sbi_ecall_pmu.c @@ -54,6 +54,14 @@ static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid, ret = sbi_pmu_ctr_fw_read(regs->a0, &temp); *out_val = temp; break; + case SBI_EXT_PMU_COUNTER_FW_READ_HI: +#if __riscv_xlen == 32 + ret = sbi_pmu_ctr_fw_read(regs->a0, &temp); + *out_val = temp >> 32; +#else + *out_val = 0; +#endif + break; case SBI_EXT_PMU_COUNTER_START: #if __riscv_xlen == 32 |