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| author | Andrew Jones <ajones@ventanamicro.com> | 2022-07-18 20:20:27 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2022-07-30 09:09:19 +0300 |
| commit | 7198e1d06f486173e6565ff6c718f30bf8c2ff30 (patch) | |
| tree | c651c495416a0c2c3c13c384874e48bc5131bd78 | |
| parent | 7d28d3be50c5f8b9e4780a305ab3c39062e486c1 (diff) | |
| download | opensbi-7198e1d06f486173e6565ff6c718f30bf8c2ff30.tar.xz | |
lib: serial: Clean up coding style in sifive-uart.c
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
| -rw-r--r-- | lib/utils/serial/sifive-uart.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/lib/utils/serial/sifive-uart.c b/lib/utils/serial/sifive-uart.c index 9478a77..7078611 100644 --- a/lib/utils/serial/sifive-uart.c +++ b/lib/utils/serial/sifive-uart.c @@ -48,12 +48,12 @@ static inline unsigned int uart_min_clk_divisor(uint64_t in_freq, uint64_t max_target_hz) { uint64_t quotient = (in_freq + max_target_hz - 1) / (max_target_hz); + /* Avoid underflow */ - if (quotient == 0) { + if (quotient == 0) return 0; - } else { + else return quotient - 1; - } } static u32 get_reg(u32 num) @@ -77,8 +77,10 @@ static void sifive_uart_putc(char ch) static int sifive_uart_getc(void) { u32 ret = get_reg(UART_REG_RXFIFO); + if (!(ret & UART_RXFIFO_EMPTY)) return ret & UART_RXFIFO_DATA; + return -1; } @@ -97,10 +99,13 @@ int sifive_uart_init(unsigned long base, u32 in_freq, u32 baudrate) /* Configure baudrate */ if (in_freq) set_reg(UART_REG_DIV, uart_min_clk_divisor(in_freq, baudrate)); + /* Disable interrupts */ set_reg(UART_REG_IE, 0); + /* Enable TX */ set_reg(UART_REG_TXCTRL, UART_TXCTRL_TXEN); + /* Enable Rx */ set_reg(UART_REG_RXCTRL, UART_RXCTRL_RXEN); |