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| author | Anup Patel <anup.patel@wdc.com> | 2020-04-25 08:41:49 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2020-05-01 07:06:13 +0300 |
| commit | e6c1345f89f0c2fa5d8b0dde733eb80366056632 (patch) | |
| tree | 24f543cd02b83be807671b5a0915b39e11648639 | |
| parent | 5bdf022d07f1efcf8bc1647c78a294ab2baf4c9b (diff) | |
| download | opensbi-e6c1345f89f0c2fa5d8b0dde733eb80366056632.tar.xz | |
lib: utils/serial: Skip baudrate config if input frequency is zero
We should skip baudrate config for UART8250 and SiFive UART when
input frequency is zero.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
| -rw-r--r-- | lib/utils/serial/sifive-uart.c | 3 | ||||
| -rw-r--r-- | lib/utils/serial/uart8250.c | 12 |
2 files changed, 10 insertions, 5 deletions
diff --git a/lib/utils/serial/sifive-uart.c b/lib/utils/serial/sifive-uart.c index b82a1b3..72c8a62 100644 --- a/lib/utils/serial/sifive-uart.c +++ b/lib/utils/serial/sifive-uart.c @@ -89,7 +89,8 @@ int sifive_uart_init(unsigned long base, u32 in_freq, u32 baudrate) uart_baudrate = baudrate; /* Configure baudrate */ - set_reg(UART_REG_DIV, uart_min_clk_divisor(in_freq, baudrate)); + if (in_freq) + set_reg(UART_REG_DIV, uart_min_clk_divisor(in_freq, baudrate)); /* Disable interrupts */ set_reg(UART_REG_IE, 0); /* Enable TX */ diff --git a/lib/utils/serial/uart8250.c b/lib/utils/serial/uart8250.c index 42f1881..9635ba8 100644 --- a/lib/utils/serial/uart8250.c +++ b/lib/utils/serial/uart8250.c @@ -100,10 +100,14 @@ int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift, set_reg(UART_IER_OFFSET, 0x00); /* Enable DLAB */ set_reg(UART_LCR_OFFSET, 0x80); - /* Set divisor low byte */ - set_reg(UART_DLL_OFFSET, bdiv & 0xff); - /* Set divisor high byte */ - set_reg(UART_DLM_OFFSET, (bdiv >> 8) & 0xff); + + if (bdiv) { + /* Set divisor low byte */ + set_reg(UART_DLL_OFFSET, bdiv & 0xff); + /* Set divisor high byte */ + set_reg(UART_DLM_OFFSET, (bdiv >> 8) & 0xff); + } + /* 8 bits, no parity, one stop bit */ set_reg(UART_LCR_OFFSET, 0x03); /* Enable FIFO */ |