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authorAndreas Schwab <schwab@suse.de>2020-01-09 14:49:38 +0300
committerAnup Patel <anup@brainfault.org>2020-01-10 07:00:27 +0300
commit6ffe1bed09be1cb2db8755b30c0258849184400b (patch)
treeb8ae22adece62c49f4cce1fde68901a5ed060135 /firmware/fw_payload.S
parentf95dd39ab6ed9711aabc56968582aa44130a9f89 (diff)
downloadopensbi-6ffe1bed09be1cb2db8755b30c0258849184400b.tar.xz
firmware: Fix placement of .align directives
Move the .align directives after switching the section. We want to align the start of the current section, not the end of the previous section. This also obsoletes the misguided workaround of disabling relaxation. Signed-off-by: Andreas Schwab <schwab@suse.de> Reviewed-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'firmware/fw_payload.S')
-rw-r--r--firmware/fw_payload.S28
1 files changed, 9 insertions, 19 deletions
diff --git a/firmware/fw_payload.S b/firmware/fw_payload.S
index 84d9ad4..9805d8c 100644
--- a/firmware/fw_payload.S
+++ b/firmware/fw_payload.S
@@ -9,8 +9,8 @@
#include "fw_base.S"
- .align 3
.section .entry, "ax", %progbits
+ .align 3
.global fw_boot_hart
/*
* This function is called very early even before
@@ -22,8 +22,8 @@ fw_boot_hart:
li a0, -1
ret
- .align 3
.section .entry, "ax", %progbits
+ .align 3
.global fw_save_info
/*
* We can only use a0, a1, a2, a3, and a4 registers here.
@@ -34,8 +34,8 @@ fw_boot_hart:
fw_save_info:
ret
- .align 3
.section .entry, "ax", %progbits
+ .align 3
.global fw_prev_arg1
/*
* We can only use a0, a1, and a2 registers here.
@@ -51,8 +51,8 @@ fw_prev_arg1:
#endif
ret
- .align 3
.section .entry, "ax", %progbits
+ .align 3
.global fw_next_arg1
/*
* We can only use a0, a1, and a2 registers here.
@@ -68,8 +68,8 @@ fw_next_arg1:
#endif
ret
- .align 3
.section .entry, "ax", %progbits
+ .align 3
.global fw_next_addr
/*
* We can only use a0, a1, and a2 registers here.
@@ -79,8 +79,8 @@ fw_next_addr:
la a0, payload_bin
ret
- .align 3
.section .entry, "ax", %progbits
+ .align 3
.global fw_next_mode
/*
* We can only use a0, a1, and a2 registers here.
@@ -90,8 +90,8 @@ fw_next_mode:
li a0, PRV_S
ret
- .align 3
.section .entry, "ax", %progbits
+ .align 3
.global fw_options
/*
* We can only use a0, a1, and a2 registers here.
@@ -102,24 +102,16 @@ fw_options:
add a0, zero, zero
ret
- /*
- * We disable relaxation because use of ".align"
- * and ".balign" can potentially generate compile
- * errors with latest RISC-V GCC Binutils.
- */
- .option push
- .option norelax
-
#ifdef FW_PAYLOAD_FDT_PATH
- .align 4
.section .text, "ax", %progbits
+ .align 4
.globl fdt_bin
fdt_bin:
.incbin FW_PAYLOAD_FDT_PATH
#endif
- .align 4
.section .payload, "ax", %progbits
+ .align 4
.globl payload_bin
payload_bin:
#ifndef FW_PAYLOAD_PATH
@@ -128,5 +120,3 @@ payload_bin:
#else
.incbin FW_PAYLOAD_PATH
#endif
-
- .option pop