diff options
| author | Damien Le Moal <damien.lemoal@wdc.com> | 2019-01-18 10:09:14 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2019-01-21 07:28:33 +0300 |
| commit | 42283461d3f236881f67d8aa9bb8bc96decdacae (patch) | |
| tree | a71a8f0710e2218e027fe896666643c1362f1ffb /firmware/payloads/dummy_head.S | |
| parent | 868ad0b0e51a5e10e77c9bd380240b98d6a133be (diff) | |
| download | opensbi-42283461d3f236881f67d8aa9bb8bc96decdacae.tar.xz | |
payload: rename dummy payload to test payload
Use a more neutral term more representative of this payload intent.
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Diffstat (limited to 'firmware/payloads/dummy_head.S')
| -rw-r--r-- | firmware/payloads/dummy_head.S | 87 |
1 files changed, 0 insertions, 87 deletions
diff --git a/firmware/payloads/dummy_head.S b/firmware/payloads/dummy_head.S deleted file mode 100644 index 1b36319..0000000 --- a/firmware/payloads/dummy_head.S +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (c) 2018 Western Digital Corporation or its affiliates. - * - * Authors: - * Anup Patel <anup.patel@wdc.com> - * - * SPDX-License-Identifier: BSD-2-Clause - */ - -#define __ASM_STR(x) x - -#if __riscv_xlen == 64 -#define __REG_SEL(a, b) __ASM_STR(a) -#define RISCV_PTR .dword -#elif __riscv_xlen == 32 -#define __REG_SEL(a, b) __ASM_STR(b) -#define RISCV_PTR .word -#else -#error "Unexpected __riscv_xlen" -#endif - -#define REG_L __REG_SEL(ld, lw) -#define REG_S __REG_SEL(sd, sw) - - .align 3 - .section .entry, "ax", %progbits - .globl _start -_start: - /* Pick one hart to run the main boot sequence */ - la a3, _hart_lottery - li a2, 1 - amoadd.w a3, a2, (a3) - bnez a3, _start_hang - - /* Save a0 and a1 */ - la a3, _boot_a0 - REG_S a0, 0(a3) - la a3, _boot_a1 - REG_S a1, 0(a3) - - /* Zero-out BSS */ - la a4, _bss_start - la a5, _bss_end -_bss_zero: - REG_S zero, (a4) - add a4, a4, __SIZEOF_POINTER__ - blt a4, a5, _bss_zero - -_start_warm: - /* Disable and clear all interrupts */ - csrw sie, zero - csrw sip, zero - - /* Setup exception vectors */ - la a3, _start_hang - csrw stvec, a3 - - /* Setup stack */ - la a3, _payload_end - li a4, 0x2000 - add sp, a3, a4 - - /* Jump to C main */ - la a3, _boot_a0 - REG_L a0, 0(a3) - la a3, _boot_a1 - REG_L a1, 0(a3) - call dummy_main - - /* We don't expect to reach here hence just hang */ - j _start_hang - - .align 3 - .section .entry, "ax", %progbits - .globl _start_hang -_start_hang: - wfi - j _start_hang - - .align 3 - .section .entry, "ax", %progbits -_hart_lottery: - RISCV_PTR 0 -_boot_a0: - RISCV_PTR 0 -_boot_a1: - RISCV_PTR 0 |