diff options
author | Anup Patel <anup.patel@wdc.com> | 2018-12-31 07:55:42 +0300 |
---|---|---|
committer | Anup Patel <anup@brainfault.org> | 2019-01-02 07:27:12 +0300 |
commit | 81e8950abeb649a0842726fdfc1aa4e60b1008f5 (patch) | |
tree | 6a47449870f8ba8dda63493df3fd9129667b0756 /include/sbi/riscv_asm.h | |
parent | d0bbbbb8fdf059b2e49235af271db0d67ade2fc9 (diff) | |
download | opensbi-81e8950abeb649a0842726fdfc1aa4e60b1008f5.tar.xz |
include: Remove redundant csr_read_n() and csr_write_n()
The patch removes redundant csr_read_n() and csr_write_n()
because same thing can be achieved by using __ASM_STR()
macro in csr_read() and csr_write() macros.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'include/sbi/riscv_asm.h')
-rw-r--r-- | include/sbi/riscv_asm.h | 21 |
1 files changed, 2 insertions, 19 deletions
diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h index 045310b..c7a8937 100644 --- a/include/sbi/riscv_asm.h +++ b/include/sbi/riscv_asm.h @@ -140,16 +140,7 @@ #define csr_read(csr) \ ({ \ register unsigned long __v; \ - __asm__ __volatile__ ("csrr %0, " #csr \ - : "=r" (__v) : \ - : "memory"); \ - __v; \ -}) - -#define csr_read_n(csr_num) \ -({ \ - register unsigned long __v; \ - __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr_num) \ + __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \ : "=r" (__v) : \ : "memory"); \ __v; \ @@ -158,15 +149,7 @@ #define csr_write(csr, val) \ ({ \ unsigned long __v = (unsigned long)(val); \ - __asm__ __volatile__ ("csrw " #csr ", %0" \ - : : "rK" (__v) \ - : "memory"); \ -}) - -#define csr_write_n(csr_num, val) \ -({ \ - unsigned long __v = (unsigned long)(val); \ - __asm__ __volatile__ ("csrw " __ASM_STR(csr_num) ", %0" \ + __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \ : : "rK" (__v) \ : "memory"); \ }) |