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| author | Samuel Holland <samuel@sholland.org> | 2022-05-29 21:25:30 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2022-06-01 14:50:20 +0300 |
| commit | cb8271c8e43e3c317436b7377c4fa0ac669f8fb5 (patch) | |
| tree | 7315f93406b3ba854e4d10660f960cdeacc0cc36 /include/sbi/riscv_encoding.h | |
| parent | ff65bfec4e4fdef31de0871d03f58ca020d6ada2 (diff) | |
| download | opensbi-cb8271c8e43e3c317436b7377c4fa0ac669f8fb5.tar.xz | |
lib: sbi_illegal_insn: Add emulation for fence.tso
While OpenC906 appears to properly decode `fence.tso` as a fence
instruction[1], the version of the C906 taped out in the Allwinner D1
does not, and raises illegal instruction.
Handle this errata by emulating `fence.tso` as `fence rw, rw`.
[1]: https://github.com/T-head-Semi/openc906/blob/30827e7f/C906_RTL_FACTORY/gen_rtl/idu/rtl/aq_idu_id_decd.v#L2097
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'include/sbi/riscv_encoding.h')
| -rw-r--r-- | include/sbi/riscv_encoding.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h index 7cfbace..a164768 100644 --- a/include/sbi/riscv_encoding.h +++ b/include/sbi/riscv_encoding.h @@ -838,6 +838,9 @@ #define INSN_MASK_WFI 0xffffff00 #define INSN_MATCH_WFI 0x10500000 +#define INSN_MASK_FENCE_TSO 0xffffffff +#define INSN_MATCH_FENCE_TSO 0x8330000f + #define INSN_16BIT_MASK 0x3 #define INSN_32BIT_MASK 0x1c |