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| author | Anup Patel <anup.patel@wdc.com> | 2019-03-30 15:05:48 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2019-04-01 07:40:38 +0300 |
| commit | cfff0126ab80d8c53e55f6eaae1a59e08159160b (patch) | |
| tree | 97a446f19526be500f89e168165207a76d958adc /include/sbi/sbi_unpriv.h | |
| parent | f9cfe301c92aede87e46069e66e250d4039e413e (diff) | |
| download | opensbi-cfff0126ab80d8c53e55f6eaae1a59e08159160b.tar.xz | |
lib: Remove unused mepc arg from load_xyz() and store_xyz() functions
This patch removes unused mepc arg from load_xyz() and store_xyz()
unpriviledge access functions.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'include/sbi/sbi_unpriv.h')
| -rw-r--r-- | include/sbi/sbi_unpriv.h | 32 |
1 files changed, 15 insertions, 17 deletions
diff --git a/include/sbi/sbi_unpriv.h b/include/sbi/sbi_unpriv.h index 930babd..2d9dbb9 100644 --- a/include/sbi/sbi_unpriv.h +++ b/include/sbi/sbi_unpriv.h @@ -15,29 +15,27 @@ #include <sbi/sbi_types.h> #define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn) \ -static inline type load_##type(const type *addr, ulong mepc) \ +static inline type load_##type(const type *addr) \ { \ - register ulong __mepc asm ("a2") = mepc; \ - register ulong __mstatus asm ("a3"); \ + register ulong __mstatus asm ("a2"); \ type val; \ - asm ("csrrs %0, "STR(CSR_MSTATUS)", %3\n" \ + asm ("csrrs %0, "STR(CSR_MSTATUS)", %3\n" \ #insn " %1, %2\n" \ - "csrw "STR(CSR_MSTATUS)", %0" \ + "csrw "STR(CSR_MSTATUS)", %0" \ : "+&r" (__mstatus), "=&r" (val) \ - : "m" (*addr), "r" (MSTATUS_MPRV), "r" (__mepc)); \ + : "m" (*addr), "r" (MSTATUS_MPRV)); \ return val; \ } #define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type, insn) \ -static inline void store_##type(type *addr, type val, ulong mepc) \ +static inline void store_##type(type *addr, type val) \ { \ - register ulong __mepc asm ("a2") = mepc; \ register ulong __mstatus asm ("a3"); \ - asm volatile ("csrrs %0, "STR(CSR_MSTATUS)", %3\n" \ + asm volatile ("csrrs %0, "STR(CSR_MSTATUS)", %3\n" \ #insn " %1, %2\n" \ - "csrw "STR(CSR_MSTATUS)", %0" \ + "csrw "STR(CSR_MSTATUS)", %0" \ : "+&r" (__mstatus) \ - : "r" (val), "m" (*addr), "r" (MSTATUS_MPRV), "r" (__mepc)); \ + : "r" (val), "m" (*addr), "r" (MSTATUS_MPRV)); \ } DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u8, lbu) @@ -57,16 +55,16 @@ DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong, ld) DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u32, lw) DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong, lw) -static inline u64 load_u64(const u64 *addr, ulong mepc) +static inline u64 load_u64(const u64 *addr) { - return load_u32((u32 *)addr, mepc) - + ((u64)load_u32((u32 *)addr + 1, mepc) << 32); + return load_u32((u32 *)addr) + + ((u64)load_u32((u32 *)addr + 1) << 32); } -static inline void store_u64(u64 *addr, u64 val, ulong mepc) +static inline void store_u64(u64 *addr, u64 val) { - store_u32((u32 *)addr, val, mepc); - store_u32((u32 *)addr + 1, val >> 32, mepc); + store_u32((u32 *)addr, val); + store_u32((u32 *)addr + 1, val >> 32); } #endif |