diff options
author | Olof Johansson <olof@lixom.net> | 2019-04-11 03:41:52 +0300 |
---|---|---|
committer | Anup Patel <anup@brainfault.org> | 2019-04-24 07:19:46 +0300 |
commit | 10baa64c02f6746fd506136e0693aa2d592574fb (patch) | |
tree | da00e48f0cb5d1434cbc7c31bb6ca15efa7d4564 /include/sbi | |
parent | fbf986ac2a0b926ae97e6796b87e366610d7589e (diff) | |
download | opensbi-10baa64c02f6746fd506136e0693aa2d592574fb.tar.xz |
all: run clang-format and update checked-in files
Noisy commit, no functional changes.
Generated with an current upstream clang-format and:
clang-format -i $(find . -name \*.[ch])
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'include/sbi')
-rw-r--r-- | include/sbi/riscv_asm.h | 141 | ||||
-rw-r--r-- | include/sbi/riscv_atomic.h | 9 | ||||
-rw-r--r-- | include/sbi/riscv_barrier.h | 24 | ||||
-rw-r--r-- | include/sbi/riscv_fp.h | 71 | ||||
-rw-r--r-- | include/sbi/riscv_io.h | 16 | ||||
-rw-r--r-- | include/sbi/riscv_locks.h | 11 | ||||
-rw-r--r-- | include/sbi/riscv_unpriv.h | 106 | ||||
-rw-r--r-- | include/sbi/sbi_bitops.h | 2 | ||||
-rw-r--r-- | include/sbi/sbi_bits.h | 11 | ||||
-rw-r--r-- | include/sbi/sbi_console.h | 5 | ||||
-rw-r--r-- | include/sbi/sbi_ecall.h | 3 | ||||
-rw-r--r-- | include/sbi/sbi_ecall_interface.h | 36 | ||||
-rw-r--r-- | include/sbi/sbi_emulate_csr.h | 12 | ||||
-rw-r--r-- | include/sbi/sbi_fifo.h | 6 | ||||
-rw-r--r-- | include/sbi/sbi_hart.h | 7 | ||||
-rw-r--r-- | include/sbi/sbi_ipi.h | 4 | ||||
-rw-r--r-- | include/sbi/sbi_platform.h | 65 | ||||
-rw-r--r-- | include/sbi/sbi_scratch.h | 22 | ||||
-rw-r--r-- | include/sbi/sbi_system.h | 8 | ||||
-rw-r--r-- | include/sbi/sbi_trap.h | 11 | ||||
-rw-r--r-- | include/sbi/sbi_version.h | 4 |
21 files changed, 297 insertions, 277 deletions
diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h index 39a7615..357bcb4 100644 --- a/include/sbi/riscv_asm.h +++ b/include/sbi/riscv_asm.h @@ -84,74 +84,81 @@ #ifndef __ASSEMBLY__ -#define csr_swap(csr, val) \ -({ \ - unsigned long __v = (unsigned long)(val); \ - __asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\ - : "=r" (__v) : "rK" (__v) \ - : "memory"); \ - __v; \ -}) - -#define csr_read(csr) \ -({ \ - register unsigned long __v; \ - __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \ - : "=r" (__v) : \ - : "memory"); \ - __v; \ -}) - -#define csr_write(csr, val) \ -({ \ - unsigned long __v = (unsigned long)(val); \ - __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \ - : : "rK" (__v) \ - : "memory"); \ -}) - -#define csr_read_set(csr, val) \ -({ \ - unsigned long __v = (unsigned long)(val); \ - __asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\ - : "=r" (__v) : "rK" (__v) \ - : "memory"); \ - __v; \ -}) - -#define csr_set(csr, val) \ -({ \ - unsigned long __v = (unsigned long)(val); \ - __asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0" \ - : : "rK" (__v) \ - : "memory"); \ -}) - -#define csr_read_clear(csr, val) \ -({ \ - unsigned long __v = (unsigned long)(val); \ - __asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\ - : "=r" (__v) : "rK" (__v) \ - : "memory"); \ - __v; \ -}) - -#define csr_clear(csr, val) \ -({ \ - unsigned long __v = (unsigned long)(val); \ - __asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0" \ - : : "rK" (__v) \ - : "memory"); \ -}) +#define csr_swap(csr, val) \ + ({ \ + unsigned long __v = (unsigned long)(val); \ + __asm__ __volatile__("csrrw %0, " __ASM_STR(csr) ", %1" \ + : "=r"(__v) \ + : "rK"(__v) \ + : "memory"); \ + __v; \ + }) + +#define csr_read(csr) \ + ({ \ + register unsigned long __v; \ + __asm__ __volatile__("csrr %0, " __ASM_STR(csr) \ + : "=r"(__v) \ + : \ + : "memory"); \ + __v; \ + }) + +#define csr_write(csr, val) \ + ({ \ + unsigned long __v = (unsigned long)(val); \ + __asm__ __volatile__("csrw " __ASM_STR(csr) ", %0" \ + : \ + : "rK"(__v) \ + : "memory"); \ + }) + +#define csr_read_set(csr, val) \ + ({ \ + unsigned long __v = (unsigned long)(val); \ + __asm__ __volatile__("csrrs %0, " __ASM_STR(csr) ", %1" \ + : "=r"(__v) \ + : "rK"(__v) \ + : "memory"); \ + __v; \ + }) + +#define csr_set(csr, val) \ + ({ \ + unsigned long __v = (unsigned long)(val); \ + __asm__ __volatile__("csrs " __ASM_STR(csr) ", %0" \ + : \ + : "rK"(__v) \ + : "memory"); \ + }) + +#define csr_read_clear(csr, val) \ + ({ \ + unsigned long __v = (unsigned long)(val); \ + __asm__ __volatile__("csrrc %0, " __ASM_STR(csr) ", %1" \ + : "=r"(__v) \ + : "rK"(__v) \ + : "memory"); \ + __v; \ + }) + +#define csr_clear(csr, val) \ + ({ \ + unsigned long __v = (unsigned long)(val); \ + __asm__ __volatile__("csrc " __ASM_STR(csr) ", %0" \ + : \ + : "rK"(__v) \ + : "memory"); \ + }) unsigned long csr_read_num(int csr_num); void csr_write_num(int csr_num, unsigned long val); -#define wfi() \ -do { \ - __asm__ __volatile__ ("wfi" ::: "memory"); \ -} while (0) +#define wfi() \ + do { \ + __asm__ __volatile__("wfi" ::: "memory"); \ + } while (0) static inline int misa_extension(char ext) { @@ -177,11 +184,11 @@ static inline void misa_string(char *out, unsigned int out_sz) out++; } -int pmp_set(unsigned int n, unsigned long prot, - unsigned long addr, unsigned long log2len); +int pmp_set(unsigned int n, unsigned long prot, unsigned long addr, + unsigned long log2len); -int pmp_get(unsigned int n, unsigned long *prot_out, - unsigned long *addr_out, unsigned long *log2len_out); +int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out, + unsigned long *log2len_out); #endif /* !__ASSEMBLY__ */ diff --git a/include/sbi/riscv_atomic.h b/include/sbi/riscv_atomic.h index 215191e..40efb68 100644 --- a/include/sbi/riscv_atomic.h +++ b/include/sbi/riscv_atomic.h @@ -14,11 +14,12 @@ typedef struct { volatile long counter; } atomic_t; -#define ATOMIC_INIT(_lptr, val) \ - (_lptr)->counter = (val) +#define ATOMIC_INIT(_lptr, val) (_lptr)->counter = (val) -#define ATOMIC_INITIALIZER(val) \ - { .counter = (val), } +#define ATOMIC_INITIALIZER(val) \ + { \ + .counter = (val), \ + } long atomic_read(atomic_t *atom); diff --git a/include/sbi/riscv_barrier.h b/include/sbi/riscv_barrier.h index 14ebecc..905ecb4 100644 --- a/include/sbi/riscv_barrier.h +++ b/include/sbi/riscv_barrier.h @@ -41,17 +41,17 @@ /* clang-format on */ -#define __smp_store_release(p, v) \ -do { \ - RISCV_FENCE(rw,w); \ - *(p) = (v); \ -} while (0) - -#define __smp_load_acquire(p) \ -({ \ - typeof(*p) ___p1 = *(p); \ - RISCV_FENCE(r,rw); \ - ___p1; \ -}) +#define __smp_store_release(p, v) \ + do { \ + RISCV_FENCE(rw, w); \ + *(p) = (v); \ + } while (0) + +#define __smp_load_acquire(p) \ + ({ \ + typeof(*p) ___p1 = *(p); \ + RISCV_FENCE(r, rw); \ + ___p1; \ + }) #endif diff --git a/include/sbi/riscv_fp.h b/include/sbi/riscv_fp.h index 9e2e082..a8d4c51 100644 --- a/include/sbi/riscv_fp.h +++ b/include/sbi/riscv_fp.h @@ -21,28 +21,49 @@ #ifdef __riscv_flen -#define GET_F32_REG(insn, pos, regs) ({ \ - register s32 value asm("a0") = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \ - ulong tmp; \ - asm ("1: auipc %0, %%pcrel_hi(get_f32_reg); add %0, %0, %1; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp), "+&r"(value) :: "t0"); \ - value; }) -#define SET_F32_REG(insn, pos, regs, val) ({ \ - register u32 value asm("a0") = (val); \ - ulong offset = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \ - ulong tmp; \ - asm volatile ("1: auipc %0, %%pcrel_hi(put_f32_reg); add %0, %0, %2; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp) : "r"(value), "r"(offset) : "t0"); }) +#define GET_F32_REG(insn, pos, regs) \ + ({ \ + register s32 value asm("a0") = \ + SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \ + ulong tmp; \ + asm("1: auipc %0, %%pcrel_hi(get_f32_reg); add %0, %0, %1; jalr t0, %0, %%pcrel_lo(1b)" \ + : "=&r"(tmp), "+&r"(value)::"t0"); \ + value; \ + }) +#define SET_F32_REG(insn, pos, regs, val) \ + ({ \ + register u32 value asm("a0") = (val); \ + ulong offset = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \ + ulong tmp; \ + asm volatile( \ + "1: auipc %0, %%pcrel_hi(put_f32_reg); add %0, %0, %2; jalr t0, %0, %%pcrel_lo(1b)" \ + : "=&r"(tmp) \ + : "r"(value), "r"(offset) \ + : "t0"); \ + }) #define init_fp_reg(i) SET_F32_REG((i) << 3, 3, 0, 0) -#define GET_F64_REG(insn, pos, regs) ({ \ - register ulong value asm("a0") = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \ - ulong tmp; \ - asm ("1: auipc %0, %%pcrel_hi(get_f64_reg); add %0, %0, %1; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp), "+&r"(value) :: "t0"); \ - sizeof(ulong) == 4 ? *(int64_t*)value : (int64_t)value; }) -#define SET_F64_REG(insn, pos, regs, val) ({ \ - uint64_t __val = (val); \ - register ulong value asm("a0") = sizeof(ulong) == 4 ? (ulong)&__val : (ulong)__val; \ - ulong offset = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \ - ulong tmp; \ - asm volatile ("1: auipc %0, %%pcrel_hi(put_f64_reg); add %0, %0, %2; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp) : "r"(value), "r"(offset) : "t0"); }) +#define GET_F64_REG(insn, pos, regs) \ + ({ \ + register ulong value asm("a0") = \ + SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \ + ulong tmp; \ + asm("1: auipc %0, %%pcrel_hi(get_f64_reg); add %0, %0, %1; jalr t0, %0, %%pcrel_lo(1b)" \ + : "=&r"(tmp), "+&r"(value)::"t0"); \ + sizeof(ulong) == 4 ? *(int64_t *)value : (int64_t)value; \ + }) +#define SET_F64_REG(insn, pos, regs, val) \ + ({ \ + uint64_t __val = (val); \ + register ulong value asm("a0") = \ + sizeof(ulong) == 4 ? (ulong)&__val : (ulong)__val; \ + ulong offset = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \ + ulong tmp; \ + asm volatile( \ + "1: auipc %0, %%pcrel_hi(put_f64_reg); add %0, %0, %2; jalr t0, %0, %%pcrel_lo(1b)" \ + : "=&r"(tmp) \ + : "r"(value), "r"(offset) \ + : "t0"); \ + }) #define GET_FCSR() csr_read(CSR_FCSR) #define SET_FCSR(value) csr_write(CSR_FCSR, (value)) #define GET_FRM() csr_read(CSR_FRM) @@ -50,7 +71,7 @@ #define GET_FFLAGS() csr_read(CSR_FFLAGS) #define SET_FFLAGS(value) csr_write(CSR_FFLAGS, (value)) -#define SET_FS_DIRTY() ((void) 0) +#define SET_FS_DIRTY() ((void)0) #else #error "Floating point emulation not supported.\n" @@ -62,8 +83,10 @@ #define GET_F64_RS1(insn, regs) (GET_F64_REG(insn, 15, regs)) #define GET_F64_RS2(insn, regs) (GET_F64_REG(insn, 20, regs)) #define GET_F64_RS3(insn, regs) (GET_F64_REG(insn, 27, regs)) -#define SET_F32_RD(insn, regs, val) (SET_F32_REG(insn, 7, regs, val), SET_FS_DIRTY()) -#define SET_F64_RD(insn, regs, val) (SET_F64_REG(insn, 7, regs, val), SET_FS_DIRTY()) +#define SET_F32_RD(insn, regs, val) \ + (SET_F32_REG(insn, 7, regs, val), SET_FS_DIRTY()) +#define SET_F64_RD(insn, regs, val) \ + (SET_F64_REG(insn, 7, regs, val), SET_FS_DIRTY()) #define GET_F32_RS2C(insn, regs) (GET_F32_REG(insn, 2, regs)) #define GET_F32_RS2S(insn, regs) (GET_F32_REG(RVC_RS2S(insn), 0, regs)) diff --git a/include/sbi/riscv_io.h b/include/sbi/riscv_io.h index e4bdc27..4913232 100644 --- a/include/sbi/riscv_io.h +++ b/include/sbi/riscv_io.h @@ -15,23 +15,23 @@ static inline void __raw_writeb(u8 val, volatile void *addr) { - asm volatile("sb %0, 0(%1)" : : "r" (val), "r" (addr)); + asm volatile("sb %0, 0(%1)" : : "r"(val), "r"(addr)); } static inline void __raw_writew(u16 val, volatile void *addr) { - asm volatile("sh %0, 0(%1)" : : "r" (val), "r" (addr)); + asm volatile("sh %0, 0(%1)" : : "r"(val), "r"(addr)); } static inline void __raw_writel(u32 val, volatile void *addr) { - asm volatile("sw %0, 0(%1)" : : "r" (val), "r" (addr)); + asm volatile("sw %0, 0(%1)" : : "r"(val), "r"(addr)); } #if __riscv_xlen != 32 static inline void __raw_writeq(u64 val, volatile void *addr) { - asm volatile("sd %0, 0(%1)" : : "r" (val), "r" (addr)); + asm volatile("sd %0, 0(%1)" : : "r"(val), "r"(addr)); } #endif @@ -39,7 +39,7 @@ static inline u8 __raw_readb(const volatile void *addr) { u8 val; - asm volatile("lb %0, 0(%1)" : "=r" (val) : "r" (addr)); + asm volatile("lb %0, 0(%1)" : "=r"(val) : "r"(addr)); return val; } @@ -47,7 +47,7 @@ static inline u16 __raw_readw(const volatile void *addr) { u16 val; - asm volatile("lh %0, 0(%1)" : "=r" (val) : "r" (addr)); + asm volatile("lh %0, 0(%1)" : "=r"(val) : "r"(addr)); return val; } @@ -55,7 +55,7 @@ static inline u32 __raw_readl(const volatile void *addr) { u32 val; - asm volatile("lw %0, 0(%1)" : "=r" (val) : "r" (addr)); + asm volatile("lw %0, 0(%1)" : "=r"(val) : "r"(addr)); return val; } @@ -64,7 +64,7 @@ static inline u64 __raw_readq(const volatile void *addr) { u64 val; - asm volatile("ld %0, 0(%1)" : "=r" (val) : "r" (addr)); + asm volatile("ld %0, 0(%1)" : "=r"(val) : "r"(addr)); return val; } #endif diff --git a/include/sbi/riscv_locks.h b/include/sbi/riscv_locks.h index 4476319..55da7c0 100644 --- a/include/sbi/riscv_locks.h +++ b/include/sbi/riscv_locks.h @@ -14,13 +14,14 @@ typedef struct { volatile long lock; } spinlock_t; -#define __RISCV_SPIN_UNLOCKED 0 +#define __RISCV_SPIN_UNLOCKED 0 -#define SPIN_LOCK_INIT(_lptr) \ - (_lptr)->lock = __RISCV_SPIN_UNLOCKED +#define SPIN_LOCK_INIT(_lptr) (_lptr)->lock = __RISCV_SPIN_UNLOCKED -#define SPIN_LOCK_INITIALIZER \ - { .lock = __RISCV_SPIN_UNLOCKED, } +#define SPIN_LOCK_INITIALIZER \ + { \ + .lock = __RISCV_SPIN_UNLOCKED, \ + } int spin_lock_check(spinlock_t *lock); diff --git a/include/sbi/riscv_unpriv.h b/include/sbi/riscv_unpriv.h index bd134b5..a2a5851 100644 --- a/include/sbi/riscv_unpriv.h +++ b/include/sbi/riscv_unpriv.h @@ -14,29 +14,30 @@ #include <sbi/sbi_bits.h> #include <sbi/sbi_types.h> -#define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn) \ -static inline type load_##type(const type *addr) \ -{ \ - register ulong __mstatus asm ("a2"); \ - type val; \ - asm ("csrrs %0, "STR(CSR_MSTATUS)", %3\n" \ - #insn " %1, %2\n" \ - "csrw "STR(CSR_MSTATUS)", %0" \ - : "+&r" (__mstatus), "=&r" (val) \ - : "m" (*addr), "r" (MSTATUS_MPRV)); \ - return val; \ -} +#define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn) \ + static inline type load_##type(const type *addr) \ + { \ + register ulong __mstatus asm("a2"); \ + type val; \ + asm("csrrs %0, " STR(CSR_MSTATUS) ", %3\n" #insn " %1, %2\n" \ + "csrw " STR( \ + CSR_MSTATUS) ", %0" \ + : "+&r"(__mstatus), "=&r"(val) \ + : "m"(*addr), "r"(MSTATUS_MPRV)); \ + return val; \ + } -#define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type, insn) \ -static inline void store_##type(type *addr, type val) \ -{ \ - register ulong __mstatus asm ("a3"); \ - asm volatile ("csrrs %0, "STR(CSR_MSTATUS)", %3\n" \ - #insn " %1, %2\n" \ - "csrw "STR(CSR_MSTATUS)", %0" \ - : "+&r" (__mstatus) \ - : "r" (val), "m" (*addr), "r" (MSTATUS_MPRV)); \ -} +#define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type, insn) \ + static inline void store_##type(type *addr, type val) \ + { \ + register ulong __mstatus asm("a3"); \ + asm volatile( \ + "csrrs %0, " STR( \ + CSR_MSTATUS) ", %3\n" #insn " %1, %2\n" \ + "csrw " STR(CSR_MSTATUS) ", %0" \ + : "+&r"(__mstatus) \ + : "r"(val), "m"(*addr), "r"(MSTATUS_MPRV)); \ + } DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u8, lbu) DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u16, lhu) @@ -57,8 +58,7 @@ DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong, lw) static inline u64 load_u64(const u64 *addr) { - return load_u32((u32 *)addr) - + ((u64)load_u32((u32 *)addr + 1) << 32); + return load_u32((u32 *)addr) + ((u64)load_u32((u32 *)addr + 1) << 32); } static inline void store_u64(u64 *addr, u64 val) @@ -70,45 +70,45 @@ static inline void store_u64(u64 *addr, u64 val) static inline ulong get_insn(ulong mepc, ulong *mstatus) { - register ulong __mepc asm ("a2") = mepc; - register ulong __mstatus asm ("a3"); + register ulong __mepc asm("a2") = mepc; + register ulong __mstatus asm("a3"); ulong val; #ifndef __riscv_compressed - asm ("csrrs %[mstatus], "STR(CSR_MSTATUS)", %[mprv]\n" + asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n" #if __riscv_xlen == 64 - STR(LWU) " %[insn], (%[addr])\n" + STR(LWU) " %[insn], (%[addr])\n" #else - STR(LW) " %[insn], (%[addr])\n" + STR(LW) " %[insn], (%[addr])\n" #endif - "csrw "STR(CSR_MSTATUS)", %[mstatus]" - : [mstatus] "+&r" (__mstatus), [insn] "=&r" (val) - : [mprv] "r" (MSTATUS_MPRV|MSTATUS_MXR), [addr] "r" (__mepc)); + "csrw " STR(CSR_MSTATUS) ", %[mstatus]" + : [mstatus] "+&r"(__mstatus), [insn] "=&r"(val) + : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(__mepc)); #else ulong rvc_mask = 3, tmp; - asm ("csrrs %[mstatus], "STR(CSR_MSTATUS)", %[mprv]\n" - "and %[tmp], %[addr], 2\n" - "bnez %[tmp], 1f\n" + asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n" + "and %[tmp], %[addr], 2\n" + "bnez %[tmp], 1f\n" #if __riscv_xlen == 64 - STR(LWU) " %[insn], (%[addr])\n" + STR(LWU) " %[insn], (%[addr])\n" #else - STR(LW) " %[insn], (%[addr])\n" + STR(LW) " %[insn], (%[addr])\n" #endif - "and %[tmp], %[insn], %[rvc_mask]\n" - "beq %[tmp], %[rvc_mask], 2f\n" - "sll %[insn], %[insn], %[xlen_minus_16]\n" - "srl %[insn], %[insn], %[xlen_minus_16]\n" - "j 2f\n" - "1:\n" - "lhu %[insn], (%[addr])\n" - "and %[tmp], %[insn], %[rvc_mask]\n" - "bne %[tmp], %[rvc_mask], 2f\n" - "lhu %[tmp], 2(%[addr])\n" - "sll %[tmp], %[tmp], 16\n" - "add %[insn], %[insn], %[tmp]\n" - "2: csrw "STR(CSR_MSTATUS)", %[mstatus]" - : [mstatus] "+&r" (__mstatus), [insn] "=&r" (val), [tmp] "=&r" (tmp) - : [mprv] "r" (MSTATUS_MPRV|MSTATUS_MXR), [addr] "r" (__mepc), - [rvc_mask] "r" (rvc_mask), [xlen_minus_16] "i" (__riscv_xlen - 16)); + "and %[tmp], %[insn], %[rvc_mask]\n" + "beq %[tmp], %[rvc_mask], 2f\n" + "sll %[insn], %[insn], %[xlen_minus_16]\n" + "srl %[insn], %[insn], %[xlen_minus_16]\n" + "j 2f\n" + "1:\n" + "lhu %[insn], (%[addr])\n" + "and %[tmp], %[insn], %[rvc_mask]\n" + "bne %[tmp], %[rvc_mask], 2f\n" + "lhu %[tmp], 2(%[addr])\n" + "sll %[tmp], %[tmp], 16\n" + "add %[insn], %[insn], %[tmp]\n" + "2: csrw " STR(CSR_MSTATUS) ", %[mstatus]" + : [mstatus] "+&r"(__mstatus), [insn] "=&r"(val), [tmp] "=&r"(tmp) + : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(__mepc), + [rvc_mask] "r"(rvc_mask), [xlen_minus_16] "i"(__riscv_xlen - 16)); #endif if (mstatus) *mstatus = __mstatus; diff --git a/include/sbi/sbi_bitops.h b/include/sbi/sbi_bitops.h index 13d4fab..ece6ec4 100644 --- a/include/sbi/sbi_bitops.h +++ b/include/sbi/sbi_bitops.h @@ -93,6 +93,6 @@ static inline int __ffs(unsigned long word) * * Undefined if no zero exists, so code should check against ~0UL first. */ -#define ffz(x) __ffs(~(x)) +#define ffz(x) __ffs(~(x)) #endif diff --git a/include/sbi/sbi_bits.h b/include/sbi/sbi_bits.h index 6dc49fb..320966d 100644 --- a/include/sbi/sbi_bits.h +++ b/include/sbi/sbi_bits.h @@ -13,19 +13,20 @@ #define likely(x) __builtin_expect((x), 1) #define unlikely(x) __builtin_expect((x), 0) -#define ROUNDUP(a, b) ((((a)-1)/(b)+1)*(b)) -#define ROUNDDOWN(a, b) ((a)/(b)*(b)) +#define ROUNDUP(a, b) ((((a)-1) / (b) + 1) * (b)) +#define ROUNDDOWN(a, b) ((a) / (b) * (b)) #define MAX(a, b) ((a) > (b) ? (a) : (b)) #define MIN(a, b) ((a) < (b) ? (a) : (b)) #define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi) #define EXTRACT_FIELD(val, which) (((val) & (which)) / ((which) & ~((which)-1))) -#define INSERT_FIELD(val, which, fieldval) (((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1)))) +#define INSERT_FIELD(val, which, fieldval) \ + (((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1)))) #define STR(x) XSTR(x) #define XSTR(x) #x -#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) -#define BIT_WORD(nr) ((nr) / BITS_PER_LONG) +#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) +#define BIT_WORD(nr) ((nr) / BITS_PER_LONG) #endif diff --git a/include/sbi/sbi_console.h b/include/sbi/sbi_console.h index 0fd58e7..16021d0 100644 --- a/include/sbi/sbi_console.h +++ b/include/sbi/sbi_console.h @@ -12,7 +12,7 @@ #include <sbi/sbi_types.h> -#define __printf(a, b) __attribute__((format(printf, a, b))) +#define __printf(a, b) __attribute__((format(printf, a, b))) bool sbi_isprintable(char ch); @@ -26,8 +26,7 @@ void sbi_gets(char *s, int maxwidth, char endchar); int __printf(2, 3) sbi_sprintf(char *out, const char *format, ...); -int __printf(3, 4) sbi_snprintf(char *out, u32 out_sz, - const char *format, ...); +int __printf(3, 4) sbi_snprintf(char *out, u32 out_sz, const char *format, ...); int __printf(1, 2) sbi_printf(const char *format, ...); diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h index 2425fc5..a5b47a1 100644 --- a/include/sbi/sbi_ecall.h +++ b/include/sbi/sbi_ecall.h @@ -19,8 +19,7 @@ u16 sbi_ecall_version_major(void); u16 sbi_ecall_version_minor(void); -int sbi_ecall_handler(u32 hartid, ulong mcause, - struct sbi_trap_regs *regs, +int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs, struct sbi_scratch *scratch); #endif diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h index 8e79e24..6c12272 100644 --- a/include/sbi/sbi_ecall_interface.h +++ b/include/sbi/sbi_ecall_interface.h @@ -24,24 +24,24 @@ /* clang-format on */ -#define SBI_ECALL(__num, __a0, __a1, __a2) ({ \ - register unsigned long a0 asm ("a0") = (unsigned long)(__a0); \ - register unsigned long a1 asm ("a1") = (unsigned long)(__a1); \ - register unsigned long a2 asm ("a2") = (unsigned long)(__a2); \ - register unsigned long a7 asm ("a7") = (unsigned long)(__num); \ - asm volatile ("ecall" \ - : "+r" (a0) \ - : "r" (a1), "r" (a2), "r" (a7) \ - : "memory"); \ - a0; \ -}) - -#define SBI_ECALL_0(__num) SBI_ECALL(__num, 0, 0, 0) -#define SBI_ECALL_1(__num, __a0) SBI_ECALL(__num, __a0, 0, 0) -#define SBI_ECALL_2(__num, __a0, __a1) SBI_ECALL(__num, __a0, __a1, 0) - -#define sbi_ecall_console_putc(c) \ - SBI_ECALL_1(SBI_ECALL_CONSOLE_PUTCHAR, (c)); +#define SBI_ECALL(__num, __a0, __a1, __a2) \ + ({ \ + register unsigned long a0 asm("a0") = (unsigned long)(__a0); \ + register unsigned long a1 asm("a1") = (unsigned long)(__a1); \ + register unsigned long a2 asm("a2") = (unsigned long)(__a2); \ + register unsigned long a7 asm("a7") = (unsigned long)(__num); \ + asm volatile("ecall" \ + : "+r"(a0) \ + : "r"(a1), "r"(a2), "r"(a7) \ + : "memory"); \ + a0; \ + }) + +#define SBI_ECALL_0(__num) SBI_ECALL(__num, 0, 0, 0) +#define SBI_ECALL_1(__num, __a0) SBI_ECALL(__num, __a0, 0, 0) +#define SBI_ECALL_2(__num, __a0, __a1) SBI_ECALL(__num, __a0, __a1, 0) + +#define sbi_ecall_console_putc(c) SBI_ECALL_1(SBI_ECALL_CONSOLE_PUTCHAR, (c)); static inline void sbi_ecall_console_puts(const char *str) { diff --git a/include/sbi/sbi_emulate_csr.h b/include/sbi/sbi_emulate_csr.h index 00d5eff..5d1755f 100644 --- a/include/sbi/sbi_emulate_csr.h +++ b/include/sbi/sbi_emulate_csr.h @@ -14,14 +14,10 @@ struct sbi_scratch; -int sbi_emulate_csr_read(int csr_num, - u32 hartid, ulong mstatus, - struct sbi_scratch *scratch, - ulong *csr_val); +int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus, + struct sbi_scratch *scratch, ulong *csr_val); -int sbi_emulate_csr_write(int csr_num, - u32 hartid, ulong mstatus, - struct sbi_scratch *scratch, - ulong csr_val); +int sbi_emulate_csr_write(int csr_num, u32 hartid, ulong mstatus, + struct sbi_scratch *scratch, ulong csr_val); #endif diff --git a/include/sbi/sbi_fifo.h b/include/sbi/sbi_fifo.h index f9e2ca9..3f36c59 100644 --- a/include/sbi/sbi_fifo.h +++ b/include/sbi/sbi_fifo.h @@ -32,12 +32,12 @@ enum sbi_fifo_inplace_update_types { int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data); int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data); -void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem, - u16 entries, u16 entry_size); +void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem, u16 entries, + u16 entry_size); bool sbi_fifo_is_empty(struct sbi_fifo *fifo); bool sbi_fifo_is_full(struct sbi_fifo *fifo); int sbi_fifo_inplace_update(struct sbi_fifo *fifo, void *in, - int (*fptr) (void *in, void *data)); + int (*fptr)(void *in, void *data)); u16 sbi_fifo_avail(struct sbi_fifo *fifo); #endif diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h index 8b11df7..b282af9 100644 --- a/include/sbi/sbi_hart.h +++ b/include/sbi/sbi_hart.h @@ -20,10 +20,9 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch); void __attribute__((noreturn)) sbi_hart_hang(void); -void __attribute__((noreturn)) sbi_hart_switch_mode(unsigned long arg0, - unsigned long arg1, - unsigned long next_addr, - unsigned long next_mode); +void __attribute__((noreturn)) +sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1, + unsigned long next_addr, unsigned long next_mode); void sbi_hart_mark_available(u32 hartid); diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h index f68e8fe..108e5aa 100644 --- a/include/sbi/sbi_ipi.h +++ b/include/sbi/sbi_ipi.h @@ -44,8 +44,8 @@ struct sbi_tlb_info { #define SBI_TLB_INFO_SIZE sizeof(struct sbi_tlb_info) -int sbi_ipi_send_many(struct sbi_scratch *scratch, - ulong *pmask, u32 event, void *data); +int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong *pmask, u32 event, + void *data); void sbi_ipi_clear_smode(struct sbi_scratch *scratch); diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h index 39644d1..e46acfd 100644 --- a/include/sbi/sbi_platform.h +++ b/include/sbi/sbi_platform.h @@ -11,13 +11,13 @@ #define __SBI_PLATFORM_H__ /** Offset of name in struct sbi_platform */ -#define SBI_PLATFORM_NAME_OFFSET (0x0) +#define SBI_PLATFORM_NAME_OFFSET (0x0) /** Offset of features in struct sbi_platform */ -#define SBI_PLATFORM_FEATURES_OFFSET (0x40) +#define SBI_PLATFORM_FEATURES_OFFSET (0x40) /** Offset of hart_count in struct sbi_platform */ -#define SBI_PLATFORM_HART_COUNT_OFFSET (0x48) +#define SBI_PLATFORM_HART_COUNT_OFFSET (0x48) /** Offset of hart_stack_size in struct sbi_platform */ -#define SBI_PLATFORM_HART_STACK_SIZE_OFFSET (0x4c) +#define SBI_PLATFORM_HART_STACK_SIZE_OFFSET (0x4c) #ifndef __ASSEMBLY__ @@ -26,25 +26,23 @@ /** Possible feature flags of a platform */ enum sbi_platform_features { /** Platform has timer value */ - SBI_PLATFORM_HAS_TIMER_VALUE = (1 << 0), + SBI_PLATFORM_HAS_TIMER_VALUE = (1 << 0), /** Platform has HART hotplug support */ - SBI_PLATFORM_HAS_HART_HOTPLUG = (1 << 1), + SBI_PLATFORM_HAS_HART_HOTPLUG = (1 << 1), /** Platform has PMP support */ - SBI_PLATFORM_HAS_PMP = (1 << 2), + SBI_PLATFORM_HAS_PMP = (1 << 2), /** Platform has S-mode counter enable */ - SBI_PLATFORM_HAS_SCOUNTEREN = (1 << 3), + SBI_PLATFORM_HAS_SCOUNTEREN = (1 << 3), /** Platform has M-mode counter enable */ - SBI_PLATFORM_HAS_MCOUNTEREN = (1 << 4), + SBI_PLATFORM_HAS_MCOUNTEREN = (1 << 4), /** Platform has fault delegation support */ - SBI_PLATFORM_HAS_MFAULTS_DELEGATION = (1 << 5), + SBI_PLATFORM_HAS_MFAULTS_DELEGATION = (1 << 5), }; /** Default feature set for a platform */ -#define SBI_PLATFORM_DEFAULT_FEATURES \ - (SBI_PLATFORM_HAS_TIMER_VALUE | \ - SBI_PLATFORM_HAS_PMP | \ - SBI_PLATFORM_HAS_SCOUNTEREN | \ - SBI_PLATFORM_HAS_MCOUNTEREN | \ +#define SBI_PLATFORM_DEFAULT_FEATURES \ + (SBI_PLATFORM_HAS_TIMER_VALUE | SBI_PLATFORM_HAS_PMP | \ + SBI_PLATFORM_HAS_SCOUNTEREN | SBI_PLATFORM_HAS_MCOUNTEREN | \ SBI_PLATFORM_HAS_MFAULTS_DELEGATION) /** Representation of a platform */ @@ -71,8 +69,8 @@ struct sbi_platform { * Get PMP regions details (namely: protection, base address, * and size) for given HART */ - int (*pmp_region_info)(u32 hartid, u32 index, - ulong *prot, ulong *addr, ulong *log2size); + int (*pmp_region_info)(u32 hartid, u32 index, ulong *prot, ulong *addr, + ulong *log2size); /** Write a character to the platform console output */ void (*console_putc)(char ch); @@ -109,28 +107,28 @@ struct sbi_platform { } __packed; /** Get pointer to sbi_platform for sbi_scratch pointer */ -#define sbi_platform_ptr(__s) \ +#define sbi_platform_ptr(__s) \ ((const struct sbi_platform *)((__s)->platform_addr)) /** Get pointer to sbi_platform for current HART */ -#define sbi_platform_thishart_ptr() \ - ((const struct sbi_platform *)(sbi_scratch_thishart_ptr()->platform_addr)) +#define sbi_platform_thishart_ptr() \ + ((const struct sbi_platform *)(sbi_scratch_thishart_ptr() \ + ->platform_addr)) /** Check whether the platform supports timer value */ -#define sbi_platform_has_timer_value(__p) \ +#define sbi_platform_has_timer_value(__p) \ ((__p)->features & SBI_PLATFORM_HAS_TIMER_VALUE) /** Check whether the platform supports HART hotplug */ -#define sbi_platform_has_hart_hotplug(__p) \ +#define sbi_platform_has_hart_hotplug(__p) \ ((__p)->features & SBI_PLATFORM_HAS_HART_HOTPLUG) /** Check whether the platform has PMP support */ -#define sbi_platform_has_pmp(__p) \ - ((__p)->features & SBI_PLATFORM_HAS_PMP) +#define sbi_platform_has_pmp(__p) ((__p)->features & SBI_PLATFORM_HAS_PMP) /** Check whether the platform supports scounteren CSR */ -#define sbi_platform_has_scounteren(__p) \ +#define sbi_platform_has_scounteren(__p) \ ((__p)->features & SBI_PLATFORM_HAS_SCOUNTEREN) /** Check whether the platform supports mcounteren CSR */ -#define sbi_platform_has_mcounteren(__p) \ +#define sbi_platform_has_mcounteren(__p) \ ((__p)->features & SBI_PLATFORM_HAS_MCOUNTEREN) /** Check whether the platform supports fault delegation */ -#define sbi_platform_has_mfaults_delegation(__p) \ +#define sbi_platform_has_mfaults_delegation(__p) \ ((__p)->features & SBI_PLATFORM_HAS_MFAULTS_DELEGATION) /** @@ -258,8 +256,8 @@ static inline int sbi_platform_pmp_region_info(const struct sbi_platform *plat, ulong *log2size) { if (plat && plat->pmp_region_info) - return plat->pmp_region_info(hartid, index, - prot, addr, log2size); + return plat->pmp_region_info(hartid, index, prot, addr, + log2size); return 0; } @@ -395,9 +393,8 @@ static inline u64 sbi_platform_timer_value(const struct sbi_platform *plat) * @param plat pointer to struct struct sbi_platform * @param next_event timer value when timer event will happen */ -static inline void sbi_platform_timer_event_start( - const struct sbi_platform *plat, - u64 next_event) +static inline void +sbi_platform_timer_event_start(const struct sbi_platform *plat, u64 next_event) { if (plat && plat->timer_event_start) plat->timer_event_start(next_event); @@ -408,8 +405,8 @@ static inline void sbi_platform_timer_event_start( * * @param plat pointer to struct sbi_platform */ -static inline void sbi_platform_timer_event_stop( - const struct sbi_platform *plat) +static inline void +sbi_platform_timer_event_stop(const struct sbi_platform *plat) { if (plat && plat->timer_event_stop) plat->timer_event_stop(); diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h index fabbab0..f582766 100644 --- a/include/sbi/sbi_scratch.h +++ b/include/sbi/sbi_scratch.h @@ -79,28 +79,28 @@ struct sbi_scratch { /** Possible options for OpenSBI library */ enum sbi_scratch_options { /** Disable prints during boot */ - SBI_SCRATCH_NO_BOOT_PRINTS = (1 << 0), + SBI_SCRATCH_NO_BOOT_PRINTS = (1 << 0), }; /** Get pointer to sbi_scratch for current HART */ -#define sbi_scratch_thishart_ptr() \ -((struct sbi_scratch *)csr_read(CSR_MSCRATCH)) +#define sbi_scratch_thishart_ptr() \ + ((struct sbi_scratch *)csr_read(CSR_MSCRATCH)) /** Get Arg1 of next booting stage for current HART */ -#define sbi_scratch_thishart_arg1_ptr() \ -((void *)(sbi_scratch_thishart_ptr()->next_arg1)) +#define sbi_scratch_thishart_arg1_ptr() \ + ((void *)(sbi_scratch_thishart_ptr()->next_arg1)) /** Get pointer to sbi_ipi_data from sbi_scratch */ -#define sbi_ipi_data_ptr(scratch) \ -((struct sbi_ipi_data *)(void*)scratch + SBI_IPI_DATA_IPI_TYPE_OFFSET) +#define sbi_ipi_data_ptr(scratch) \ + ((struct sbi_ipi_data *)(void *)scratch + SBI_IPI_DATA_IPI_TYPE_OFFSET) /** Get pointer to tlb flush info fifo header from sbi_scratch */ -#define sbi_tlb_fifo_head_ptr(scratch) \ -((struct sbi_fifo *)(void*)scratch + SBI_SCRATCH_TLB_QUEUE_HEAD_OFFSET) +#define sbi_tlb_fifo_head_ptr(scratch) \ + ((struct sbi_fifo *)(void *)scratch + SBI_SCRATCH_TLB_QUEUE_HEAD_OFFSET) /** Get pointer to tlb flush info fifo queue address from sbi_scratch */ -#define sbi_tlb_fifo_mem_ptr(scratch) \ -(void *)((void*)scratch + SBI_SCRATCH_TLB_QUEUE_MEM_OFFSET) +#define sbi_tlb_fifo_mem_ptr(scratch) \ + (void *)((void *)scratch + SBI_SCRATCH_TLB_QUEUE_MEM_OFFSET) #endif diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h index 3e794e2..bf768d9 100644 --- a/include/sbi/sbi_system.h +++ b/include/sbi/sbi_system.h @@ -18,10 +18,10 @@ int sbi_system_early_init(struct sbi_scratch *scratch, bool cold_boot); int sbi_system_final_init(struct sbi_scratch *scratch, bool cold_boot); -void __attribute__((noreturn)) sbi_system_reboot(struct sbi_scratch *scratch, - u32 type); +void __attribute__((noreturn)) +sbi_system_reboot(struct sbi_scratch *scratch, u32 type); -void __attribute__((noreturn)) sbi_system_shutdown(struct sbi_scratch *scratch, - u32 type); +void __attribute__((noreturn)) +sbi_system_shutdown(struct sbi_scratch *scratch, u32 type); #endif diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h index e2a52b5..19b95a7 100644 --- a/include/sbi/sbi_trap.h +++ b/include/sbi/sbi_trap.h @@ -86,10 +86,9 @@ /* clang-format on */ /** Get offset of member with name 'x' in sbi_trap_regs */ -#define SBI_TRAP_REGS_OFFSET(x) \ - ((SBI_TRAP_REGS_##x) * __SIZEOF_POINTER__) +#define SBI_TRAP_REGS_OFFSET(x) ((SBI_TRAP_REGS_##x) * __SIZEOF_POINTER__) /** Size (in bytes) of sbi_trap_regs */ -#define SBI_TRAP_REGS_SIZE SBI_TRAP_REGS_OFFSET(last) +#define SBI_TRAP_REGS_SIZE SBI_TRAP_REGS_OFFSET(last) #ifndef __ASSEMBLY__ @@ -169,12 +168,10 @@ struct sbi_trap_regs { struct sbi_scratch; -int sbi_trap_redirect(struct sbi_trap_regs *regs, - struct sbi_scratch *scratch, +int sbi_trap_redirect(struct sbi_trap_regs *regs, struct sbi_scratch *scratch, ulong epc, ulong cause, ulong tval); -void sbi_trap_handler(struct sbi_trap_regs *regs, - struct sbi_scratch *scratch); +void sbi_trap_handler(struct sbi_trap_regs *regs, struct sbi_scratch *scratch); #endif diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h index 279c040..90020ac 100644 --- a/include/sbi/sbi_version.h +++ b/include/sbi/sbi_version.h @@ -10,7 +10,7 @@ #ifndef __SBI_VERSION_H__ #define __SBI_VERSION_H__ -#define OPENSBI_VERSION_MAJOR 0 -#define OPENSBI_VERSION_MINOR 3 +#define OPENSBI_VERSION_MAJOR 0 +#define OPENSBI_VERSION_MINOR 3 #endif |