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authorAnup Patel <apatel@ventanamicro.com>2022-04-28 16:29:14 +0300
committerAnup Patel <anup@brainfault.org>2022-05-07 07:35:37 +0300
commitdbc3d8f0ef19563a89aea266e032acbab549f7fe (patch)
tree50d02ef8441568b104b502141df053c3b80493e4 /include/sbi
parentd4b563c881d6bca15bd0c4123c245c875a80ffe6 (diff)
downloadopensbi-dbc3d8f0ef19563a89aea266e032acbab549f7fe.tar.xz
lib: sbi: Remove MCOUNTINHIBT hart feature
If a hart implements privileged spec v1.11 (or higher) then we can safely assume that mcountinhibit CSR is present and we don't need MCOUNTINHIBT as a hart feature. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com>
Diffstat (limited to 'include/sbi')
-rw-r--r--include/sbi/sbi_hart.h14
1 files changed, 6 insertions, 8 deletions
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 4665a62..bc6b766 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -26,20 +26,18 @@ enum sbi_hart_priv_versions {
/** Possible feature flags of a hart */
enum sbi_hart_features {
- /** Hart has counter inhibit CSR */
- SBI_HART_HAS_MCOUNTINHIBIT = (1 << 0),
/** Hart has sscofpmf extension */
- SBI_HART_HAS_SSCOFPMF = (1 << 1),
+ SBI_HART_HAS_SSCOFPMF = (1 << 0),
/** HART has timer csr implementation in hardware */
- SBI_HART_HAS_TIME = (1 << 2),
+ SBI_HART_HAS_TIME = (1 << 1),
/** HART has AIA local interrupt CSRs */
- SBI_HART_HAS_AIA = (1 << 3),
+ SBI_HART_HAS_AIA = (1 << 2),
/** HART has menvcfg CSR */
- SBI_HART_HAS_MENVCFG = (1 << 4),
+ SBI_HART_HAS_MENVCFG = (1 << 3),
/** HART has mstateen CSR **/
- SBI_HART_HAS_SMSTATEEN = (1 << 5),
+ SBI_HART_HAS_SMSTATEEN = (1 << 4),
/** HART has SSTC extension implemented in hardware */
- SBI_HART_HAS_SSTC = (1 << 6),
+ SBI_HART_HAS_SSTC = (1 << 5),
/** Last index of Hart features*/
SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_SSTC,