diff options
| author | Anup Patel <anup.patel@wdc.com> | 2019-03-30 15:13:23 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2019-04-01 07:40:38 +0300 |
| commit | 13877c3a6752138018f99214273dc3d7376cf5eb (patch) | |
| tree | db38165d1c2bba5e8f1e3149792bfef611be0c30 /include | |
| parent | cfff0126ab80d8c53e55f6eaae1a59e08159160b (diff) | |
| download | opensbi-13877c3a6752138018f99214273dc3d7376cf5eb.tar.xz | |
include: Rename sbi_unpriv.h to riscv_unpriv.h
The sbi_unpriv.h has quite a few load_xyz() and store_xyz() helper
routines based on RISC-V inline assembly for unpriviledged accesses
from M-mode. These helper routines are similar to helper routines
present in riscv_locks.h, riscv_io.h, and riscv_atomic.h so let's
rename sbi_unpriv.h to riscv_unpriv.h.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/sbi/riscv_unpriv.h (renamed from include/sbi/sbi_unpriv.h) | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/sbi/sbi_unpriv.h b/include/sbi/riscv_unpriv.h index 2d9dbb9..c109417 100644 --- a/include/sbi/sbi_unpriv.h +++ b/include/sbi/riscv_unpriv.h @@ -7,8 +7,8 @@ * Anup Patel <anup.patel@wdc.com> */ -#ifndef __SBI_UNPRIV_H__ -#define __SBI_UNPRIV_H__ +#ifndef __RISCV_UNPRIV_H__ +#define __RISCV_UNPRIV_H__ #include <sbi/riscv_encoding.h> #include <sbi/sbi_bits.h> |