diff options
| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2022-12-10 13:30:08 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2022-12-12 16:20:35 +0300 |
| commit | 0021b437377b4ea95f567f91fbf506c0b0b9e227 (patch) | |
| tree | 780d5d5e212c9ff77297f57efd7c428a8ba74478 /include | |
| parent | 64e8b9f72e986aba25f7cb41218b1a1088042ae3 (diff) | |
| download | opensbi-0021b437377b4ea95f567f91fbf506c0b0b9e227.tar.xz | |
lib: utils: serial: Add FDT driver for Renesas SCIF
Add FDT driver for Renesas SCIF.
dts example:
soc: soc {
....
scif0: serial@1004b800 {
compatible = "renesas,scif-r9a07g043",
"renesas,scif-r9a07g044";
reg = <0 0x1004b800 0 0x400>;
interrupts = <412 IRQ_TYPE_LEVEL_HIGH>,
<414 IRQ_TYPE_LEVEL_HIGH>,
<415 IRQ_TYPE_LEVEL_HIGH>,
<413 IRQ_TYPE_LEVEL_HIGH>,
<416 IRQ_TYPE_LEVEL_HIGH>,
<416 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi",
"bri", "dri", "tei";
clocks = <&cpg CPG_MOD R9A07G043_SCIF0_CLK_PCK>;
clock-names = "fck";
power-domains = <&cpg>;
resets = <&cpg R9A07G043_SCIF0_RST_SYSTEM_N>;
status = "disabled";
};
....
};
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/sbi_utils/fdt/fdt_helper.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h index c39f77a..09f3095 100644 --- a/include/sbi_utils/fdt/fdt_helper.h +++ b/include/sbi_utils/fdt/fdt_helper.h @@ -59,6 +59,9 @@ int fdt_parse_timebase_frequency(void *fdt, unsigned long *freq); int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset, struct platform_uart_data *uart); +int fdt_parse_renesas_scif_node(void *fdt, int nodeoffset, + struct platform_uart_data *uart); + int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset, struct platform_uart_data *uart); |