diff options
| author | Yu Chien Peter Lin <peterlin@andestech.com> | 2022-10-14 03:32:50 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2022-10-23 08:01:01 +0300 |
| commit | ce7c490719ed4e268979c8b6b54a5252396fbb3b (patch) | |
| tree | ae67d5743f976c66a96525342f49908897c5d46e /include | |
| parent | 6f3258e67187554b1202d3d2a065ef1adcdde3e6 (diff) | |
| download | opensbi-ce7c490719ed4e268979c8b6b54a5252396fbb3b.tar.xz | |
lib: utils/ipi: Add Andes fdt ipi driver support
Move Andes PLICSW ipi device to fdt ipi framework, this patch is based
on Leo's modified IPI scheme on PLICSW.
Current IPI scheme uses bit 0 of pending reigster on PLICSW to send IPI
from hart 0 to hart 7, but bit 0 needs to be hardwired to 0 according
to spec. After some investigation, self-IPI seems to be seldom or never
used, so we re-order the IPI scheme to support 8 core platforms.
dts example (Quad-core AX45MP):
plicsw: interrupt-controller@e6400000 {
compatible = "andestech,plicsw";
reg = <0x00000000 0xe6400000 0x00000000 0x00400000>;
interrupts-extended = <&CPU0_intc 3
&CPU1_intc 3
&CPU2_intc 3
&CPU3_intc 3>;
interrupt-controller;
#address-cells = <2>;
#interrupt-cells = <2>;
};
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/sbi_utils/fdt/fdt_helper.h | 3 | ||||
| -rw-r--r-- | include/sbi_utils/ipi/andes_plicsw.h | 46 |
2 files changed, 49 insertions, 0 deletions
diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h index 7ef63c9..c39f77a 100644 --- a/include/sbi_utils/fdt/fdt_helper.h +++ b/include/sbi_utils/fdt/fdt_helper.h @@ -98,6 +98,9 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer, int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base, unsigned long *plmt_size, u32 *hart_count); +int fdt_parse_plicsw_node(void *fdt, int nodeoffset, unsigned long *plicsw_base, + unsigned long *size, u32 *hart_count); + int fdt_parse_compat_addr(void *fdt, uint64_t *addr, const char *compatible); diff --git a/include/sbi_utils/ipi/andes_plicsw.h b/include/sbi_utils/ipi/andes_plicsw.h new file mode 100644 index 0000000..e93cda0 --- /dev/null +++ b/include/sbi_utils/ipi/andes_plicsw.h @@ -0,0 +1,46 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2022 Andes Technology Corporation + * + * Authors: + * Zong Li <zong@andestech.com> + * Nylon Chen <nylon7@andestech.com> + * Leo Yu-Chi Liang <ycliang@andestech.com> + * Yu Chien Peter Lin <peterlin@andestech.com> + */ + +#ifndef _IPI_ANDES_PLICSW_H_ +#define _IPI_ANDES_PLICSW_H_ + +#define PLICSW_PRIORITY_BASE 0x4 + +#define PLICSW_PENDING_BASE 0x1000 +#define PLICSW_PENDING_STRIDE 0x8 + +#define PLICSW_ENABLE_BASE 0x2000 +#define PLICSW_ENABLE_STRIDE 0x80 + +#define PLICSW_CONTEXT_BASE 0x200000 +#define PLICSW_CONTEXT_STRIDE 0x1000 +#define PLICSW_CONTEXT_CLAIM 0x4 + +#define PLICSW_HART_MASK 0x01010101 + +#define PLICSW_HART_MAX_NR 8 + +#define PLICSW_REGION_ALIGN 0x1000 + +struct plicsw_data { + unsigned long addr; + unsigned long size; + uint32_t hart_count; + /* hart id to source id table */ + uint32_t source_id[PLICSW_HART_MAX_NR]; +}; + +int plicsw_warm_ipi_init(void); + +int plicsw_cold_ipi_init(struct plicsw_data *plicsw); + +#endif /* _IPI_ANDES_PLICSW_H_ */ |