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| author | Anup Patel <apatel@ventanamicro.com> | 2022-03-29 17:12:22 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2022-04-05 06:21:40 +0300 |
| commit | 47d676570ddb0b50e741e4239d596de4d875e370 (patch) | |
| tree | d607a98e1a2c06d64576af46892e2f681c6d00ff /lib/sbi/sbi_ecall_replace.c | |
| parent | 31fecad46d1461c3bc6a4ef6d6aa461a19c1d78e (diff) | |
| download | opensbi-47d676570ddb0b50e741e4239d596de4d875e370.tar.xz | |
lib: sbi: Enable Zicbo[m|z] extensions in the menvcfg CSR
The bits to configure/enable Zicbo[m|z] extensions in the menvcfg
CSR are WARL. We try to enable these bits irrespective whether
these extensions are available or not because writes to these
bits will be ignored if these extensions are not available.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Diffstat (limited to 'lib/sbi/sbi_ecall_replace.c')
0 files changed, 0 insertions, 0 deletions