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| author | Anup Patel <anup.patel@wdc.com> | 2019-08-18 10:44:44 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2019-09-30 13:06:14 +0300 |
| commit | 1e9f88889f8b7c66dd229299715eed87e734aafa (patch) | |
| tree | 8c1619786e090dfc7cbb57223ac3edda86607ec5 /lib/sbi/sbi_emulate_csr.c | |
| parent | 7d4420bd6929ef3f2c761c262dbc3f7f2ae150c2 (diff) | |
| download | opensbi-1e9f88889f8b7c66dd229299715eed87e734aafa.tar.xz | |
lib: Emulate HTIMEDELTA CSR for platforms not having TIME CSR
For platforms not having TIME CSR, we trap-n-emulate TIME CSR
read/write in OpenSBI. Same rationale applies to HTIMEDELTA CSR
as well so we trap-n-emulate HTIMEDELTA CSR for platforms not
having TIME CSR.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'lib/sbi/sbi_emulate_csr.c')
| -rw-r--r-- | lib/sbi/sbi_emulate_csr.c | 70 |
1 files changed, 59 insertions, 11 deletions
diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c index 791890f..0901ec1 100644 --- a/lib/sbi/sbi_emulate_csr.c +++ b/lib/sbi/sbi_emulate_csr.c @@ -14,16 +14,30 @@ #include <sbi/sbi_emulate_csr.h> #include <sbi/sbi_error.h> #include <sbi/sbi_timer.h> +#include <sbi/sbi_trap.h> -int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus, +int sbi_emulate_csr_read(int csr_num, u32 hartid, struct sbi_trap_regs *regs, struct sbi_scratch *scratch, ulong *csr_val) { + int ret = 0; ulong cen = -1UL; + ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT; +#if __riscv_xlen == 32 + bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE; +#else + bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; +#endif - if (EXTRACT_FIELD(mstatus, MSTATUS_MPP) == PRV_U) + if (prev_mode == PRV_U) cen = csr_read(CSR_SCOUNTEREN); switch (csr_num) { + case CSR_HTIMEDELTA: + if (prev_mode == PRV_S && !virt) + *csr_val = sbi_timer_get_delta(scratch); + else + ret = SBI_ENOTSUPP; + break; case CSR_CYCLE: if (!((cen >> (CSR_CYCLE - CSR_CYCLE)) & 1)) return -1; @@ -32,7 +46,8 @@ int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus, case CSR_TIME: if (!((cen >> (CSR_TIME - CSR_CYCLE)) & 1)) return -1; - *csr_val = sbi_timer_value(scratch); + *csr_val = (virt) ? sbi_timer_virt_value(scratch): + sbi_timer_value(scratch); break; case CSR_INSTRET: if (!((cen >> (CSR_INSTRET - CSR_CYCLE)) & 1)) @@ -50,6 +65,12 @@ int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus, *csr_val = csr_read(CSR_MHPMCOUNTER4); break; #if __riscv_xlen == 32 + case CSR_HTIMEDELTAH: + if (prev_mode == PRV_S && !virt) + *csr_val = sbi_timer_get_delta(scratch) >> 32; + else + ret = SBI_ENOTSUPP; + break; case CSR_CYCLEH: if (!((cen >> (CSR_CYCLE - CSR_CYCLE)) & 1)) return -1; @@ -58,7 +79,8 @@ int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus, case CSR_TIMEH: if (!((cen >> (CSR_TIME - CSR_CYCLE)) & 1)) return -1; - *csr_val = sbi_timer_value(scratch) >> 32; + *csr_val = (virt) ? sbi_timer_virt_value(scratch) >> 32: + sbi_timer_value(scratch) >> 32; break; case CSR_INSTRETH: if (!((cen >> (CSR_INSTRET - CSR_CYCLE)) & 1)) @@ -83,18 +105,35 @@ int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus, *csr_val = csr_read(CSR_MHPMEVENT4); break; default: + ret = SBI_ENOTSUPP; + break; + }; + + if (ret) sbi_dprintf(scratch, "%s: hartid%d: invalid csr_num=0x%x\n", __func__, hartid, csr_num); - return SBI_ENOTSUPP; - }; - return 0; + return ret; } -int sbi_emulate_csr_write(int csr_num, u32 hartid, ulong mstatus, +int sbi_emulate_csr_write(int csr_num, u32 hartid, struct sbi_trap_regs *regs, struct sbi_scratch *scratch, ulong csr_val) { + int ret = 0; + ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT; +#if __riscv_xlen == 32 + bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE; +#else + bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; +#endif + switch (csr_num) { + case CSR_HTIMEDELTA: + if (prev_mode == PRV_S && !virt) + sbi_timer_set_delta(scratch, csr_val); + else + ret = SBI_ENOTSUPP; + break; case CSR_CYCLE: csr_write(CSR_MCYCLE, csr_val); break; @@ -108,6 +147,12 @@ int sbi_emulate_csr_write(int csr_num, u32 hartid, ulong mstatus, csr_write(CSR_MHPMCOUNTER4, csr_val); break; #if __riscv_xlen == 32 + case CSR_HTIMEDELTAH: + if (prev_mode == PRV_S && !virt) + sbi_timer_set_delta_upper(scratch, csr_val); + else + ret = SBI_ENOTSUPP; + break; case CSR_CYCLEH: csr_write(CSR_MCYCLEH, csr_val); break; @@ -128,10 +173,13 @@ int sbi_emulate_csr_write(int csr_num, u32 hartid, ulong mstatus, csr_write(CSR_MHPMEVENT4, csr_val); break; default: + ret = SBI_ENOTSUPP; + break; + }; + + if (ret) sbi_dprintf(scratch, "%s: hartid%d: invalid csr_num=0x%x\n", __func__, hartid, csr_num); - return SBI_ENOTSUPP; - }; - return 0; + return ret; } |