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| author | Pragnesh Patel <pragnesh.patel@sifive.com> | 2020-09-23 10:14:17 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2020-09-25 11:52:22 +0300 |
| commit | 7701ea13be4c6e2e16cce334e03ff8ab5b5e1d60 (patch) | |
| tree | 8dcd7c16ec0f493b5e3f8bca97b7dcc4e34d01bf /lib/sbi/sbi_hart.c | |
| parent | aaeca7eb4efa96cfde3973f425a6769b50285756 (diff) | |
| download | opensbi-7701ea13be4c6e2e16cce334e03ff8ab5b5e1d60.tar.xz | |
lib: sbi: Fix PMP CSR detection
HiFive unleashed currently implements fewer than 56 bits of physical
address so existing PMP CSR detection is broken.
PMP address register encodes bits 55-2 of a 56-bit physical address,
Not all physical address bits may be implemented, So just check
minimum 1 bit.
Fixes: 74d1db706293 ("lib: sbi: Improve PMP CSR detection and
progamming")
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'lib/sbi/sbi_hart.c')
| -rw-r--r-- | lib/sbi/sbi_hart.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index 4cbe8ce..6413194 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -403,7 +403,7 @@ static void hart_detect_features(struct sbi_scratch *scratch) __check_csr_32(__csr + 32, __rdonly, __wrval, __field, __skip) /* Detect number of PMP regions */ - __check_csr_64(CSR_PMPADDR0, 0, PMP_ADDR_MASK, pmp_count, __pmp_skip); + __check_csr_64(CSR_PMPADDR0, 0, 1UL, pmp_count, __pmp_skip); __pmp_skip: /* Detect number of MHPM counters */ |