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| author | Atish Patra <atish.patra@wdc.com> | 2020-02-12 04:42:50 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2020-02-13 07:28:27 +0300 |
| commit | c2bfa2bff30312679cfee986bbed9b974c6760bb (patch) | |
| tree | c018a91ba5f6ab0e0343ffaae71bffd5b0c6768b /lib/utils/irqchip | |
| parent | 1a8ca08cc037c65c605e7e2f98b8c01606eaca3b (diff) | |
| download | opensbi-c2bfa2bff30312679cfee986bbed9b974c6760bb.tar.xz | |
lib: irqchip/plic: Disable all contexts and IRQs
To initialize PLIC in sane state, we should:
1. set maximum threshold value of M-mode PLIC contexts
2. set maximum threshold value of S-mode PLIC contexts
3. set irq priorities to miniumum
Fix the comment and initialize the threshold/priorities correctly.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Diffstat (limited to 'lib/utils/irqchip')
| -rw-r--r-- | lib/utils/irqchip/plic.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c index ea09f0a..467938c 100644 --- a/lib/utils/irqchip/plic.c +++ b/lib/utils/irqchip/plic.c @@ -91,13 +91,13 @@ int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id) plic_set_ie(s_cntx_id, i, 0); } - /* By default, enable M-mode threshold */ + /* By default, disable M-mode threshold */ if (m_cntx_id > -1) - plic_set_thresh(m_cntx_id, 1); + plic_set_thresh(m_cntx_id, 0xffffffff); /* By default, disable S-mode threshold */ if (s_cntx_id > -1) - plic_set_thresh(s_cntx_id, 0); + plic_set_thresh(s_cntx_id, 0xffffffff); return 0; } @@ -112,7 +112,7 @@ int plic_cold_irqchip_init(unsigned long base, u32 num_sources, u32 hart_count) /* Configure default priorities of all IRQs */ for (i = 1; i <= plic_num_sources; i++) - plic_set_priority(i, 1); + plic_set_priority(i, 0); return 0; } |