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| author | Bin Meng <bmeng.cn@gmail.com> | 2020-03-09 06:52:42 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2020-03-10 08:08:08 +0300 |
| commit | 078686d75c929af72971bb51115438e3a2826896 (patch) | |
| tree | cc94b01fc76f140e5a2777e78974d54a128c2673 /lib | |
| parent | 650c0e525ce60e80b6756aa8cc4eeae5b20ccbd8 (diff) | |
| download | opensbi-078686d75c929af72971bb51115438e3a2826896.tar.xz | |
lib: serial: Fix coding style issues
This fixes various coding style issues found in the serial codes.
No functional changes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/utils/serial/sifive-uart.c | 2 | ||||
| -rw-r--r-- | lib/utils/serial/uart8250.c | 20 |
2 files changed, 11 insertions, 11 deletions
diff --git a/lib/utils/serial/sifive-uart.c b/lib/utils/serial/sifive-uart.c index fd6f28d..b82a1b3 100644 --- a/lib/utils/serial/sifive-uart.c +++ b/lib/utils/serial/sifive-uart.c @@ -48,7 +48,7 @@ static inline unsigned int uart_min_clk_divisor(uint64_t in_freq, uint64_t max_target_hz) { uint64_t quotient = (in_freq + max_target_hz - 1) / (max_target_hz); - // Avoid underflow + /* Avoid underflow */ if (quotient == 0) { return 0; } else { diff --git a/lib/utils/serial/uart8250.c b/lib/utils/serial/uart8250.c index eace061..42f1881 100644 --- a/lib/utils/serial/uart8250.c +++ b/lib/utils/serial/uart8250.c @@ -26,15 +26,15 @@ #define UART_SCR_OFFSET 7 /* I/O: Scratch Register */ #define UART_MDR1_OFFSET 8 /* I/O: Mode Register */ -#define UART_LSR_FIFOE 0x80 /* Fifo error */ -#define UART_LSR_TEMT 0x40 /* Transmitter empty */ -#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ -#define UART_LSR_BI 0x10 /* Break interrupt indicator */ -#define UART_LSR_FE 0x08 /* Frame error indicator */ -#define UART_LSR_PE 0x04 /* Parity error indicator */ -#define UART_LSR_OE 0x02 /* Overrun error indicator */ -#define UART_LSR_DR 0x01 /* Receiver data ready */ -#define UART_LSR_BRK_ERROR_BITS 0x1E /* BI, FE, PE, OE bits */ +#define UART_LSR_FIFOE 0x80 /* Fifo error */ +#define UART_LSR_TEMT 0x40 /* Transmitter empty */ +#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ +#define UART_LSR_BI 0x10 /* Break interrupt indicator */ +#define UART_LSR_FE 0x08 /* Frame error indicator */ +#define UART_LSR_PE 0x04 /* Parity error indicator */ +#define UART_LSR_OE 0x02 /* Overrun error indicator */ +#define UART_LSR_DR 0x01 /* Receiver data ready */ +#define UART_LSR_BRK_ERROR_BITS 0x1E /* BI, FE, PE, OE bits */ /* clang-format on */ @@ -88,7 +88,7 @@ int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift, { u16 bdiv; - uart8250_base = (volatile void *)base; + uart8250_base = (volatile void *)base; uart8250_reg_shift = reg_shift; uart8250_reg_width = reg_width; uart8250_in_freq = in_freq; |