diff options
author | Olof Johansson <olof@lixom.net> | 2019-02-04 05:49:20 +0300 |
---|---|---|
committer | Anup Patel <anup@brainfault.org> | 2019-02-05 16:23:09 +0300 |
commit | c0addfe751e51376a73df71336ce11826e68c939 (patch) | |
tree | 976fd2840382f7be088a47907b2b49e6517071fa /lib | |
parent | 30dfdf6e0e4ac11c80ba6505024481a15f604160 (diff) | |
download | opensbi-c0addfe751e51376a73df71336ce11826e68c939.tar.xz |
riscv_asm.h: Use CSR_<FOO> instead of <foo> for csr_read()
Some toolchains might not have all the CSRs available (as seen with
GCC 7.2). So, instead use the defined CSR_ values.
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'lib')
-rw-r--r-- | lib/sbi_misaligned_ldst.c | 4 | ||||
-rw-r--r-- | lib/sbi_trap.c | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/lib/sbi_misaligned_ldst.c b/lib/sbi_misaligned_ldst.c index 77885a4..8522255 100644 --- a/lib/sbi_misaligned_ldst.c +++ b/lib/sbi_misaligned_ldst.c @@ -28,7 +28,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause, union reg_data val; ulong mstatus = csr_read(mstatus); ulong insn = get_insn(regs->mepc, &mstatus); - ulong addr = csr_read(mtval); + ulong addr = csr_read(CSR_MTVAL); int i, fp = 0, shift = 0, len = 0; if ((insn & INSN_MASK_LW) == INSN_MATCH_LW) { @@ -114,7 +114,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause, union reg_data val; ulong mstatus = csr_read(mstatus); ulong insn = get_insn(regs->mepc, &mstatus); - ulong addr = csr_read(mtval); + ulong addr = csr_read(CSR_MTVAL); int i, len = 0; val.data_ulong = GET_RS2(insn, regs); diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c index 4c0f2a9..fb9ca4f 100644 --- a/lib/sbi_trap.c +++ b/lib/sbi_trap.c @@ -89,9 +89,9 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs, return SBI_ENOTSUPP; /* Update S-mode exception info */ - csr_write(stval, tval); - csr_write(sepc, epc); - csr_write(scause, cause); + csr_write(CSR_STVAL, tval); + csr_write(CSR_SEPC, epc); + csr_write(CSR_SCAUSE, cause); /* Set MEPC to S-mode exception vector base */ regs->mepc = csr_read(stvec); @@ -183,6 +183,6 @@ void sbi_trap_handler(struct sbi_trap_regs *regs, trap_error: if (rc) { - sbi_trap_error(msg, rc, hartid, mcause, csr_read(mtval), regs); + sbi_trap_error(msg, rc, hartid, mcause, csr_read(CSR_MTVAL), regs); } } |