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authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>2022-12-10 13:30:09 +0300
committerAnup Patel <anup@brainfault.org>2022-12-12 16:20:46 +0300
commit684090272af9ce84ff0768d8294bf7d42f14edeb (patch)
tree26d2b0d6c57e4ef71fd7360338a5bd5dcf674b21 /lib
parent0021b437377b4ea95f567f91fbf506c0b0b9e227 (diff)
downloadopensbi-684090272af9ce84ff0768d8294bf7d42f14edeb.tar.xz
lib: utils/irqchip: Add compatible string for Andestech NCEPLIC100
Add compatible string for Andestech NCEPLIC100 found on Renesas RZ/Five SoC which is equipped with AX45MP AndesCore. While at it drop the comma after the sentinel as it does not make sense to have a comma after a sentinel, as any new elements must be added before the sentinel. dts example (Single-core AX45MP): soc: soc { .... plic: interrupt-controller@12c00000 { compatible = "renesas,r9a07g043-plic", "andestech,nceplic100"; #interrupt-cells = <2>; #address-cells = <0>; riscv,ndev = <511>; interrupt-controller; reg = <0x0 0x12c00000 0 0x400000>; clocks = <&cpg CPG_MOD R9A07G043_NCEPLIC_ACLK>; power-domains = <&cpg>; resets = <&cpg R9A07G043_NCEPLIC_ARESETN>; interrupts-extended = <&cpu0_intc 11 &cpu0_intc 9>; }; .... }; Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng@tinylab.org>
Diffstat (limited to 'lib')
-rw-r--r--lib/utils/irqchip/fdt_irqchip_plic.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index fe08836..8e90fa7 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -159,11 +159,12 @@ void thead_plic_restore(void)
}
static const struct fdt_match irqchip_plic_match[] = {
+ { .compatible = "andestech,nceplic100" },
{ .compatible = "riscv,plic0" },
{ .compatible = "sifive,plic-1.0.0" },
{ .compatible = "thead,c900-plic",
.data = thead_plic_plat_init },
- { },
+ { /* sentinel */ }
};
struct fdt_irqchip fdt_irqchip_plic = {