diff options
| author | Samuel Holland <samuel@sholland.org> | 2021-10-18 08:33:50 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2021-10-21 07:36:00 +0300 |
| commit | 78c2b19218bd62653b9fb31623a42ced45f38ea6 (patch) | |
| tree | cacc2885adb9fdb6aa7706a738b20e14b25956b9 /lib | |
| parent | 422eda499cd6b69c0ca9f4cb06b3aceef17a3b27 (diff) | |
| download | opensbi-78c2b19218bd62653b9fb31623a42ced45f38ea6.tar.xz | |
lib: utils/irqchip: Automatically delegate T-HEAD PLIC accessOpenSBI-v0.9-78c2b19
The T-HEAD PLIC implementation requires setting a delegation bit
to allow access from S-mode. Now that the T-HEAD PLIC has its own
compatible string, set this bit automatically from the PLIC driver,
instead of reaching into the PLIC's MMIO space from another driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/utils/irqchip/fdt_irqchip_plic.c | 15 | ||||
| -rw-r--r-- | lib/utils/reset/fdt_reset_thead.c | 8 |
2 files changed, 15 insertions, 8 deletions
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c index 18d2797..8d375be 100644 --- a/lib/utils/irqchip/fdt_irqchip_plic.c +++ b/lib/utils/irqchip/fdt_irqchip_plic.c @@ -9,6 +9,7 @@ #include <libfdt.h> #include <sbi/riscv_asm.h> +#include <sbi/riscv_io.h> #include <sbi/sbi_error.h> #include <sbi/sbi_hartmask.h> #include <sbi_utils/fdt/fdt_helper.h> @@ -91,6 +92,11 @@ static int irqchip_plic_cold_init(void *fdt, int nodeoff, if (rc) return rc; + if (match->data) { + void (*plic_plat_init)(struct plic_data *) = match->data; + plic_plat_init(pd); + } + rc = plic_cold_irqchip_init(pd); if (rc) return rc; @@ -106,9 +112,18 @@ static int irqchip_plic_cold_init(void *fdt, int nodeoff, return irqchip_plic_update_hartid_table(fdt, nodeoff, pd); } +#define THEAD_PLIC_CTRL_REG 0x1ffffc + +static void thead_plic_plat_init(struct plic_data *pd) +{ + writel_relaxed(BIT(0), (void *)pd->addr + THEAD_PLIC_CTRL_REG); +} + static const struct fdt_match irqchip_plic_match[] = { { .compatible = "riscv,plic0" }, { .compatible = "sifive,plic-1.0.0" }, + { .compatible = "thead,c900-plic", + .data = thead_plic_plat_init }, { }, }; diff --git a/lib/utils/reset/fdt_reset_thead.c b/lib/utils/reset/fdt_reset_thead.c index 750b7aa..d491687 100644 --- a/lib/utils/reset/fdt_reset_thead.c +++ b/lib/utils/reset/fdt_reset_thead.c @@ -82,14 +82,6 @@ static int thead_reset_init(void *fdt, int nodeoff, clone_csrs(cnt); } - - /* Delegate plic enable regs for S-mode */ - val = fdt_getprop(fdt, nodeoff, "plic-delegate", &len); - if (len > 0 && val) { - p = (void *)(ulong)fdt64_to_cpu(*val); - writel(BIT(0), p); - } - /* Old reset method for secondary harts */ if (fdt_getprop(fdt, nodeoff, "using-csr-reset", &len)) { csr_write(0x7c7, (ulong)&__thead_pre_start_warm); |