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| author | Atish Patra <atish.patra@wdc.com> | 2020-03-23 22:48:55 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2020-03-24 10:45:52 +0300 |
| commit | ed265b4498cabdcdeb24f5f76548b9df73ae07f8 (patch) | |
| tree | d5f7eda8d7888435957e2293ef8976106e67b8f8 /platform/fpga/ariane/platform.c | |
| parent | 59688948421deea18993836152af66765bdc76f6 (diff) | |
| download | opensbi-ed265b4498cabdcdeb24f5f76548b9df73ae07f8.tar.xz | |
platform: fpga/ariane: Remove redundant plic address macros
All the common PLIC specific macros are already defined in plic.c.
Remove it from platform code. While at it, Fix the other coding style
issues.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'platform/fpga/ariane/platform.c')
| -rw-r--r-- | platform/fpga/ariane/platform.c | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c index bba04d6..9c13529 100644 --- a/platform/fpga/ariane/platform.c +++ b/platform/fpga/ariane/platform.c @@ -25,10 +25,6 @@ #define ARIANE_PLIC_NUM_SOURCES 3 #define ARIANE_HART_COUNT 1 #define ARIANE_CLINT_ADDR 0x2000000 -#define PLIC_ENABLE_BASE 0x2000 -#define PLIC_ENABLE_STRIDE 0x80 -#define PLIC_CONTEXT_BASE 0x200000 -#define PLIC_CONTEXT_STRIDE 0x1000 #define SBI_ARIANE_FEATURES \ (SBI_PLATFORM_HAS_TIMER_VALUE | \ @@ -36,7 +32,6 @@ SBI_PLATFORM_HAS_MCOUNTEREN | \ SBI_PLATFORM_HAS_MFAULTS_DELEGATION) - /* * Ariane platform early initialization. */ @@ -68,10 +63,10 @@ static int ariane_final_init(bool cold_boot) static int ariane_console_init(void) { return uart8250_init(ARIANE_UART_ADDR, - ARIANE_UART_FREQ, - ARIANE_UART_BAUDRATE, - ARIANE_UART_REG_SHIFT, - ARIANE_UART_REG_WIDTH); + ARIANE_UART_FREQ, + ARIANE_UART_BAUDRATE, + ARIANE_UART_REG_SHIFT, + ARIANE_UART_REG_WIDTH); } static int plic_ariane_warm_irqchip_init(u32 target_hart, |