summaryrefslogtreecommitdiff
path: root/platform/generic
diff options
context:
space:
mode:
authorAnup Patel <anup.patel@wdc.com>2020-09-09 11:24:03 +0300
committerAnup Patel <anup@brainfault.org>2020-09-16 06:35:31 +0300
commitaaeca7eb4efa96cfde3973f425a6769b50285756 (patch)
treeeea2e688fac58419ebf2a06270e922a22262f5e3 /platform/generic
parent172fa1601c7faaa01c547e8c498f5bdefd52d7cb (diff)
downloadopensbi-aaeca7eb4efa96cfde3973f425a6769b50285756.tar.xz
platform: generic: Don't mark non-MMU HARTs as invalid
Currently, the generic platform fw_platform_init() marks non-MMU HARTs (e.g. E-core on SiFive Unleashed) as invalid. This means such non-MMU HARTs won't be allowed to go ahead by sbi_init(). The sbi_init() now has a check for next stage privilege mode when selecting coldboot HART. This check will force non-MMU HARTS (i.e. HARTs without S-mode) to proceed in warmboot path and wait in the HSM STOPPED state. This means we don't need to mark non-MMU HARTs as invalid in generic platform fw_platform_init(). Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
Diffstat (limited to 'platform/generic')
-rw-r--r--platform/generic/platform.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index c3cf423..d902e71 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -71,7 +71,7 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
unsigned long arg2, unsigned long arg3,
unsigned long arg4)
{
- const char *model, *mmu_type;
+ const char *model;
void *fdt = (void *)arg1;
u32 hartid, hart_count = 0;
int rc, root_offset, cpus_offset, cpu_offset, len;
@@ -101,10 +101,6 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
if (SBI_HARTMASK_MAX_BITS <= hartid)
continue;
- mmu_type = fdt_getprop(fdt, cpu_offset, "mmu-type", &len);
- if (!mmu_type || !len)
- hartid = -1U;
-
generic_hart_index2id[hart_count++] = hartid;
}