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| author | Atish Patra <atishp@rivosinc.com> | 2022-01-07 21:54:09 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2022-02-04 07:40:28 +0300 |
| commit | a26dc609df04ca4704873b683ac03855f20b056e (patch) | |
| tree | 47a5f435fc1385bd1302fb85a4f6c7fc5159d2d7 /platform | |
| parent | 3b7c204dcaa58e415ad7451c2a690bb88773abbf (diff) | |
| download | opensbi-a26dc609df04ca4704873b683ac03855f20b056e.tar.xz | |
lib: sbi: Disable interrupt and inhibit counting in M-mode during init
Currently, the mhpmevent CSRs are untouched during hart init during
cold/warm boot. Ideally, we should clear out all the bits except
overflow and MINH bit. That is required to disable overflow
interrupt and inhibit counting in M-mode to avoid any spurious
interrupts before perf start.
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'platform')
0 files changed, 0 insertions, 0 deletions