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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2022-12-10 13:30:10 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2022-12-12 16:20:56 +0300 |
| commit | 8b1617d13a4200d1ec7d1604e4a4025cc1bcf891 (patch) | |
| tree | 78bcb27bb366247532ace834c0985e21738925a4 /scripts | |
| parent | 684090272af9ce84ff0768d8294bf7d42f14edeb (diff) | |
| download | opensbi-8b1617d13a4200d1ec7d1604e4a4025cc1bcf891.tar.xz | |
platform: generic: Add Renesas RZ/Five initial support
This commit provides basic support for the Renesas RZ/Five
(R9A07G043F) SoC.
The RZ/Five microprocessor includes a single RISC-V CPU Core (Andes AX45MP)
1.0 GHz, 16-bit DDR3L/DDR4 interface. Supported interfaces include:
- Gigabit Ethernet 2ch
- CAN interface (CAN-FD) 2ch
- USB 2.0 interface 2ch
- SD interface 2ch
- AD converter 2ch
Useful links:
-------------
Links: https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzfive-risc-v-general-purpose-microprocessors-risc-v-cpu-core-andes-ax45mp-single-10-ghz-2ch-gigabit-ethernet
Links: http://www.andestech.com/en/products-solutions/andescore-processors/riscv-ax45mp/
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions