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Diffstat (limited to 'docs')
| -rw-r--r-- | docs/external/coreboot.md | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/docs/external/coreboot.md b/docs/external/coreboot.md index fe2f7ba..de32e90 100644 --- a/docs/external/coreboot.md +++ b/docs/external/coreboot.md @@ -1,7 +1,10 @@ OpenSBI as coreboot payload -============================== +=========================== -[coreboot](https://www.coreboot.org/) is a free/libre and open source firmware platform support multiple hardware architectures( x86, ARMv7, arm64, PowerPC64, MIPS and RISC-V) and diverse hardware models. In RISC-V world, coreboot currently support HiFive Unleashed with OpenSBI as a payload to boot GNU/Linux: +[coreboot] is a free/libre and open source firmware platform support multiple +hardware architectures(x86, ARMv7, arm64, PowerPC64, MIPS and RISC-V) and +diverse hardware models. In RISC-V world, coreboot currently support HiFive +Unleashed with OpenSBI as a payload to boot GNU/Linux: ``` SiFive HiFive unleashed's original firmware boot process: @@ -21,4 +24,9 @@ coreboot boot process: +---------------------------------------------+-------------+-------+-+ ``` -The upstreaming work is still in progress. There's a [documentation](https://github.com/hardenedlinux/embedded-iot_profile/blob/master/docs/riscv/hifiveunleashed_coreboot_notes-en.md) about how to build [out-of-tree code](https://github.com/hardenedlinux/coreboot-HiFiveUnleashed) to load OpenSBI. +The upstreaming work is still in progress. There's a [documentation] about how +to build [out-of-tree code] to load OpenSBI. + +[coreboot]: https://www.coreboot.org/ +[documentation]: https://github.com/hardenedlinux/embedded-iot_profile/blob/master/docs/riscv/hifiveunleashed_coreboot_notes-en.md +[out-of-tree code]: https://github.com/hardenedlinux/coreboot-HiFiveUnleashed |