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2022-12-05docs: andes-ae350.md: fix watchdog nodename in dts exampleYu Chien Peter Lin1-1/+1
The example should use watchdog as nodename instead of wdt. This is defined in watchdog common schemas: https://github.com/torvalds/linux/blob/v6.0/Documentation/devicetree/bindings/watchdog/watchdog.yaml#L19 Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-05docs: platform: Update AE350 and generic platform documentationYu Chien Peter Lin2-2/+5
Update compile option and platform compatible string for AE350 and add it to the generic platform list. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-05platform: generic/andes: Enable generic platform support for AE350Yu Chien Peter Lin11-458/+35
We move andes directory to platform/generic as the necessary fdt drivers are available, the users can enable the console, timer, ipi, irqchip and reset devices by adding device tree nodes stated in the docs/platform/andes-ae350.md. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-05firmware: Minor optimization for relocateDongdong Zhang1-1/+1
The t3 register stores the address of _load_end. If relocation is not required, it is unnecessary to calculate the address of _load_end. This can reduce the operation time of two instructions. Signed-off-by: Dongdong Zhang <zhangdongdong@eswincomputing.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-05lib: fix fdt_parse_aclint_node()Heinrich Schuchardt1-1/+1
After determining cpu_offset we have to check this variable and not cpu_intc_offset. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Bin Meng <bmeng@tinylab.org>
2022-12-05lib: simplify fdt_translate_address()Heinrich Schuchardt1-1/+1
Don't assign a value to offset which is never used. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Bin Meng <bmeng@tinylab.org>
2022-12-05lib: fix fdt_parse_plicsw_node()Heinrich Schuchardt1-2/+4
cpu_offset and cpu_intc_offset must be int to detect failed invocations of fdt_node_offset_by_phandle() or fdt_parent_offset(). After determining cpu_offset we have to check this value and not cpu_intc_offset. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Bin Meng <bmeng@tinylab.org>
2022-12-05lib: fix fdt_parse_plmt_node()Heinrich Schuchardt1-2/+4
cpu_offset, cpu_intc_offset must be int to discover failed invocations of fdt_node_offset_by_phandle() or fdt_parent_offset(). After determining cpu_offset we have to check this value and not cpu_intc_offset. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Bin Meng <bmeng@tinylab.org>
2022-12-05lib: simplify fdt_parse_plicsw_node()Heinrich Schuchardt1-1/+1
We should not check !plicsw_base || !size twice. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Bin Meng <bmeng@tinylab.org>
2022-12-05lib: simplify fdt_parse_plmt_node()Heinrich Schuchardt1-1/+1
We should not check !plmt_base || !plmt_size twice. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Bin Meng <bmeng@tinylab.org>
2022-12-04lib: sbi: Fix is_region_valid()Xiang W1-0/+3
When order is equal to __riscv_xlen, the shift operation will not perform any operation, which will cause reg->base & (BIT(reg->order) - 1) to always be 0, and the condition has not been established. This patch fixes this bug. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-04lib: sbi: Simplified mmio match checkingXiang W1-3/+3
We simplify the mmio flag matching in sbi_domain_check_addr(). Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-04Makefile: bugfix for handling platform pathsAlejandro Cabrera Aldaya1-1/+1
If the path where this repo is located contains the platform name on it, the original Makefile replaced its occurrences from the path making it an invalid path. This commit prevents this behavior replacing only the last part of the path as intended. Signed-off-by: Alejandro Cabrera Aldaya <aldaya@gmail.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-04Makefile: replace `echo` with `printf` for compatibilityKaDiWa1-1/+1
I don't know why but `echo -n` didn't work for me. macOS supports the `-n` option but it doesn't work in the makefile. What it does instead is it literally writes `-n` to the file and then also leaves a newline at the end. I'm using GNU Make 4.4 (`gmake` from Homebrew). Signed-off-by: KaDiWa <kalle.wachsmuth@gmail.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-04platform: generic/allwinner: Remove ghostly type castXiang W1-3/+3
Corrected the same parameter of writel_relaxed in sun20i_d1_riscv_cfg_init to be u32 for a while and u64 for a while. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-11-22platform: generic/allwinner: Remove unused header filesLeizheng Zhang1-2/+0
Remove "#include <sbi/sbi_console.h>" Signed-off-by: Leizheng Zhang <zhangleizheng@eswincomputing.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Xiang W <wxjstz@126.com>
2022-11-22firmware: payloads: Optimize usage of "ALIGN"Leizheng Zhang2-12/+8
Delete the redundant "ALIGN" and adjust the position of "ALIGN" Signed-off-by: Leizheng Zhang <zhangleizheng@eswincomputing.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Bin Meng <bmeng@tinylab.org>
2022-11-15lib: sbi_ecall: Split up sbi_ecall_replaceVivian Wang5-126/+169
Split up sbi_ecall_replace so that each extension is in its individual file. Also reorganize the corresponding section in lib/sbi/objects.mk so that it is grouped by extension, now that the object file targets are split up. Signed-off-by: Vivian Wang <dramforever@live.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-11-15lib: utils/serial: Fix semihosting compile error using LLVMAnup Patel1-2/+2
We fix the following semihosting compile error observed using LLVM: lib/utils/serial/semihosting.c:158:12: error: result of comparison of constant -1 with expression of type 'char' is always true [-Werror,-Wtautological-constant-out-of-range-compare] ret = ch > -1 ? ch : -1; ~~ ^ ~~ Fixes: 7f09fba86e43 ("lib: utils/serial: add semihosting support") Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Bin Meng <bmeng@tinylab.org>
2022-11-14docs: fix some typoszhangdongdong5-5/+5
Corrected the typos of some documents in the 'docs' folder. Signed-off-by: zhangdongdong <zhangdongdong@eswincomputing.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-11-14lib: utils/fdt: Simplified codeXiang W1-27/+4
Simplified fdt_parse_xxx_uart_node which direct call fdt_parse_uart_node_common. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-11-14lib: utils/fdt: Remove redundant codeXiang W1-12/+0
uart->reg_offset and uart->reg_io_width are only used on uart8250 and not required on other platforms. Remove for sifive and gaisler. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23lib: sbi_ecall: Add Kconfig option for each extensionVivian Wang4-12/+59
For each SBI extension, we: - Add a Kconfig option for it - Add the extension to sbi_ecall_exts only if the extension is enabled - Add the corresponding sbi_ecall_* object file only if the extension is enabled Special cases are as follows: - The legacy extensions are lumped together as one 'big' extension, as has always been the case in OpenSBI code. - The platform-defined vendor extensions are regarded as one extension. - The Base extension cannot be disabled. - sbi_ecall_replace implements multiple extensions, so it's not easy to avoid linking it in. Enable it always, and use #ifdef to disable/enable individual extensions. Signed-off-by: Vivian Wang <dramforever@live.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23lib: sbi_ecall: Generate extensions list with carrayVivian Wang4-42/+32
Instead of hard-coding the list of extensions in C code, use carray to generate the list of extensions. Using carray makes adding and removing extensions slightly cleaner. This also paves the way for using Kconfig to disable unneeded extensions. Signed-off-by: Vivian Wang <dramforever@live.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23Makefile: Add rules for carray sources in lib/sbiVivian Wang1-0/+7
Add back the missing rules needed to build carray files in lib/sbi. This allows future usage of carray in lib/sbi. Fixes: de80e9337d81 ("Makefile: Compile lib/utils sources separately for each platform") Signed-off-by: Vivian Wang <dramforever@live.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23docs/firmware: update the documentYangjie Zhang2-2/+2
Since commit 9c07c513aa9b ("firmware:Remove FW_PAYLOAD_FDT_PATH compile-time option"), the section where FDT would be embedded in has changed from *.text* to *.rodata*, but some places in fw_payload.md and fw.md are still *.text*. This patch updates the document. Signed-off-by: Yangjie Zhang <pyjmstr@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23Makefile: Add cscope supportTan En De2-0/+14
Add cscope support so that running `make cscope` will generate/update cscope files used for source code browsing, while running `make distclean` will remove the cscope files. Also add entry in .gitignore to ignore generated cscope files. Signed-off-by: Tan En De <ende.tan@linux.starfivetech.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2022-10-23docs: andes-ae350.md: Update ae350 documentation for fdt driver supportYu Chien Peter Lin1-4/+180
We update ae350 documentation to add details about platform device tree. The nodes and their properties must be provided to properly initialize data of underlying hardware and access their mmio registers. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23platform: andes/ae350: Add AE350 domain supportYu Chien Peter Lin1-2/+11
Add domains_init platform hook for Andes AE350, users can add domain description in device tree and select FDT domain support in Kconfig to achieve system-level partitioning. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23lib: utils/ipi: Add Andes fdt ipi driver supportYu Chien Peter Lin13-211/+305
Move Andes PLICSW ipi device to fdt ipi framework, this patch is based on Leo's modified IPI scheme on PLICSW. Current IPI scheme uses bit 0 of pending reigster on PLICSW to send IPI from hart 0 to hart 7, but bit 0 needs to be hardwired to 0 according to spec. After some investigation, self-IPI seems to be seldom or never used, so we re-order the IPI scheme to support 8 core platforms. dts example (Quad-core AX45MP): plicsw: interrupt-controller@e6400000 { compatible = "andestech,plicsw"; reg = <0x00000000 0xe6400000 0x00000000 0x00400000>; interrupts-extended = <&CPU0_intc 3 &CPU1_intc 3 &CPU2_intc 3 &CPU3_intc 3>; interrupt-controller; #address-cells = <2>; #interrupt-cells = <2>; }; Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23platform: andes/ae350: Add fw_platform_init for platform initializationYu Chien Peter Lin2-4/+49
This patch adds fw_platform_init() to initialize ae350 platform.name and platform.hart_count by parsing device tree. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23platform: andes/ae350: Use fdt irqchip driverYu Chien Peter Lin3-26/+4
Andes PLIC is compatible with plic driver. The PLIC base address and number of source can be obtained by parsing the device tree. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23lib: utils/reset: Add Andes fdt reset driver supportYu Chien Peter Lin5-0/+134
Add ATCWDT200 as reset device of AE350 platform, this driver requires SMU to program the reset vector registers before triggering WDT software restart signal. dts example: smu@f0100000 { compatible = "andestech,atcsmu"; reg = <0x00000000 0xf0100000 0x00000000 0x00001000>; }; wdt: wdt@f0500000 { compatible = "andestech,atcwdt200"; reg = <0x00000000 0xf0500000 0x00000000 0x00001000>; interrupts = <3 4>; interrupt-parent = <&plic0>; clock-frequency = <15000000>; }; Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23lib: utils/timer: Add Andes fdt timer supportYu Chien Peter Lin13-144/+259
Since we can get the PLMT base address and timer frequency from device tree, move plmt timer device to fdt timer framework. dts example (Quad-core AX45MP): cpus { ... timebase-frequency = <0x3938700>; ... } soc { ... plmt0@e6000000 { compatible = "andestech,plmt0"; reg = <0x00 0xe6000000 0x00 0x100000>; interrupts-extended = <&cpu0_intc 0x07 &cpu1_intc 0x07 &cpu2_intc 0x07 &cpu3_intc 0x07>; }; ... } Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23platform: andes/ae350: Use fdt serial driverYu Chien Peter Lin3-22/+4
Andes UART is compatible with uart8250 driver. We can use fdt_serial_init() as platform console init hook. dts example: serial0: serial@f0300000 { compatible = "andestech,uart16550", "ns16550a"; reg = <0x00000000 0xf0300000 0x00000000 0x00001000>; interrupts = <9 4>; interrupt-parent = <&plic0>; clock-frequency = <19660800>; current-speed = <38400>; reg-shift = <2>; reg-offset = <32>; reg-io-width = <4>; no-loopback-test = <1>; }; Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23platform: andes/ae350: Use kconfig to set platform version and default nameYu Chien Peter Lin2-2/+22
This patch makes andes platform name and version can be set in menuconfig interface. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23platform: andes/ae350: Remove enabling cache from an350_final_initYu Chien Peter Lin1-19/+0
The boot-time cache operations have been handled by U-boot SPL, so we can drop duplicate code. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23lib: sbi: Add sbi_domain_root_add_memrange() APIYu Chien Peter Lin4-36/+57
This patch generalizes the logic to add a memory range with desired alignment and flags of consecutive regions to the root domain. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23include: sbi: Fix grammar in commentYu Chien Peter Lin1-1/+1
Fix minor grammar issue in function description. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23lib: sbi: Fix typo in commentYu Chien Peter Lin1-1/+1
%s/is is/is Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23include: sbi: Fix typo in commentYu Chien Peter Lin1-1/+1
%s/Priviledge/Privilege Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-13platform: generic: allwinner: add support for c9xx pmuHeiko Stuebner2-0/+187
With the T-HEAD C9XX cores being designed before or during ratification of the SSCOFPMF extension, they implement a PMU extension that behaves very similar but not equal to it by providing overflow interrupts though in a slightly different registers format. The sun20i-d1 is using this core. So implement the necessary overrides to allow its pmu to be used via the standard sbi-pmu extension. For now it's also the only soc using this core, so keep the additional code in the d1-space for now. Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-13platform: generic: add extensions_init handler and platform-overrideHeiko Stuebner2-0/+13
Init of non-standard extensions is a platform-specific thing, so allow generic platforms to do this via a platform-override. Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-13lib: sbi_platform: expose hart_features to extension_init callbackHeiko Stuebner2-4/+7
The platform-specific extension_init callback is supposed to set specific things for the platform opensbi is running on. So it's also the right place to override specific hart_features if needed - when it's know that autodetection has provided wrong results for example. Suggested-by: Atish Patra <atishp@atishpatra.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-13lib: sbi_hart: move hart_features struct to a public locationHeiko Stuebner2-23/+24
Platforms may need to override auto-detected hart features in their override functions. So move the hart_features struct to the sbi_hart.h header allowing us to pass it over to platform-handlers. Suggested-by: Atish Patra <atishp@atishpatra.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-13lib: sbi_pmu: move pmu irq information into pmu itselfHeiko Stuebner3-2/+22
Don't spread checking for pmu extensions through the code but instead introduce a sbi-pmu function that other code can call to get the correct information about the existence of the pmu interrupt. Add a sbi_pmu_device override function to allow overridung this bit as well if needed. Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-13docs: Fix some typoszhangdongdong4-10/+10
We fix few typos in documentation. Signed-off-by: zhangdongdong <zhangdongdong@eswincomputing.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-13docs/firmware: Update FW_JUMP documentationNylon.Chen1-0/+16
Add a tip for OpenSBI's FW_JUMP which helps users avoid overwriting the kernel. Signed-off-by: Nylon Chen <nylon.chen@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-09-13lib: utils/serial: add semihosting supportKautuk Consul6-1/+241
We add RISC-V semihosting based serial console for JTAG based early debugging. The RISC-V semihosting specification is available at: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Kautuk Consul <kconsul@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-09-13lib: sbi: Fix sbi_strnlen wrong count decrementRahul Pathak1-1/+0
count(maxlen) should not be decremented here Fixes: 1901e8a287bc ("platform: Add minimal libc support.") Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>