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2020-10-18platform: kendryte/k210: Add some padding for FDT fixupsAnup Patel1-0/+1
The Kendryte K210 platform has built-in DTB and does not provides FW_PAYLOAD_FDT_ADDR. This means the FDT fixups will be done on the built-in DTB in absence of FW_PAYLOAD_FDT_ADDR. This patch adds some padding in built-in DTB for FDT fixups. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-10-18firmware: Remove FW_PAYLOAD_FDT_PATH compile-time optionAnup Patel1-1/+3
The FW_PAYLOAD_FDT_PATH compile-time option is replaced by FW_FDT_PATH compile-time option which is more flexible and common across all OpenSBI firmwares. This patch removes FW_PAYLOAD_FDT_PATH and updates related documentation to use FW_FDT_PATH. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-09-16platform: generic: Don't mark non-MMU HARTs as invalidAnup Patel1-5/+1
Currently, the generic platform fw_platform_init() marks non-MMU HARTs (e.g. E-core on SiFive Unleashed) as invalid. This means such non-MMU HARTs won't be allowed to go ahead by sbi_init(). The sbi_init() now has a check for next stage privilege mode when selecting coldboot HART. This check will force non-MMU HARTS (i.e. HARTs without S-mode) to proceed in warmboot path and wait in the HSM STOPPED state. This means we don't need to mark non-MMU HARTs as invalid in generic platform fw_platform_init(). Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-08-20platform: kendryte/k210: fixup FDTHeinrich Schuchardt1-0/+18
When passing the device tree to the next stage we should apply necessary device tree fix-ups first. These include: * fix up the CPU node in the device tree * fix up the PLIC node in the device tree * fix up the reserved memory node in the device tree Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-06-29config.mk: Update QEMU run command for generic and sifive fu540 platformsBin Meng2-2/+2
Since QEMU v5.1, if there is no "-bios" option provided, the default OpenSBI firmware will be loaded by QEMU as the BIOS automatically, hence to load fw_payload type image, we should explicitly pass the "-bios" option to QEMU. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-06-17platform: Update Nuclei ux600 platform supportHuaqi Fang2-9/+79
Changes are made to support our FPGA evaluation board, it has DDR memory(0xA0000000-0xB0000000). * Adapt the config.mk to match FPGA evaluation board DDR memory address * Since the RISC-V CPU core frequency of FPGA might change, so we use the fixed TIMER frequency to measure the real CPU core frequency. * And the UART baudrate has to set to 57600bps for Nuclei FPGA evaluation board when CPU core frequency is about 8MHz, otherwise the UART input will not work correctly. Signed-off-by: Huaqi Fang <578567190@qq.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-06-15platform/lib: Allow the OS to map the regions that are protected by PMPAlexandre Ghiti4-0/+28
This is achieved by removing the 'no-map' property from the 'reserved-memory' node when PMP is present, otherwise we keep it as it offers a small protection if the OS does not map this region at all. A new callback in platform_override is introduced and allows to fixup the device-tree. It is used here to override this new default behaviour on SiFive Fu540 platforms that has an erratum that prevents S-mode software to access a PMP protected region using 1GB page table mapping. If PMP is present, telling the OS not to map the reserved regions does not add much protection since it only avoids access to regions that are already protected by PMP. But by not allowing the OS to map those regions, it creates holes in the OS system memory map and prevents the use of hugepages which would generate, among other benefits, less TLB miss. Signed-off-by: Alexandre Ghiti <alex@ghiti.fr> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-06-10platform: Add AE350 cache control SBIsNylon Chen5-1/+186
This patch contains the following AE350 specific SBIs: - get mcache_ctl status - get mmisc_ctl status - set mcache_ctl status - set mmisc_ctl status - I-cache operation - D-cache operation - enable/disable L1-I-cache prefetch - enable/disable L1-D-cache prefetch - enable/disable non-blocking load store - enable/disable write-around Signed-off-by: Nylon Chen <nylon7@andestech.com> Reviewed-by: Anup Patel <Anup.Patel@wdc.com> Reviewed-by: Atish Patra <Atish.Patra@wdc.com>
2020-06-10platform: Add AE350 platform specific SBI handlerNylon Chen2-3/+30
We add AE350 platform specific SBI handler to implement AE350 specific SBI calls. Signed-off-by: Nylon Chen <nylon7@andestech.com> Reviewed-by: Anup Patel <Anup.Patel@wdc.com> Reviewed-by: Atish Patra <Atish.Patra@wdc.com>
2020-06-05firmware: Remove FW_PAYLOAD_FDT and related documentationAnup Patel2-5/+4
Now that no platform is using FW_PAYLOAD_FDT mechanism, we remove related code from Makefile and related documentation. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-06-05platform: kendryte/k210: Use new mechanism of builtin DTBAnup Patel3-2/+12
We update kendryte/k210 to use new mechanism of having builtin DTB where we convert k210.dts to C source and further compile-n-link it with libplatsbi.a. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-06-05firmware: Allow fw_platform_init() to return updated FDT locationAnup Patel1-4/+9
Currently, the fw_platform_init() does not return anything but we can further improve by allowing fw_platform_init() to return updated FDT location. It is certainly not mandatory for fw_platform_init() to return a new location of FDT (or modify FDT). In fact, the fw_platform_init() can always return the original FDT location (i.e. 'arg1') unmodified. This new capability of fw_platform_init() will allow platforms to: 1. Have multiple built-in FDTs and select one 2. Modify FDT before using based on platform specific straps or OTP Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-23lib: utils: Allow CLINT functions to be used for multiple CLINTsAnup Patel7-34/+73
We extend CLINT cold init function to have a "struct clint_data *" parameter pointing to CLINT details. This allows platforms to use CLINT functions for multiple CLINT instances. When multiple CLINTs are present, the platform can also provide one of the CLINT as reference CLINT for other CLINTs. This will help CLINTs to sync their time value with reference CLINT using a time_delta computed in warm init function. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-23lib: utils: Extend fdt_find_match() ImplementationAnup Patel1-1/+1
We extend fdt_find_match() implementation by adding node offset parameter which represents the first node to match from. The improved fdt_find_match() can be used to find multiple match nodes. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-23lib: utils: Allow PLIC functions to be used for multiple PLICsAnup Patel7-37/+68
We extend all PLIC functions to have a "struct plic_data *" parameter pointing to PLIC details. This allows platforms to use these functions for multiple PLIC instances. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-23lib: utils: Remove redundant parameters from PLIC init functionsAnup Patel7-31/+16
The "target_hart" and "hart_count" parameters of PLIC cold and warm init functions are only used for sanity checks and not required in PLIC initialization. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-10platform: fpga: Remove redundant platform specific featuresAtish Patra2-10/+2
Any platform feature that belongs to a hart, have already been moved to hart features and are detected at run time. The remaining platform features are identical to platform default features. Use the platform default features instead of defining a separate copy of it. Signed-off-by: Atish Patra <atish.patra@wdc.com> Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-05-10platform: Move platform features to hartAtish Patra3-7/+1
PMP & performance counters belong to a hart rather than a platform. In addition to that, these features enable reading/writing from a particular csr. Thus, they can be detected and set at runtime rather than compile time. Move PMP/MCOUNTEREN/SCOUNTEREN features to hart and detect them at runtime. Signed-off-by: Atish Patra <atish.patra@wdc.com> Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-05-04platform: Remove spike directoryAnup Patel3-129/+0
The OpenSBI generic platform works perfectly fine on the QEMU spike machine and Spike emulator so let's remove dedicated Spike platform from OpenSBI. All Spike platform related documentation in OpenSBI will now suggest using OpenSBI generic platform. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2020-05-04platform: Remove qemu/virt directoryAnup Patel3-185/+0
The OpenSBI generic platform works perfectly fine on the QEMU virt machine so let's remove dedicated QEMU virt machine platform from OpenSBI. All QEMU virt machine related documentation in OpenSBI will now suggest using OpenSBI generic platform. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2020-05-01platform: generic: Add Sifive FU540 TLB flush range limit overrideAnup Patel3-1/+39
We need to override the remote TLB flush range limit for SiFive FU540 so we add platform override to achieve this. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-01platform: Add generic FDT based platform supportAnup Patel4-0/+285
We add generic FDT based platform support which provides platform specific functionality based on the FDT passed by previous booting stage. By default, the generic FDT platform makes following assumptions: 1. platform FW_TEXT_START is 0x80000000 2. platform features are default 3. platform stack size is default 4. platform has no quirks or work-arounds The above assumptions (except 1) can be overridden by adding special platform callbacks which will be called based on the FDT root node compatible string. By default, we compile OpenSBI generic platform as follows: $ make PLATFORM=generic For a non-standard FW_TEXT_START, we can compile OpenSBI generic platform as follows: $ make PLATFORM=generic FW_TEXT_START=<non_standard_text_start> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-01lib: utils: Rename fdt_parse_clint() to fdt_parse_compat_addr()Anup Patel1-1/+1
The fdt_parse_clint() is quite generic and can be used for other types of devices so we rename it to fdt_parse_compat_addr(). Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-29platform: Add Nuclei UX600 platformHuaqi Fang3-0/+185
* Nuclei UX600 is a 64-bit RISC-V core developed by Nuclei System Technology, see https://nucleisys.com/product.php * The ISA is configurable in hardware on your demand Signed-off-by: Huaqi Fang <578567190@qq.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-27lib: utils: Add SiFive test deviceAnup Patel1-13/+11
This patch factor-out SiFive test device related stuff into it's own source file from qemu/virt platform. In future, we can find SiFive test device address from device tree as well. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-27include: sbi_platform: Combine reboot and shutdown into one callbackAnup Patel9-77/+25
We can achieve shutdown, cold reboot, and warm reboot using just one sbi_platform callback so we combine system_reboot() and system_shutdown() callbacks into one system_reset() callback. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-27lib: No need to provide default PMP region using platform callbacksAnup Patel5-130/+0
The default (usually last) PMP region provides S-mode access to complete memory range not covered by other PMP regions. Currently, the default PMP region is described as platform specific PMP region which is not appropriate because all platforms need it and default PMP region should be part of generic library. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-28platform: thead/c910: Use HSM extension to boot secondary coresLiu Yibin2-20/+5
Remove custom vendor extension and use HSM extension to boot secondary cores Signed-off-by: Liu Yibin <yibin_liu@c-sky.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-24platform: openpiton: Read the device configurations from device treeAtish Patra1-25/+57
OpenPiton is designed to run on different FPGAs with different configurations. Use the fdt parser to retrieve the required values from device tree instead of using fixed values. Signed-off-by: Atish Patra <atish.patra@wdc.com> Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-24lib: utils: Move fdt fixup helper routines to a different fileAtish Patra5-4/+5
FDT helper file contain both fdt fixup and parsing functions. Split the fixup related functions to a separate file for a better code organization. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-24platform: Add OpenPiton platform supportAtish Patra3-0/+242
OpenPiton is a research platform from Princeton University [1]. "OpenPiton is the world's first open source, general purpose, multithreaded manycore processor. It is a tiled manycore framework scalable from one to 1/2 billion cores." Add OpenSBI support for OpenPiton. As it is based on ariane core, it reuses the platform code from arine project. [1]. https://github.com/PrincetonUniversity/openpiton Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-24platform: fpga/ariane: Remove redundant plic address macrosAtish Patra1-9/+4
All the common PLIC specific macros are already defined in plic.c. Remove it from platform code. While at it, Fix the other coding style issues. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-24platform: Move ariane standalone fpga project to its own projectAtish Patra3-0/+0
Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-19platform: sifive/fu540: Remove FU540_ENABLED_HART_MASK optionAnup Patel2-13/+0
The FU540_ENABLED_HART_MASK compile time option was added for initial bring-up on SiFive Unleashed. This option is redundant now because disabled_hart_mask is already removed. Based on this rationale, we remove FU540_ENABLED_HART_MASK compile time option. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-19include: sbi_platform: Introduce HART index to HART id tableAnup Patel1-6/+8
A platform can have discontinuous and/or sparse HART ids so we cannot always assume a set of HARTs with continuous HART ids. This patch adds support for discontinuous and sparse HART ids by introducing HART index to HART id table. This table has platform hart_count entries and it maps HART index to HART id. The HART index to HART id table has only two restrictions: 1. HART index < sbi_platform hart_count 2. HART id < SBI_HARTMASK_MAX_BITS Example1: Let's say we have a platform with 2 HART ids 11 and 22, for such a a platform: hart_count = 2 hart_index2id[0] = 11 hart_index2id[1] = 22 Example2: Let's say we have a platform with 5 HARTs ids 0, 1, 2, 3, and 4 but out of these HART with id 0 is not usable so for such a platform: hart_count = 5 hart_index2id[0] = -1U hart_index2id[1] = 1 hart_index2id[2] = 2 hart_index2id[3] = 3 hart_index2id[4] = 4 OR hart_count = 4 hart_index2id[0] = 1 hart_index2id[1] = 2 hart_index2id[2] = 3 hart_index2id[3] = 4 With HART index to HART id table in place, the hart_disabled() callback is now redundant so we remove it as well. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-18platform: Update to call general DT fix-up helperBin Meng4-12/+5
Platform andes/ae350, ariane-fpga, qemu/virt and sifive/fu540 codes have been updated to call this general DT fix-up helper. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-18platform: sifive/fu540: Replace cpu0 node fix-up with the new helperBin Meng1-25/+1
This replaces the FU540 specific cpu0 node "status" property fix-up with the newly introduced generic fdt_cpu_fixup() helper. Unlike previous logic, the helper routine does not test the "mmu-type" property to determine which node we should fix up, instead it uses sbi_platform_hart_disabled() API. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-18platform: sifive/fu540: Remove "stdout-path" fix-upBin Meng1-5/+1
As of today the upstream U-Boot & Linux kernel ships a device tree that already has "stdout-path" properly set in the "/chosen" node. This is the same with the QEMU 'sifive_u' machine. Hence the codes to fix up the "stdout-path" in OpenSBI is not necessary. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-18platform: sifive/fu540: Fix up DT for reserved memoryBin Meng1-0/+2
This calls fdt_reserved_memory_fixup() helper in the platform's final_init() routine. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-18platform: qemu/virt: Fix up DT for reserved memoryBin Meng1-0/+2
This calls fdt_reserved_memory_fixup() helper in the platform's final_init() routine. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-18platform: ariane-fpga: Fix up DT for reserved memoryBin Meng1-0/+3
This calls fdt_reserved_memory_fixup() helper in the platform's final_init() routine. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-18platform: andes/ae350: Fix up DT for reserved memoryBin Meng1-0/+2
This calls fdt_reserved_memory_fixup() helper in the platform's final_init() routine. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-18lib: utils: Move PLIC DT fix up codes to fdt_helper.cBin Meng4-4/+8
Now that we have a dedicated fdt_helper.c file for DT releated helper routines, move plic_fdt_fixup() codes from plic.c to fdt_helper.c and rename it to fdt_plic_fixup() at the same time, to keep name consistency in the same file. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-18platform: Clean up include header filesBin Meng6-16/+12
Adjust the order of include header files in alphabetical order in platform codes. Also remove unnecessary inclusions. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-14platform: Use one unified per-HART stack size macro for all platformsBin Meng11-14/+8
As of today all platforms use 8KB of per-HART stack hence there is no need for each platform to define its own macro or use the magic number. Create one macro for all platforms. Platform still can use its own version if needed. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-14platform: Set per-HART stack size to 8KB in the template platform codesBin Meng1-1/+1
The template platform codes should set per-HART stack size to 8KB to avoid possible mistakes of future platform ports. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-14platform: ariane-fpga: Set per-HART stack size to 8KBBin Meng1-1/+1
Recent commit 4a603eb ("platform: kendryte/k210: Set per-HART stack size to 8KB") forgot to update ariane-fpga codes, and the following commit 678c3c3 ("include: sbi_scratch: Set per-HART scratch size to 4KB") changed the per-HART scratch size to 4KB, which potentially breaks ariane-fpga platform. This patch set per-HART stack size of ariane-fpga to 8KB for consistency. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-13include: Make sbi_current_hartid() as macro in riscv_asm.hAnup Patel8-20/+23
The sbi_current_hartid() being a regular function is quite expensive because for callers it is a function call instead of a direct CSR read. This patch converts sbi_current_hartid() into a macro in riscv_asm.h. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-13platform: ariane-fpga: Change license for ariane-fpga from GPL-2.0 to BSD-2Panagiotis Peristerakis3-3/+3
Signed-off-by: Panagiotis Peristerakis <perister@ics.forth.gr> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-11include: Remove disabled_hart_mask from sbi_platformAnup Patel8-10/+6
The disabled_hard_mask in sbi_platform is only 64bits wide so we cannot disable a HART with HARTID > 63. To tackle this, we remove disabled_hart_mask and replace it with hart_disabled() platform callback. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>