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| author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-10-10 17:21:06 +0300 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-11-22 01:57:21 +0300 |
| commit | b3a6cdc43c09afa55b97b853fc6979c3a4e6b246 (patch) | |
| tree | 5b12370fc29fce031ab793c21eabdc695d6a3b2e | |
| parent | a33fee154bd1c3d7e7dd7d7d8a4cab2b77731b9b (diff) | |
| download | u-boot-b3a6cdc43c09afa55b97b853fc6979c3a4e6b246.tar.xz | |
rockchip: rk3036: use aligned address for SPL_TEXT_BASE
With the boot0-hook inserting the additional padding to receive our
SPL magic, the SPL_TEXT_BASE can be aligned again.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| -rw-r--r-- | include/configs/rk3036_common.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 4ed8f5a6c7..3a2bf339b1 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -25,7 +25,7 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 #define CONFIG_SPL_STACK 0x10081fff -#define CONFIG_SPL_TEXT_BASE 0x10081004 +#define CONFIG_SPL_TEXT_BASE 0x10081000 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10) #define CONFIG_ROCKCHIP_CHIP_TAG "RK30" |