diff options
author | Kever Yang <kever.yang@rock-chips.com> | 2019-07-09 17:05:59 +0300 |
---|---|---|
committer | Kever Yang <kever.yang@rock-chips.com> | 2019-07-20 18:59:44 +0300 |
commit | 87ac550862edd3540be4030f2bc266f4b5182fa3 (patch) | |
tree | bea15b2ac244f666d3bbcb87cdc2207d3df3d3be | |
parent | 82560cb311017a656e83f797e5480768c16d7a6d (diff) | |
download | u-boot-87ac550862edd3540be4030f2bc266f4b5182fa3.tar.xz |
rockchip: rk3399: use common secure_timer_init() for spl/tpl
SPL/TPL share the same secure_timer_init(), update to use
one copy source code and update to use CONFIG_ROCKCHIP_STIMER_BASE
as base address and rename to function name to rockchip_stimer_init().
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
-rw-r--r-- | arch/arm/mach-rockchip/rk3399-board-spl.c | 21 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3399-board-tpl.c | 20 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3399/rk3399.c | 29 | ||||
-rw-r--r-- | include/configs/rk3399_common.h | 1 |
4 files changed, 34 insertions, 37 deletions
diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index 2333694caa..7154d8e5d0 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -109,27 +109,10 @@ void spl_perform_fixups(struct spl_image_info *spl_image) "u-boot,spl-boot-device", boot_ofpath); } -#define TIMER_CHN10_BASE 0xff8680a0 -#define TIMER_END_COUNT_L 0x00 -#define TIMER_END_COUNT_H 0x04 -#define TIMER_INIT_COUNT_L 0x10 -#define TIMER_INIT_COUNT_H 0x14 -#define TIMER_CONTROL_REG 0x1c - -#define TIMER_EN 0x1 -#define TIMER_FMODE (0 << 1) -#define TIMER_RMODE (1 << 1) - -void secure_timer_init(void) +__weak void rockchip_stimer_init(void) { - writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L); - writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H); - writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L); - writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H); - writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG); } - void board_init_f(ulong dummy) { struct udevice *dev; @@ -188,7 +171,7 @@ void board_init_f(ulong dummy) grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); rk_clrreg(&grf->emmccore_con[11], 0x0ff); - secure_timer_init(); + rockchip_stimer_init(); ret = uclass_get_device(UCLASS_RAM, 0, &dev); if (ret) { diff --git a/arch/arm/mach-rockchip/rk3399-board-tpl.c b/arch/arm/mach-rockchip/rk3399-board-tpl.c index 4a301249b4..740470de46 100644 --- a/arch/arm/mach-rockchip/rk3399-board-tpl.c +++ b/arch/arm/mach-rockchip/rk3399-board-tpl.c @@ -12,24 +12,8 @@ #include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> -#define TIMER_CHN10_BASE 0xff8680a0 -#define TIMER_END_COUNT_L 0x00 -#define TIMER_END_COUNT_H 0x04 -#define TIMER_INIT_COUNT_L 0x10 -#define TIMER_INIT_COUNT_H 0x14 -#define TIMER_CONTROL_REG 0x1c - -#define TIMER_EN 0x1 -#define TIMER_FMODE (0 << 1) -#define TIMER_RMODE (1 << 1) - -void secure_timer_init(void) +__weak void rockchip_stimer_init(void) { - writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L); - writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H); - writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L); - writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H); - writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG); } void board_init_f(ulong dummy) @@ -55,7 +39,7 @@ void board_init_f(ulong dummy) hang(); } - secure_timer_init(); + rockchip_stimer_init(); ret = uclass_get_device(UCLASS_RAM, 0, &dev); if (ret) { diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index e1f9f8b8ef..0f09ea5c49 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -38,6 +38,35 @@ static struct mm_region rk3399_mem_map[] = { struct mm_region *mem_map = rk3399_mem_map; +#ifdef CONFIG_SPL_BUILD + +#define TIMER_END_COUNT_L 0x00 +#define TIMER_END_COUNT_H 0x04 +#define TIMER_INIT_COUNT_L 0x10 +#define TIMER_INIT_COUNT_H 0x14 +#define TIMER_CONTROL_REG 0x1c + +#define TIMER_EN 0x1 +#define TIMER_FMODE BIT(0) +#define TIMER_RMODE BIT(1) + +void rockchip_stimer_init(void) +{ + /* If Timer already enabled, don't re-init it */ + u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); + + if (reg & TIMER_EN) + return; + + writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_END_COUNT_L); + writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_END_COUNT_H); + writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_INIT_COUNT_L); + writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_INIT_COUNT_H); + writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + \ + TIMER_CONTROL_REG); +} +#endif + int dram_init_banksize(void) { size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top); diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index f31f2658bb..8df0180284 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -13,6 +13,7 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #define COUNTER_FREQUENCY 24000000 +#define CONFIG_ROCKCHIP_STIMER_BASE 0xff8680a0 #define CONFIG_SYS_NS16550_MEM32 |